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Optimization fixes

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This commit is contained in:
Karol Stasiak 2018-06-10 23:44:45 +02:00
parent 278cbcec63
commit a16f662031
1 changed files with 2 additions and 2 deletions
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4
src/main/scala/millfork/assembly/opt/LaterOptimizations.scala
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@ -118,7 +118,7 @@ object LaterOptimizations {
private def TwoIdenticalLoadsWithNoFlagChangeInBetween(opcode: Opcode.Value, middle: AssemblyLinePattern) = { private def TwoIdenticalLoadsWithNoFlagChangeInBetween(opcode: Opcode.Value, middle: AssemblyLinePattern) = {
(HasOpcode(opcode) & MatchAddrMode(0) & MatchParameter(1)) ~ (HasOpcode(opcode) & MatchAddrMode(0) & MatchParameter(1)) ~
(LinearOrLabel & Not(ChangesMemory) & middle & Not(ChangesNAndZ)).* ~ (LinearOrLabel & Not(ChangesMemory) & DoesntChangeIndexingInAddrMode(0) & middle & Not(ChangesNAndZ)).* ~
(HasOpcode(opcode) & Elidable & MatchAddrMode(0) & MatchParameter(1)) ~~> { c => (HasOpcode(opcode) & Elidable & MatchAddrMode(0) & MatchParameter(1)) ~~> { c =>
c.init c.init
} }
@ -134,7 +134,7 @@ object LaterOptimizations {
private def TwoIdenticalLoadsWhoseFlagsWillNotBeChecked(opcode: Opcode.Value, middle: AssemblyLinePattern) = { private def TwoIdenticalLoadsWhoseFlagsWillNotBeChecked(opcode: Opcode.Value, middle: AssemblyLinePattern) = {
((HasOpcode(opcode) & MatchAddrMode(0) & MatchParameter(1)) ~ ((HasOpcode(opcode) & MatchAddrMode(0) & MatchParameter(1)) ~
(LinearOrLabel & Not(ChangesMemory) & middle).*).capture(2) ~ (LinearOrLabel & Not(ChangesMemory) & DoesntChangeIndexingInAddrMode(0) & middle).*).capture(2) ~
(HasOpcode(opcode) & Elidable & MatchAddrMode(0) & MatchParameter(1)) ~ (HasOpcode(opcode) & Elidable & MatchAddrMode(0) & MatchParameter(1)) ~
((LinearOrLabel & Not(ReadsNOrZ) & Not(ChangesNAndZ)).* ~ ChangesNAndZ).capture(3) ~~> { (_, ctx) => ((LinearOrLabel & Not(ReadsNOrZ) & Not(ChangesNAndZ)).* ~ ChangesNAndZ).capture(3) ~~> { (_, ctx) =>
ctx.get[List[AssemblyLine]](2) ++ ctx.get[List[AssemblyLine]](3) ctx.get[List[AssemblyLine]](2) ++ ctx.get[List[AssemblyLine]](3)