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various optimization fixes and improvements
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commit
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@ -118,6 +118,7 @@ object OptimizationPresets {
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AlwaysGoodOptimizations.AlwaysTakenJumpRemoval,
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AlwaysGoodOptimizations.AlwaysTakenJumpRemoval,
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AlwaysGoodOptimizations.UnusedLabelRemoval,
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AlwaysGoodOptimizations.UnusedLabelRemoval,
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AlwaysGoodOptimizations.ConstantInlinedShifting,
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LaterOptimizations.LoadingAfterShifting,
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LaterOptimizations.LoadingAfterShifting,
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AlwaysGoodOptimizations.PointlessAccumulatorShifting,
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AlwaysGoodOptimizations.PointlessAccumulatorShifting,
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EmptyMemoryStoreRemoval,
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EmptyMemoryStoreRemoval,
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@ -130,6 +131,7 @@ object OptimizationPresets {
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AlwaysGoodOptimizations.UnusedCodeRemoval,
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AlwaysGoodOptimizations.UnusedCodeRemoval,
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AlwaysGoodOptimizations.ReverseFlowAnalysis,
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AlwaysGoodOptimizations.ReverseFlowAnalysis,
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AlwaysGoodOptimizations.ModificationOfJustWrittenValue,
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AlwaysGoodOptimizations.ModificationOfJustWrittenValue,
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AlwaysGoodOptimizations.ConstantInlinedShifting,
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AlwaysGoodOptimizations.ShiftingJustWrittenValue,
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AlwaysGoodOptimizations.ShiftingJustWrittenValue,
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AlwaysGoodOptimizations.PointlessAccumulatorShifting,
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AlwaysGoodOptimizations.PointlessAccumulatorShifting,
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AlwaysGoodOptimizations.ReverseFlowAnalysis,
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AlwaysGoodOptimizations.ReverseFlowAnalysis,
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@ -175,6 +177,7 @@ object OptimizationPresets {
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AlwaysGoodOptimizations.BranchInPlaceRemoval,
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AlwaysGoodOptimizations.BranchInPlaceRemoval,
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AlwaysGoodOptimizations.CarryFlagConversion,
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AlwaysGoodOptimizations.CarryFlagConversion,
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DangerousOptimizations.ConstantIndexOffsetPropagation,
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DangerousOptimizations.ConstantIndexOffsetPropagation,
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AlwaysGoodOptimizations.ConstantInlinedShifting,
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AlwaysGoodOptimizations.CommonBranchBodyOptimization,
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AlwaysGoodOptimizations.CommonBranchBodyOptimization,
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AlwaysGoodOptimizations.CommonExpressionInConditional,
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AlwaysGoodOptimizations.CommonExpressionInConditional,
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AlwaysGoodOptimizations.CommonIndexSubexpressionElimination,
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AlwaysGoodOptimizations.CommonIndexSubexpressionElimination,
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@ -2483,4 +2483,29 @@ object AlwaysGoodOptimizations {
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AssemblyLine.immediate(ORA, 1) :: code.init
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AssemblyLine.immediate(ORA, 1) :: code.init
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},
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},
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)
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)
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val ConstantInlinedShifting = new RuleBasedAssemblyOptimization("Constant inlined shifting",
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needsFlowInfo = FlowInfoRequirement.BothFlows,
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// TODO: set limits on the loop iteration to avoid huge unrolled code
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(Elidable & HasOpcode(LABEL) & MatchX(1) & MatchParameter(2)) ~
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(Elidable & HasOpcodeIn(ASL, LSR, ROL, ROR, DEC, INC) & Not(ConcernsX)).*.capture(5) ~
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(Elidable & HasOpcode(DEX)) ~
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(Elidable & HasOpcode(BNE) & MatchParameter(2)) ~~> { (code, ctx) =>
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val iters = ctx.get[Int](1)
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val shift = ctx.get[List[AssemblyLine]](5)
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List.fill(iters)(shift).flatten :+ AssemblyLine.immediate(LDX, 0)
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},
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(Elidable & HasOpcode(LABEL) & MatchY(1) & MatchParameter(2))~
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(Elidable & HasOpcodeIn(ASL, LSR, ROL, ROR, DEC, INC) & Not(ConcernsY)).*.capture(5) ~
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(Elidable & HasOpcode(DEY)) ~
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(Elidable & HasOpcode(BNE) & MatchParameter(2)) ~~> { (code, ctx) =>
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val iters = ctx.get[Int](1)
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val shift = ctx.get[List[AssemblyLine]](5)
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List.fill(iters)(shift).flatten :+ AssemblyLine.immediate(LDY, 0)
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},
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)
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}
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}
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@ -5,7 +5,7 @@ import millfork.{CompilationFlag, CompilationOptions}
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import millfork.assembly.mos.AssemblyLine
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import millfork.assembly.mos.AssemblyLine
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import millfork.assembly.mos.OpcodeClasses
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import millfork.assembly.mos.OpcodeClasses
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import millfork.assembly.opt.AnyStatus
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import millfork.assembly.opt.AnyStatus
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import millfork.env.{Label, MemoryAddressConstant, NormalFunction, NumericConstant}
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import millfork.env._
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/**
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/**
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* @author Karol Stasiak
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* @author Karol Stasiak
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@ -72,6 +72,14 @@ object CoarseFlowAnalyzer {
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case AssemblyLine(op, Immediate | WordImmediate, NumericConstant(nn, _), _) if FlowAnalyzerForImmediate.hasDefinition(op) =>
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case AssemblyLine(op, Immediate | WordImmediate, NumericConstant(nn, _), _) if FlowAnalyzerForImmediate.hasDefinition(op) =>
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currentStatus = FlowAnalyzerForImmediate.get(op)(nn.toInt, currentStatus)
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currentStatus = FlowAnalyzerForImmediate.get(op)(nn.toInt, currentStatus)
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case AssemblyLine(op, _, MemoryAddressConstant(th: Thing), _)
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if th.name == "__reg" && FlowAnalyzerForTheRest.hasDefinition(op) =>
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currentStatus = FlowAnalyzerForTheRest.get(op)(currentStatus, Some(0))
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case AssemblyLine(op, _, CompoundConstant(MathOperator.Plus, MemoryAddressConstant(th: Thing), NumericConstant(n, _)), _)
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if th.name == "__reg" && FlowAnalyzerForTheRest.hasDefinition(op) =>
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currentStatus = FlowAnalyzerForTheRest.get(op)(currentStatus, Some(n.toInt))
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case AssemblyLine(op, _, _, _) if FlowAnalyzerForTheRest.hasDefinition(op) =>
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case AssemblyLine(op, _, _, _) if FlowAnalyzerForTheRest.hasDefinition(op) =>
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currentStatus = FlowAnalyzerForTheRest.get(op)(currentStatus, None)
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currentStatus = FlowAnalyzerForTheRest.get(op)(currentStatus, None)
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@ -193,7 +193,7 @@ case class CpuStatus(a: Status[Int] = UnknownStatus,
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case Some(1) => this.copy(r1 = status)
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case Some(1) => this.copy(r1 = status)
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case Some(2) => this.copy(r2 = status)
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case Some(2) => this.copy(r2 = status)
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case Some(3) => this.copy(r3 = status)
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case Some(3) => this.copy(r3 = status)
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case None => this
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case _ => this
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}
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}
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}
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}
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}
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}
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@ -12,7 +12,8 @@ object ReverseFlowAnalyzerPerImpiedOpcode {
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a = Important, ah = Important,
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a = Important, ah = Important,
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x = Important, y = Important, iz = Important,
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x = Important, y = Important, iz = Important,
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c = Important, v = Important, d = Important, z = Important, n = Important,
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c = Important, v = Important, d = Important, z = Important, n = Important,
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m = Important, w = Important)
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m = Important, w = Important,
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r0 = Unimportant, r1 = Unimportant, r2 = Unimportant, r3 = Unimportant)
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private def allAddingOutputsUnimportant(currentImportance: CpuImportance): Boolean =
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private def allAddingOutputsUnimportant(currentImportance: CpuImportance): Boolean =
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currentImportance.a == Unimportant &&
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currentImportance.a == Unimportant &&
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@ -1116,7 +1116,7 @@ case class CallsAnyExcept(identifiers: Set[String]) extends TrivialAssemblyLineP
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(line.addrMode == AddrMode.Absolute ||
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(line.addrMode == AddrMode.Absolute ||
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line.addrMode == AddrMode.LongAbsolute ||
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line.addrMode == AddrMode.LongAbsolute ||
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line.addrMode == AddrMode.LongRelative) && (line.parameter match {
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line.addrMode == AddrMode.LongRelative) && (line.parameter match {
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case MemoryAddressConstant(th) => !identifiers(th.name)
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case MemoryAddressConstant(th) => th.name.head != '.' && !identifiers(th.name)
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case _ => false
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case _ => false
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})
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})
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}
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}
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@ -4,7 +4,6 @@ import millfork.assembly.mos.Opcode._
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import millfork.assembly.mos.AddrMode._
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import millfork.assembly.mos.AddrMode._
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import millfork.assembly.AssemblyOptimization
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import millfork.assembly.AssemblyOptimization
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import millfork.assembly.mos.{AssemblyLine, Opcode, State}
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import millfork.assembly.mos.{AssemblyLine, Opcode, State}
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import millfork.env.{CompoundConstant, Constant, MathOperator}
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import millfork.DecimalUtils.asDecimal
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import millfork.DecimalUtils.asDecimal
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/**
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/**
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* @author Karol Stasiak
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* @author Karol Stasiak
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@ -17,6 +16,25 @@ object ZeropageRegisterOptimizations {
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"__sbc_decimal" -> Set(2, 3),
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"__sbc_decimal" -> Set(2, 3),
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"__sub_decimal" -> Set(2, 3))
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"__sub_decimal" -> Set(2, 3))
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val ConstantInlinedMultiplication = new RuleBasedAssemblyOptimization("Constant inlined multiplication",
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needsFlowInfo = FlowInfoRequirement.BothFlows,
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(Elidable & HasOpcode(LDA) & HasImmediate(0) & MatchZpReg(4, 0) & MatchZpReg(5, 1)) ~
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(Elidable & HasOpcodeIn(JMP, BEQ) & MatchParameter(13)) ~
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(Elidable & HasOpcode(LABEL) & MatchParameter(11)) ~
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(Elidable & HasOpcode(CLC)) ~
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(Elidable & HasOpcode(ADC) & RefersTo("__reg", 0)) ~
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(Elidable & HasOpcode(LABEL) & MatchParameter(12)) ~
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(Elidable & HasOpcode(ASL) & RefersTo("__reg", 0)) ~
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(Elidable & HasOpcode(LABEL) & MatchParameter(13)) ~
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(Elidable & HasOpcode(LSR) & RefersTo("__reg", 1)) ~
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(Elidable & HasOpcode(BCS) & MatchParameter(11)) ~
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(Elidable & HasOpcode(BNE) & MatchParameter(12) & DoesntMatterWhatItDoesWith(State.N, State.Z, State.V)) ~
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(Not(RefersTo("__reg")) & DoesntMatterWhatItDoesWithReg(0) & DoesntMatterWhatItDoesWithReg(1)) ~~> { (code, ctx) =>
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val product = ctx.get[Int](4) * ctx.get[Int](5)
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List(AssemblyLine.immediate(LDA, product & 0xff), AssemblyLine.implied(CLC), code.last)
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},
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)
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val ConstantMultiplication = new RuleBasedAssemblyOptimization("Constant multiplication",
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val ConstantMultiplication = new RuleBasedAssemblyOptimization("Constant multiplication",
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needsFlowInfo = FlowInfoRequirement.ForwardFlow,
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needsFlowInfo = FlowInfoRequirement.ForwardFlow,
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(HasOpcode(STA) & RefersTo("__reg", 0) & MatchAddrMode(0) & MatchParameter(1) & MatchA(4)) ~
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(HasOpcode(STA) & RefersTo("__reg", 0) & MatchAddrMode(0) & MatchParameter(1) & MatchA(4)) ~
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@ -125,27 +143,35 @@ object ZeropageRegisterOptimizations {
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needsFlowInfo = FlowInfoRequirement.NoRequirement,
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needsFlowInfo = FlowInfoRequirement.NoRequirement,
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(Elidable & HasOpcode(STA) & RefersTo("__reg", 0) & MatchAddrMode(0) & MatchParameter(1)) ~
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(Elidable & HasOpcode(STA) & RefersTo("__reg", 0) & MatchAddrMode(0) & MatchParameter(1)) ~
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(LinearOrLabel & DoesNotConcernMemoryAt(0, 1)).* ~
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(LinearOrLabel & DoesNotConcernMemoryAt(0, 1)).* ~
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(HasOpcodeIn(Set(RTS, RTL)) | CallsAnyExcept(functionsThatUsePseudoregisterAsInput.filter(_._2.contains(0)).keySet)) ~~> (_.tail),
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(HasOpcodeIn(Set(RTS, RTL)) | HasOpcodeIn(JSR, JMP) & CallsAnyExcept(functionsThatUsePseudoregisterAsInput.filter(_._2.contains(0)).keySet)) ~~> (_.tail),
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(Elidable & HasOpcode(STA) & RefersTo("__reg", 1) & MatchAddrMode(0) & MatchParameter(1)) ~
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(Elidable & HasOpcode(STA) & RefersTo("__reg", 1) & MatchAddrMode(0) & MatchParameter(1)) ~
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(LinearOrLabel & DoesNotConcernMemoryAt(0, 1)).* ~
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(LinearOrLabel & DoesNotConcernMemoryAt(0, 1)).* ~
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(HasOpcodeIn(Set(RTS, RTL)) | CallsAnyExcept(functionsThatUsePseudoregisterAsInput.filter(_._2.contains(1)).keySet)) ~~> (_.tail),
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(HasOpcodeIn(Set(RTS, RTL)) | HasOpcodeIn(JSR, JMP) & CallsAnyExcept(functionsThatUsePseudoregisterAsInput.filter(_._2.contains(1)).keySet)) ~~> (_.tail),
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(Elidable & HasOpcode(STA) & RefersTo("__reg", 2) & MatchAddrMode(0) & MatchParameter(1)) ~
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(Elidable & HasOpcode(STA) & RefersTo("__reg", 2) & MatchAddrMode(0) & MatchParameter(1)) ~
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(LinearOrLabel & DoesNotConcernMemoryAt(0, 1)).* ~
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(LinearOrLabel & DoesNotConcernMemoryAt(0, 1)).* ~
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(HasOpcodeIn(Set(RTS, RTL)) | CallsAnyExcept(functionsThatUsePseudoregisterAsInput.filter(_._2.contains(2)).keySet)) ~~> (_.tail),
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(HasOpcodeIn(Set(RTS, RTL)) | HasOpcodeIn(JSR, JMP) & CallsAnyExcept(functionsThatUsePseudoregisterAsInput.filter(_._2.contains(2)).keySet)) ~~> (_.tail),
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(Elidable & HasOpcode(STA) & RefersTo("__reg", 3) & MatchAddrMode(0) & MatchParameter(1)) ~
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(Elidable & HasOpcode(STA) & RefersTo("__reg", 3) & MatchAddrMode(0) & MatchParameter(1)) ~
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(LinearOrLabel & DoesNotConcernMemoryAt(0, 1)).* ~
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(LinearOrLabel & DoesNotConcernMemoryAt(0, 1)).* ~
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(HasOpcodeIn(Set(RTS, RTL)) | CallsAnyExcept(functionsThatUsePseudoregisterAsInput.filter(_._2.contains(3)).keySet)) ~~> (_.tail),
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(HasOpcodeIn(Set(RTS, RTL)) | HasOpcodeIn(JSR, JMP) & CallsAnyExcept(functionsThatUsePseudoregisterAsInput.filter(_._2.contains(3)).keySet)) ~~> (_.tail),
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)
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)
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val DeadRegStoreFromFlow = new RuleBasedAssemblyOptimization("Dead zeropage register store from flow",
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val DeadRegStoreFromFlow = new RuleBasedAssemblyOptimization("Dead zeropage register store from flow",
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needsFlowInfo = FlowInfoRequirement.BothFlows,
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needsFlowInfo = FlowInfoRequirement.BothFlows,
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(Elidable & HasOpcode(STA) & RefersTo("__reg", 0) & DoesntMatterWhatItDoesWithReg(0)) ~~> (_.tail),
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(Elidable & HasOpcodeIn(STA, STX, SAX, STY, STZ) & RefersTo("__reg", 0) & DoesntMatterWhatItDoesWithReg(0)) ~~> (_.tail),
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(Elidable & HasOpcode(STA) & RefersTo("__reg", 1) & DoesntMatterWhatItDoesWithReg(1)) ~~> (_.tail),
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(Elidable & HasOpcodeIn(STA, STX, SAX, STY, STZ) & RefersTo("__reg", 1) & DoesntMatterWhatItDoesWithReg(1)) ~~> (_.tail),
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(Elidable & HasOpcode(STA) & RefersTo("__reg", 2) & DoesntMatterWhatItDoesWithReg(2)) ~~> (_.tail),
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(Elidable & HasOpcodeIn(STA, STX, SAX, STY, STZ) & RefersTo("__reg", 2) & DoesntMatterWhatItDoesWithReg(2)) ~~> (_.tail),
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(Elidable & HasOpcode(STA) & RefersTo("__reg", 3) & DoesntMatterWhatItDoesWithReg(3)) ~~> (_.tail),
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(Elidable & HasOpcodeIn(STA, STX, SAX, STY, STZ) & RefersTo("__reg", 3) & DoesntMatterWhatItDoesWithReg(3)) ~~> (_.tail),
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(Elidable & HasOpcodeIn(ROL, ROR, ASL, LSR) & RefersTo("__reg", 0) & DoesntMatterWhatItDoesWithReg(0) & DoesntMatterWhatItDoesWith(State.C, State.N, State.Z)) ~~> (_.tail),
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(Elidable & HasOpcodeIn(ROL, ROR, ASL, LSR) & RefersTo("__reg", 1) & DoesntMatterWhatItDoesWithReg(1) & DoesntMatterWhatItDoesWith(State.C, State.N, State.Z)) ~~> (_.tail),
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(Elidable & HasOpcodeIn(ROL, ROR, ASL, LSR) & RefersTo("__reg", 2) & DoesntMatterWhatItDoesWithReg(2) & DoesntMatterWhatItDoesWith(State.C, State.N, State.Z)) ~~> (_.tail),
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(Elidable & HasOpcodeIn(ROL, ROR, ASL, LSR) & RefersTo("__reg", 3) & DoesntMatterWhatItDoesWithReg(3) & DoesntMatterWhatItDoesWith(State.C, State.N, State.Z)) ~~> (_.tail),
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(Elidable & HasOpcodeIn(INC, DEC) & RefersTo("__reg", 0) & DoesntMatterWhatItDoesWithReg(0) & DoesntMatterWhatItDoesWith(State.N, State.Z)) ~~> (_.tail),
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(Elidable & HasOpcodeIn(INC, DEC) & RefersTo("__reg", 1) & DoesntMatterWhatItDoesWithReg(1) & DoesntMatterWhatItDoesWith(State.N, State.Z)) ~~> (_.tail),
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(Elidable & HasOpcodeIn(INC, DEC) & RefersTo("__reg", 2) & DoesntMatterWhatItDoesWithReg(2) & DoesntMatterWhatItDoesWith(State.N, State.Z)) ~~> (_.tail),
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(Elidable & HasOpcodeIn(INC, DEC) & RefersTo("__reg", 3) & DoesntMatterWhatItDoesWithReg(3) & DoesntMatterWhatItDoesWith(State.N, State.Z)) ~~> (_.tail),
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(Elidable & HasOpcode(LDY) & RefersTo("__reg", 0)) ~
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(Elidable & HasOpcode(LDY) & RefersTo("__reg", 0)) ~
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(Linear & Not(ConcernsY) & Not(RefersToOrUses("__reg", 0))).*.capture(2) ~
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(Linear & Not(ConcernsY) & Not(RefersToOrUses("__reg", 0))).*.capture(2) ~
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@ -238,9 +264,20 @@ object ZeropageRegisterOptimizations {
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})
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})
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)
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)
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val LoadingKnownValue = new RuleBasedAssemblyOptimization("Loading known value from register",
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needsFlowInfo = FlowInfoRequirement.ForwardFlow,
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MultipleAssemblyRules((0 to 4).map{ zregIndex =>
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(Elidable & HasOpcodeIn(LDA, ADC, SBC, CMP, EOR, AND, ORA, LDX, LDY, CPX, CPY) & RefersToOrUses("__reg", zregIndex) & MatchZpReg(1, zregIndex)) ~~> { (code, ctx) =>
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List(AssemblyLine.immediate(code.head.opcode, ctx.get[Int](1)))
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}
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})
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)
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val All: List[AssemblyOptimization[AssemblyLine]] = List(
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val All: List[AssemblyOptimization[AssemblyLine]] = List(
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ConstantDecimalMath,
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ConstantDecimalMath,
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ConstantMultiplication,
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ConstantMultiplication,
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ConstantInlinedMultiplication,
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LoadingKnownValue,
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DeadRegStore,
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DeadRegStore,
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DeadRegStoreFromFlow,
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DeadRegStoreFromFlow,
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PointlessLoad,
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PointlessLoad,
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@ -344,11 +344,11 @@ object AlwaysGoodI80Optimizations {
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val SimplifiableMaths = new RuleBasedAssemblyOptimization("Simplifiable maths",
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val SimplifiableMaths = new RuleBasedAssemblyOptimization("Simplifiable maths",
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needsFlowInfo = FlowInfoRequirement.BothFlows,
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needsFlowInfo = FlowInfoRequirement.BothFlows,
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for6Registers(register =>
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for7Registers(register =>
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(Elidable & HasOpcode(ADD) & MatchRegister(ZRegister.A, 0) & HasRegisterParam(register) & MatchRegister(register, 1) &
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(Elidable & HasOpcode(ADD) & MatchRegister(ZRegister.A, 0) & HasRegisterParam(register) & MatchRegister(register, 1) &
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DoesntMatterWhatItDoesWithFlags) ~~> ((code, ctx) => List(ZLine.ldImm8(ZRegister.A, (ctx.get[Int](0) + ctx.get[Int](1)) & 0xff))),
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DoesntMatterWhatItDoesWithFlags) ~~> ((code, ctx) => List(ZLine.ldImm8(ZRegister.A, (ctx.get[Int](0) + ctx.get[Int](1)) & 0xff))),
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),
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),
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for6Registers(register =>
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for7Registers(register =>
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(Elidable & HasOpcode(ADD) & MatchRegister(ZRegister.A, 0) & HasRegisterParam(register) & MatchRegister(register, 1)) ~
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(Elidable & HasOpcode(ADD) & MatchRegister(ZRegister.A, 0) & HasRegisterParam(register) & MatchRegister(register, 1)) ~
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(Elidable & HasOpcode(DAA) & DoesntMatterWhatItDoesWithFlags) ~~> {(code, ctx) =>
|
(Elidable & HasOpcode(DAA) & DoesntMatterWhatItDoesWithFlags) ~~> {(code, ctx) =>
|
||||||
List(ZLine.ldImm8(ZRegister.A, asDecimal(ctx.get[Int](0) & 0xff, ctx.get[Int](1) & 0xff, _ + _).toInt & 0xff))
|
List(ZLine.ldImm8(ZRegister.A, asDecimal(ctx.get[Int](0) & 0xff, ctx.get[Int](1) & 0xff, _ + _).toInt & 0xff))
|
||||||
@ -829,7 +829,7 @@ object AlwaysGoodI80Optimizations {
|
|||||||
|
|
||||||
val UnusedCodeRemoval = new RuleBasedAssemblyOptimization("Unreachable code removal",
|
val UnusedCodeRemoval = new RuleBasedAssemblyOptimization("Unreachable code removal",
|
||||||
needsFlowInfo = FlowInfoRequirement.NoRequirement,
|
needsFlowInfo = FlowInfoRequirement.NoRequirement,
|
||||||
(HasOpcodeIn(Set(JP, JR)) & HasRegisters(NoRegisters)) ~ (Not(HasOpcode(LABEL)) & Elidable).+ ~~> (c => c.head :: Nil)
|
(HasOpcodeIn(Set(JP, JR)) & IsUnconditional) ~ (Not(HasOpcode(LABEL)) & Elidable).+ ~~> (c => c.head :: Nil)
|
||||||
)
|
)
|
||||||
|
|
||||||
val UnusedLabelRemoval = new RuleBasedAssemblyOptimization("Unused label removal",
|
val UnusedLabelRemoval = new RuleBasedAssemblyOptimization("Unused label removal",
|
||||||
@ -1049,7 +1049,9 @@ object AlwaysGoodI80Optimizations {
|
|||||||
|
|
||||||
val ConstantMultiplication = new RuleBasedAssemblyOptimization("Constant multiplication",
|
val ConstantMultiplication = new RuleBasedAssemblyOptimization("Constant multiplication",
|
||||||
needsFlowInfo = FlowInfoRequirement.BothFlows,
|
needsFlowInfo = FlowInfoRequirement.BothFlows,
|
||||||
(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
|
(Elidable & HasOpcode(CALL)
|
||||||
|
& IsUnconditional
|
||||||
|
& RefersTo("__mul_u8u8u8", 0)
|
||||||
& MatchRegister(ZRegister.A, 4)
|
& MatchRegister(ZRegister.A, 4)
|
||||||
& MatchRegister(ZRegister.D, 5)
|
& MatchRegister(ZRegister.D, 5)
|
||||||
& DoesntMatterWhatItDoesWithFlags
|
& DoesntMatterWhatItDoesWithFlags
|
||||||
@ -1058,69 +1060,91 @@ object AlwaysGoodI80Optimizations {
|
|||||||
List(ZLine.ldImm8(ZRegister.A, product))
|
List(ZLine.ldImm8(ZRegister.A, product))
|
||||||
},
|
},
|
||||||
|
|
||||||
(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
|
(Elidable & HasOpcode(CALL)
|
||||||
|
& IsUnconditional
|
||||||
|
& RefersTo("__mul_u8u8u8", 0)
|
||||||
& (HasRegister(ZRegister.D, 0) | HasRegister(ZRegister.A, 0))
|
& (HasRegister(ZRegister.D, 0) | HasRegister(ZRegister.A, 0))
|
||||||
& DoesntMatterWhatItDoesWithFlags
|
& DoesntMatterWhatItDoesWithFlags
|
||||||
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
||||||
List(ZLine.ldImm8(ZRegister.A, 0))
|
List(ZLine.ldImm8(ZRegister.A, 0))
|
||||||
},
|
},
|
||||||
|
|
||||||
(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
|
(Elidable & HasOpcode(CALL)
|
||||||
|
& IsUnconditional
|
||||||
|
& RefersTo("__mul_u8u8u8", 0)
|
||||||
& HasRegister(ZRegister.D, 1)
|
& HasRegister(ZRegister.D, 1)
|
||||||
& DoesntMatterWhatItDoesWithFlags
|
& DoesntMatterWhatItDoesWithFlags
|
||||||
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
||||||
Nil
|
Nil
|
||||||
},
|
},
|
||||||
(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
|
(Elidable & HasOpcode(CALL)
|
||||||
|
& IsUnconditional
|
||||||
|
& RefersTo("__mul_u8u8u8", 0)
|
||||||
& HasRegister(ZRegister.D, 2)
|
& HasRegister(ZRegister.D, 2)
|
||||||
& DoesntMatterWhatItDoesWithFlags
|
& DoesntMatterWhatItDoesWithFlags
|
||||||
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
||||||
List(ZLine.register(ADD, ZRegister.A))
|
List(ZLine.register(ADD, ZRegister.A))
|
||||||
},
|
},
|
||||||
(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
|
(Elidable & HasOpcode(CALL)
|
||||||
|
& IsUnconditional
|
||||||
|
& RefersTo("__mul_u8u8u8", 0)
|
||||||
& HasRegister(ZRegister.D, 4)
|
& HasRegister(ZRegister.D, 4)
|
||||||
& DoesntMatterWhatItDoesWithFlags
|
& DoesntMatterWhatItDoesWithFlags
|
||||||
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
||||||
List(ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A))
|
List(ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A))
|
||||||
},
|
},
|
||||||
(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
|
(Elidable & HasOpcode(CALL)
|
||||||
|
& IsUnconditional
|
||||||
|
& RefersTo("__mul_u8u8u8", 0)
|
||||||
& HasRegister(ZRegister.D, 8)
|
& HasRegister(ZRegister.D, 8)
|
||||||
& DoesntMatterWhatItDoesWithFlags
|
& DoesntMatterWhatItDoesWithFlags
|
||||||
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
||||||
List(ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A))
|
List(ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A))
|
||||||
},
|
},
|
||||||
(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
|
(Elidable & HasOpcode(CALL)
|
||||||
|
& IsUnconditional
|
||||||
|
& RefersTo("__mul_u8u8u8", 0)
|
||||||
& HasRegister(ZRegister.D, 16)
|
& HasRegister(ZRegister.D, 16)
|
||||||
& DoesntMatterWhatItDoesWithFlags
|
& DoesntMatterWhatItDoesWithFlags
|
||||||
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
||||||
List(ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A))
|
List(ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A))
|
||||||
},
|
},
|
||||||
|
|
||||||
(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
|
(Elidable & HasOpcode(CALL)
|
||||||
|
& IsUnconditional
|
||||||
|
& RefersTo("__mul_u8u8u8", 0)
|
||||||
& HasRegister(ZRegister.A, 1)
|
& HasRegister(ZRegister.A, 1)
|
||||||
& DoesntMatterWhatItDoesWithFlags
|
& DoesntMatterWhatItDoesWithFlags
|
||||||
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
||||||
List(ZLine.ld8(ZRegister.A, ZRegister.D))
|
List(ZLine.ld8(ZRegister.A, ZRegister.D))
|
||||||
},
|
},
|
||||||
(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
|
(Elidable & HasOpcode(CALL)
|
||||||
|
& IsUnconditional
|
||||||
|
& RefersTo("__mul_u8u8u8", 0)
|
||||||
& HasRegister(ZRegister.A, 2)
|
& HasRegister(ZRegister.A, 2)
|
||||||
& DoesntMatterWhatItDoesWithFlags
|
& DoesntMatterWhatItDoesWithFlags
|
||||||
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
||||||
List(ZLine.ld8(ZRegister.A, ZRegister.D), ZLine.register(ADD, ZRegister.A))
|
List(ZLine.ld8(ZRegister.A, ZRegister.D), ZLine.register(ADD, ZRegister.A))
|
||||||
},
|
},
|
||||||
(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
|
(Elidable & HasOpcode(CALL)
|
||||||
|
& IsUnconditional
|
||||||
|
& RefersTo("__mul_u8u8u8", 0)
|
||||||
& HasRegister(ZRegister.A, 4)
|
& HasRegister(ZRegister.A, 4)
|
||||||
& DoesntMatterWhatItDoesWithFlags
|
& DoesntMatterWhatItDoesWithFlags
|
||||||
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
||||||
List(ZLine.ld8(ZRegister.A, ZRegister.D), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A))
|
List(ZLine.ld8(ZRegister.A, ZRegister.D), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A))
|
||||||
},
|
},
|
||||||
(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
|
(Elidable & HasOpcode(CALL)
|
||||||
|
& IsUnconditional
|
||||||
|
& RefersTo("__mul_u8u8u8", 0)
|
||||||
& HasRegister(ZRegister.A, 8)
|
& HasRegister(ZRegister.A, 8)
|
||||||
& DoesntMatterWhatItDoesWithFlags
|
& DoesntMatterWhatItDoesWithFlags
|
||||||
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
||||||
List(ZLine.ld8(ZRegister.A, ZRegister.D), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A))
|
List(ZLine.ld8(ZRegister.A, ZRegister.D), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A))
|
||||||
},
|
},
|
||||||
(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
|
(Elidable & HasOpcode(CALL)
|
||||||
|
& IsUnconditional
|
||||||
|
& RefersTo("__mul_u8u8u8", 0)
|
||||||
& HasRegister(ZRegister.A, 16)
|
& HasRegister(ZRegister.A, 16)
|
||||||
& DoesntMatterWhatItDoesWithFlags
|
& DoesntMatterWhatItDoesWithFlags
|
||||||
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
||||||
@ -1129,20 +1153,126 @@ object AlwaysGoodI80Optimizations {
|
|||||||
|
|
||||||
(Elidable & Is8BitLoad(D, A)) ~
|
(Elidable & Is8BitLoad(D, A)) ~
|
||||||
(Elidable & Is8BitLoad(A, IMM_8)) ~
|
(Elidable & Is8BitLoad(A, IMM_8)) ~
|
||||||
(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
|
(Elidable & HasOpcode(CALL) & IsUnconditional & RefersTo("__mul_u8u8u8", 0)
|
||||||
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
|
||||||
List(code(1).copy(registers = TwoRegisters(D, IMM_8)), code(2))
|
List(code(1).copy(registers = TwoRegisters(D, IMM_8)), code(2))
|
||||||
},
|
},
|
||||||
)
|
)
|
||||||
|
|
||||||
|
val ConstantInlinedShifting = new RuleBasedAssemblyOptimization("Constant multiplication",
|
||||||
|
needsFlowInfo = FlowInfoRequirement.BothFlows,
|
||||||
|
|
||||||
|
// TODO: set limits on the loop iteration to avoid huge unrolled code
|
||||||
|
// TODO: non-Z80 code without DJNZ
|
||||||
|
|
||||||
|
(Elidable & IsLabelMatching(2) & MatchRegister(ZRegister.B, 1)) ~
|
||||||
|
Where(ctx => ctx.get[Int](1) > 0) ~
|
||||||
|
(Elidable & HasOpcodeIn(Set(ADD, SLA, SRL, SLL, RLC, RLCA, RRC, RRCA, RR, RL, RLA, RRA)) & Not(HasRegisterParam(ZRegister.B))).*.capture(5) ~
|
||||||
|
(Elidable & HasOpcode(DJNZ) & MatchJumpTarget(2) & DoesntMatterWhatItDoesWithFlags) ~~> { (code, ctx) =>
|
||||||
|
val iter = ctx.get[Int](1)
|
||||||
|
val code = ctx.get[List[ZLine]](5)
|
||||||
|
List.fill(iter)(code).flatten :+ ZLine.ldImm8(ZRegister.B, 0)
|
||||||
|
},
|
||||||
|
|
||||||
|
(Elidable & HasOpcodeIn(Set(JP, JR)) & MatchJumpTarget(3) & IsUnconditional & MatchRegister(ZRegister.B, 1)) ~
|
||||||
|
DebugMatching ~
|
||||||
|
(Elidable & IsLabelMatching(2)) ~
|
||||||
|
(Elidable & HasOpcodeIn(Set(ADD, SLA, SRL, SLL, RLC, RLCA, RRC, RRCA, RR, RL, RLA, RRA)) & Not(HasRegisterParam(ZRegister.B))).*.capture(5) ~
|
||||||
|
(Elidable & IsLabelMatching(3)) ~
|
||||||
|
(Elidable & HasOpcode(DJNZ) & MatchJumpTarget(2) & DoesntMatterWhatItDoesWithFlags) ~~> { (code, ctx) =>
|
||||||
|
val iter = ctx.get[Int](1).-(1).&(0xff)
|
||||||
|
val code = ctx.get[List[ZLine]](5)
|
||||||
|
List.fill(iter)(code).flatten :+ ZLine.ldImm8(ZRegister.B, 0)
|
||||||
|
},
|
||||||
|
|
||||||
|
)
|
||||||
|
|
||||||
|
val ShiftingKnownValue = new RuleBasedAssemblyOptimization("Shifting known value",
|
||||||
|
needsFlowInfo = FlowInfoRequirement.BothFlows,
|
||||||
|
|
||||||
|
for7Registers(register =>
|
||||||
|
(Elidable & HasOpcode(SLA) & HasRegisterParam(register) & MatchRegister(register, 1) & DoesntMatterWhatItDoesWithFlags) ~~> {(code,ctx) =>
|
||||||
|
val value = ctx.get[Int](1)
|
||||||
|
List(ZLine.ldImm8(register, value.<<(1).&(0xff)))
|
||||||
|
}
|
||||||
|
),
|
||||||
|
|
||||||
|
(Elidable & HasOpcode(ADD) & HasRegisterParam(ZRegister.A) & MatchRegister(ZRegister.A, 1) & DoesntMatterWhatItDoesWithFlags) ~~> {(code,ctx) =>
|
||||||
|
val value = ctx.get[Int](1)
|
||||||
|
List(ZLine.ldImm8(ZRegister.A, value.<<(1).&(0xff)))
|
||||||
|
},
|
||||||
|
|
||||||
|
(Elidable & HasOpcode(ADD_16) & HasRegisterParam(ZRegister.HL) & MatchRegister(ZRegister.HL, 1) & DoesntMatterWhatItDoesWithFlags) ~~> {(code,ctx) =>
|
||||||
|
val value = ctx.get[Int](1)
|
||||||
|
List(ZLine.ldImm16(ZRegister.HL, value.<<(1).&(0xffff)))
|
||||||
|
},
|
||||||
|
|
||||||
|
for7Registers(register =>
|
||||||
|
(Elidable & HasOpcode(SLA) & HasRegisterParam(register) & MatchRegister(register, 1) & DoesntMatterWhatItDoesWithFlagsExceptCarry) ~~> {(code,ctx) =>
|
||||||
|
val value = ctx.get[Int](1)
|
||||||
|
if (value.&(0x80) != 0) {
|
||||||
|
List(ZLine.ldImm8(register, value.<<(1).&(0xff)), ZLine.implied(SCF))
|
||||||
|
} else {
|
||||||
|
List(ZLine.ldImm8(register, value.<<(1).&(0xff)), ZLine.register(OR, ZRegister.A))
|
||||||
|
}
|
||||||
|
}
|
||||||
|
),
|
||||||
|
|
||||||
|
for7Registers(register =>
|
||||||
|
(Elidable & HasOpcode(RL) & HasRegisterParam(register) & HasSet(ZFlag.C) & MatchRegister(register, 1) & DoesntMatterWhatItDoesWithFlags) ~~> { (code, ctx) =>
|
||||||
|
val value = ctx.get[Int](1)
|
||||||
|
List(ZLine.ldImm8(register, value.<<(1).&(0xff).+(1)))
|
||||||
|
}
|
||||||
|
),
|
||||||
|
|
||||||
|
for7Registers(register =>
|
||||||
|
(Elidable & HasOpcode(RL) & HasRegisterParam(register) & HasClear(ZFlag.C) & MatchRegister(register, 1) & DoesntMatterWhatItDoesWithFlags) ~~> { (code, ctx) =>
|
||||||
|
val value = ctx.get[Int](1)
|
||||||
|
List(ZLine.ldImm8(register, value.<<(1).&(0xff)))
|
||||||
|
}
|
||||||
|
),
|
||||||
|
|
||||||
|
for7Registers(register =>
|
||||||
|
(Elidable & HasOpcode(RL) & HasRegisterParam(register) & HasSet(ZFlag.C) & MatchRegister(register, 1) & DoesntMatterWhatItDoesWithFlagsExceptCarry) ~~> { (code, ctx) =>
|
||||||
|
val value = ctx.get[Int](1)
|
||||||
|
if (value.&(0x80) != 0) {
|
||||||
|
List(ZLine.ldImm8(register, value.<<(1).&(0xff).+(1)), ZLine.implied(SCF))
|
||||||
|
} else {
|
||||||
|
List(ZLine.ldImm8(register, value.<<(1).&(0xff).+(1)), ZLine.register(OR, ZRegister.A))
|
||||||
|
}
|
||||||
|
}
|
||||||
|
),
|
||||||
|
|
||||||
|
for7Registers(register =>
|
||||||
|
(Elidable & HasOpcode(RL) & HasRegisterParam(register) & HasClear(ZFlag.C) & MatchRegister(register, 1) & DoesntMatterWhatItDoesWithFlagsExceptCarry) ~~> { (code, ctx) =>
|
||||||
|
val value = ctx.get[Int](1)
|
||||||
|
if (value.&(0x80) != 0) {
|
||||||
|
List(ZLine.ldImm8(register, value.<<(1).&(0xff)), ZLine.implied(SCF))
|
||||||
|
} else {
|
||||||
|
List(ZLine.ldImm8(register, value.<<(1).&(0xff)), ZLine.register(OR, ZRegister.A))
|
||||||
|
}
|
||||||
|
}
|
||||||
|
),
|
||||||
|
)
|
||||||
|
|
||||||
|
val PointlessFlagChange = new RuleBasedAssemblyOptimization("Pointless flag change",
|
||||||
|
needsFlowInfo = FlowInfoRequirement.BackwardFlow,
|
||||||
|
(Elidable & HasOpcode(SCF) & DoesntMatterWhatItDoesWithFlags) ~~> (_ => Nil),
|
||||||
|
(Elidable & HasOpcode(CCF) & DoesntMatterWhatItDoesWithFlags) ~~> (_ => Nil),
|
||||||
|
(Elidable & HasOpcodeIn(Set(OR, AND)) & HasRegisterParam(ZRegister.A) & DoesntMatterWhatItDoesWithFlags) ~~> (_ => Nil),
|
||||||
|
)
|
||||||
|
|
||||||
val All: List[AssemblyOptimization[ZLine]] = List[AssemblyOptimization[ZLine]](
|
val All: List[AssemblyOptimization[ZLine]] = List[AssemblyOptimization[ZLine]](
|
||||||
BranchInPlaceRemoval,
|
BranchInPlaceRemoval,
|
||||||
ConstantMultiplication,
|
ConstantMultiplication,
|
||||||
|
ConstantInlinedShifting,
|
||||||
FreeHL,
|
FreeHL,
|
||||||
PointlessArithmetic,
|
PointlessArithmetic,
|
||||||
|
PointlessFlagChange,
|
||||||
PointlessLoad,
|
PointlessLoad,
|
||||||
PointlessStackStashing,
|
PointlessStackStashing,
|
||||||
ReloadingKnownValueFromMemory,
|
ReloadingKnownValueFromMemory,
|
||||||
|
ShiftingKnownValue,
|
||||||
SimplifiableMaths,
|
SimplifiableMaths,
|
||||||
SimplifiableShifting,
|
SimplifiableShifting,
|
||||||
UnusedCodeRemoval,
|
UnusedCodeRemoval,
|
||||||
|
@ -86,17 +86,17 @@ object CoarseFlowAnalyzer {
|
|||||||
nf = Status.SingleTrue, cf = AnyStatus, zf = AnyStatus, sf = AnyStatus, pf = AnyStatus, hf = AnyStatus)
|
nf = Status.SingleTrue, cf = AnyStatus, zf = AnyStatus, sf = AnyStatus, pf = AnyStatus, hf = AnyStatus)
|
||||||
case ZLine(AND, OneRegister(s), _, _) =>
|
case ZLine(AND, OneRegister(s), _, _) =>
|
||||||
currentStatus = currentStatus.copy(a = (currentStatus.a <*> currentStatus.getRegister(s)) ((m, n) => (m & n) & 0xff),
|
currentStatus = currentStatus.copy(a = (currentStatus.a <*> currentStatus.getRegister(s)) ((m, n) => (m & n) & 0xff),
|
||||||
nf = Status.SingleFalse, cf = AnyStatus, zf = AnyStatus, sf = AnyStatus, pf = AnyStatus, hf = AnyStatus)
|
nf = Status.SingleFalse, cf = Status.SingleFalse, zf = AnyStatus, sf = AnyStatus, pf = AnyStatus, hf = AnyStatus)
|
||||||
case ZLine(OR, OneRegister(ZRegister.A), _, _) =>
|
case ZLine(OR, OneRegister(ZRegister.A), _, _) =>
|
||||||
currentStatus = currentStatus.copy(nf = Status.SingleFalse, cf = Status.SingleFalse, zf = AnyStatus, sf = AnyStatus, pf = AnyStatus, hf = AnyStatus)
|
currentStatus = currentStatus.copy(nf = Status.SingleFalse, cf = Status.SingleFalse, zf = AnyStatus, sf = AnyStatus, pf = AnyStatus, hf = AnyStatus)
|
||||||
case ZLine(XOR, OneRegister(ZRegister.A), _, _) =>
|
case ZLine(XOR, OneRegister(ZRegister.A), _, _) =>
|
||||||
currentStatus = currentStatus.copy(a = Status.SingleZero, nf = Status.SingleFalse, cf = Status.SingleFalse, zf = Status.SingleTrue, sf = Status.SingleFalse, pf = AnyStatus, hf = AnyStatus)
|
currentStatus = currentStatus.copy(a = Status.SingleZero, nf = Status.SingleFalse, cf = Status.SingleFalse, zf = Status.SingleTrue, sf = Status.SingleFalse, pf = AnyStatus, hf = AnyStatus)
|
||||||
case ZLine(OR, OneRegister(s), _, _) =>
|
case ZLine(OR, OneRegister(s), _, _) =>
|
||||||
currentStatus = currentStatus.copy(a = (currentStatus.a <*> currentStatus.getRegister(s)) ((m, n) => (m | n) & 0xff),
|
currentStatus = currentStatus.copy(a = (currentStatus.a <*> currentStatus.getRegister(s)) ((m, n) => (m | n) & 0xff),
|
||||||
nf = Status.SingleFalse, cf = AnyStatus, zf = AnyStatus, sf = AnyStatus, pf = AnyStatus, hf = AnyStatus)
|
nf = Status.SingleFalse, cf = Status.SingleFalse, zf = AnyStatus, sf = AnyStatus, pf = AnyStatus, hf = AnyStatus)
|
||||||
case ZLine(XOR, OneRegister(s), _, _) =>
|
case ZLine(XOR, OneRegister(s), _, _) =>
|
||||||
currentStatus = currentStatus.copy(a = (currentStatus.a <*> currentStatus.getRegister(s)) ((m, n) => (m ^ n) & 0xff),
|
currentStatus = currentStatus.copy(a = (currentStatus.a <*> currentStatus.getRegister(s)) ((m, n) => (m ^ n) & 0xff),
|
||||||
nf = Status.SingleFalse, cf = AnyStatus, zf = AnyStatus, sf = AnyStatus, pf = AnyStatus, hf = AnyStatus)
|
nf = Status.SingleFalse, cf = Status.SingleFalse, zf = AnyStatus, sf = AnyStatus, pf = AnyStatus, hf = AnyStatus)
|
||||||
|
|
||||||
case ZLine(INC, OneRegister(r), _, _) =>
|
case ZLine(INC, OneRegister(r), _, _) =>
|
||||||
currentStatus = currentStatus.
|
currentStatus = currentStatus.
|
||||||
@ -162,8 +162,10 @@ object CoarseFlowAnalyzer {
|
|||||||
zf = AnyStatus,
|
zf = AnyStatus,
|
||||||
pf = AnyStatus, hf = Status.SingleFalse)
|
pf = AnyStatus, hf = Status.SingleFalse)
|
||||||
|
|
||||||
case ZLine(SCF, _, _, _) => currentStatus.copy(cf = Status.SingleTrue, hf = Status.SingleFalse, nf = Status.SingleFalse)
|
case ZLine(SCF, _, _, _) =>
|
||||||
case ZLine(CCF, _, _, _) => currentStatus.copy(cf = currentStatus.cf.negate, hf = AnyStatus, nf = AnyStatus)
|
currentStatus = currentStatus.copy(cf = Status.SingleTrue, hf = Status.SingleFalse, nf = Status.SingleFalse)
|
||||||
|
case ZLine(CCF, _, _, _) =>
|
||||||
|
currentStatus = currentStatus.copy(cf = currentStatus.cf.negate, hf = AnyStatus, nf = AnyStatus)
|
||||||
|
|
||||||
case ZLine(opcode, registers, _, _) =>
|
case ZLine(opcode, registers, _, _) =>
|
||||||
currentStatus = currentStatus.copy(cf = AnyStatus, zf = AnyStatus, sf = AnyStatus, pf = AnyStatus, hf = AnyStatus)
|
currentStatus = currentStatus.copy(cf = AnyStatus, zf = AnyStatus, sf = AnyStatus, pf = AnyStatus, hf = AnyStatus)
|
||||||
|
@ -231,7 +231,7 @@ object ReverseFlowAnalyzer {
|
|||||||
case ZLine(DISCARD_A, _, _, _) =>
|
case ZLine(DISCARD_A, _, _, _) =>
|
||||||
currentImportance = currentImportance.copy(a = Unimportant)
|
currentImportance = currentImportance.copy(a = Unimportant)
|
||||||
case ZLine(DISCARD_F, _, _, _) =>
|
case ZLine(DISCARD_F, _, _, _) =>
|
||||||
currentImportance = currentImportance.copy(cf = Unimportant, zf = Unimportant, sf = Unimportant, pf = Unimportant, hf = Unimportant)
|
currentImportance = currentImportance.copy(cf = Unimportant, zf = Unimportant, sf = Unimportant, pf = Unimportant, hf = Unimportant, nf = Unimportant)
|
||||||
case ZLine(LD, TwoRegistersOffset(t, s, o), _, _) =>
|
case ZLine(LD, TwoRegistersOffset(t, s, o), _, _) =>
|
||||||
currentImportance = currentImportance.butWritesRegister(t, o).butReadsRegister(s, o)
|
currentImportance = currentImportance.butWritesRegister(t, o).butReadsRegister(s, o)
|
||||||
case ZLine(LD | LD_16, TwoRegisters(t, s), _, _) =>
|
case ZLine(LD | LD_16, TwoRegisters(t, s), _, _) =>
|
||||||
@ -448,6 +448,8 @@ object ReverseFlowAnalyzer {
|
|||||||
currentImportance = currentImportance.butReadsRegister(r).copy(cf = Unimportant, zf = Unimportant, hf = Unimportant, nf = Unimportant, pf = Unimportant)
|
currentImportance = currentImportance.butReadsRegister(r).copy(cf = Unimportant, zf = Unimportant, hf = Unimportant, nf = Unimportant, pf = Unimportant)
|
||||||
case ZLine(RLA | RRA | RLCA | RRCA, _, _, _) =>
|
case ZLine(RLA | RRA | RLCA | RRCA, _, _, _) =>
|
||||||
currentImportance = currentImportance.butReadsRegister(ZRegister.A).copy(cf = Important, hf = Unimportant, nf = Unimportant)
|
currentImportance = currentImportance.butReadsRegister(ZRegister.A).copy(cf = Important, hf = Unimportant, nf = Unimportant)
|
||||||
|
case ZLine(SCF, _, _, _) =>
|
||||||
|
currentImportance = currentImportance.copy(cf = Unimportant, hf = Unimportant, nf = Unimportant)
|
||||||
case _ =>
|
case _ =>
|
||||||
currentImportance = finalImportance // TODO
|
currentImportance = finalImportance // TODO
|
||||||
}
|
}
|
||||||
|
@ -553,6 +553,11 @@ case class MatchParameter(i: Int) extends AssemblyLinePattern {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
case class IsLabelMatching(i: Int) extends AssemblyLinePattern {
|
||||||
|
override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: ZLine): Boolean =
|
||||||
|
line.opcode == ZOpcode.LABEL && ctx.addObject(i, line.parameter.quickSimplify)
|
||||||
|
}
|
||||||
|
|
||||||
case class MatchParameterOrNothing(i: Int) extends AssemblyLinePattern {
|
case class MatchParameterOrNothing(i: Int) extends AssemblyLinePattern {
|
||||||
override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: ZLine): Boolean =
|
override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: ZLine): Boolean =
|
||||||
ctx.addObject(i, line.parameter.quickSimplify)
|
ctx.addObject(i, line.parameter.quickSimplify)
|
||||||
@ -566,6 +571,11 @@ case class MatchJumpTarget(i: Int) extends AssemblyLinePattern {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
case object IsUnconditional extends AssemblyLinePattern {
|
||||||
|
override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: ZLine): Boolean =
|
||||||
|
line.registers == NoRegisters
|
||||||
|
}
|
||||||
|
|
||||||
case class MatchConstantInHL(i: Int) extends AssemblyLinePattern {
|
case class MatchConstantInHL(i: Int) extends AssemblyLinePattern {
|
||||||
override def validate(needsFlowInfo: FlowInfoRequirement.Value): Unit =
|
override def validate(needsFlowInfo: FlowInfoRequirement.Value): Unit =
|
||||||
FlowInfoRequirement.assertForward(needsFlowInfo)
|
FlowInfoRequirement.assertForward(needsFlowInfo)
|
||||||
|
@ -100,6 +100,14 @@ abstract class CallGraph(program: Program, log: Logger) {
|
|||||||
everCalledFunctions ++= entryPoints
|
everCalledFunctions ++= entryPoints
|
||||||
callEdges.filter(e => entryPoints.contains(e._1)).foreach(e => everCalledFunctions += e._2)
|
callEdges.filter(e => entryPoints.contains(e._1)).foreach(e => everCalledFunctions += e._2)
|
||||||
multiaccessibleFunctions ++= callEdges.filter(e => entryPoints.contains(e._1)).map(_._2).groupBy(identity).filter(p => p._2.size > 1).keys
|
multiaccessibleFunctions ++= callEdges.filter(e => entryPoints.contains(e._1)).map(_._2).groupBy(identity).filter(p => p._2.size > 1).keys
|
||||||
|
for {
|
||||||
|
operator <- everCalledFunctions
|
||||||
|
if operator.nonEmpty && operator.head != '_' && !operator.head.isLetterOrDigit
|
||||||
|
internal <- allFunctions
|
||||||
|
if internal.startsWith("__")
|
||||||
|
} {
|
||||||
|
callEdges += operator -> internal
|
||||||
|
}
|
||||||
|
|
||||||
if (log.traceEnabled) {
|
if (log.traceEnabled) {
|
||||||
log.trace("Call edges:")
|
log.trace("Call edges:")
|
||||||
|
@ -118,6 +118,7 @@ sealed class NiceFunctionProperty(override val toString: String)
|
|||||||
object NiceFunctionProperty {
|
object NiceFunctionProperty {
|
||||||
case object DoesntReadMemory extends NiceFunctionProperty("MR")
|
case object DoesntReadMemory extends NiceFunctionProperty("MR")
|
||||||
case object DoesntWriteMemory extends NiceFunctionProperty("MW")
|
case object DoesntWriteMemory extends NiceFunctionProperty("MW")
|
||||||
|
case object IsLeaf extends NiceFunctionProperty("LEAF")
|
||||||
}
|
}
|
||||||
|
|
||||||
object MosNiceFunctionProperty {
|
object MosNiceFunctionProperty {
|
||||||
|
@ -10,6 +10,7 @@ import millfork.assembly.z80.ZLine
|
|||||||
|
|
||||||
import scala.collection.mutable
|
import scala.collection.mutable
|
||||||
import DecimalUtils._
|
import DecimalUtils._
|
||||||
|
import millfork.node.NiceFunctionProperty.IsLeaf
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @author Karol Stasiak
|
* @author Karol Stasiak
|
||||||
@ -186,7 +187,7 @@ abstract class AbstractAssembler[T <: AbstractCode](private val program: Program
|
|||||||
else 1.2)
|
else 1.2)
|
||||||
|
|
||||||
val potentiallyInlineable: Map[String, Int] = inliningResult.potentiallyInlineableFunctions
|
val potentiallyInlineable: Map[String, Int] = inliningResult.potentiallyInlineableFunctions
|
||||||
var nonInlineableFunctions: Set[String] = inliningResult.nonInlineableFunctions
|
var functionsThatCanBeCalledFromInlinedFunctions: Set[String] = inliningResult.nonInlineableFunctions
|
||||||
|
|
||||||
env.allocateVariables(None, mem, callGraph, variableAllocators, options, labelMap.put, 1, forZpOnly = true)
|
env.allocateVariables(None, mem, callGraph, variableAllocators, options, labelMap.put, 1, forZpOnly = true)
|
||||||
env.allocateVariables(None, mem, callGraph, variableAllocators, options, labelMap.put, 2, forZpOnly = true)
|
env.allocateVariables(None, mem, callGraph, variableAllocators, options, labelMap.put, 2, forZpOnly = true)
|
||||||
@ -202,15 +203,21 @@ abstract class AbstractAssembler[T <: AbstractCode](private val program: Program
|
|||||||
val strippedCodeForInlining = for {
|
val strippedCodeForInlining = for {
|
||||||
limit <- potentiallyInlineable.get(f)
|
limit <- potentiallyInlineable.get(f)
|
||||||
if code.map(_.sizeInBytes).sum <= limit
|
if code.map(_.sizeInBytes).sum <= limit
|
||||||
s <- inliningCalculator.codeForInlining(f, nonInlineableFunctions, code)
|
s <- inliningCalculator.codeForInlining(f, functionsThatCanBeCalledFromInlinedFunctions, code)
|
||||||
} yield s
|
} yield s
|
||||||
strippedCodeForInlining match {
|
strippedCodeForInlining match {
|
||||||
case Some(c) =>
|
case Some(c) =>
|
||||||
log.debug("Inlining " + f, function.position)
|
log.debug("Inlining " + f, function.position)
|
||||||
inlinedFunctions += f -> c
|
inlinedFunctions += f -> c
|
||||||
|
val tmp = mutable.Set[(NiceFunctionProperty, String)]()
|
||||||
|
gatherNiceFunctionProperties(tmp, f, c)
|
||||||
|
if (tmp.exists(_._1 == IsLeaf)) {
|
||||||
|
functionsThatCanBeCalledFromInlinedFunctions += function.name
|
||||||
|
}
|
||||||
compiledFunctions(f) = NonexistentFunction()
|
compiledFunctions(f) = NonexistentFunction()
|
||||||
case None =>
|
case None =>
|
||||||
nonInlineableFunctions += function.name
|
log.trace("Not inlining " + f, function.position)
|
||||||
|
functionsThatCanBeCalledFromInlinedFunctions += function.name
|
||||||
compiledFunctions(f) = NormalCompiledFunction(function.declaredBank.getOrElse(platform.defaultCodeBank), code, function.address.isDefined, function.alignment)
|
compiledFunctions(f) = NormalCompiledFunction(function.declaredBank.getOrElse(platform.defaultCodeBank), code, function.address.isDefined, function.alignment)
|
||||||
optimizedCodeSize += code.map(_.sizeInBytes).sum
|
optimizedCodeSize += code.map(_.sizeInBytes).sum
|
||||||
if (options.flag(CompilationFlag.InterproceduralOptimization)) {
|
if (options.flag(CompilationFlag.InterproceduralOptimization)) {
|
||||||
|
@ -12,8 +12,11 @@ import scala.collection.mutable
|
|||||||
/**
|
/**
|
||||||
* @author Karol Stasiak
|
* @author Karol Stasiak
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
case class InliningResult(potentiallyInlineableFunctions: Map[String, Int], nonInlineableFunctions: Set[String])
|
||||||
|
|
||||||
abstract class AbstractInliningCalculator[T <: AbstractCode] {
|
abstract class AbstractInliningCalculator[T <: AbstractCode] {
|
||||||
def codeForInlining(fname: String, functionsAlreadyKnownToBeNonInlineable: Set[String], code: List[T]): Option[List[T]]
|
def codeForInlining(fname: String, functionsThatCanBeCalledFromInlinedFunctions: Set[String], code: List[T]): Option[List[T]]
|
||||||
def inline(code: List[T], inlinedFunctions: Map[String, List[T]], jobContext: JobContext): List[T]
|
def inline(code: List[T], inlinedFunctions: Map[String, List[T]], jobContext: JobContext): List[T]
|
||||||
|
|
||||||
private val sizes = Seq(64, 64, 8, 6, 5, 5, 4)
|
private val sizes = Seq(64, 64, 8, 6, 5, 5, 4)
|
||||||
|
@ -154,15 +154,20 @@ class MosAssembler(program: Program,
|
|||||||
case AssemblyLine(op, _, _, _) => !OpcodeClasses.ReadsD(op) && !OpcodeClasses.OverwritesD(op)
|
case AssemblyLine(op, _, _, _) => !OpcodeClasses.ReadsD(op) && !OpcodeClasses.OverwritesD(op)
|
||||||
}
|
}
|
||||||
genericPropertyScan(DoesntReadMemory) {
|
genericPropertyScan(DoesntReadMemory) {
|
||||||
case AssemblyLine(op, _, Implied | Immediate | WordImmediate, _) => true
|
case AssemblyLine(op, Implied | Immediate | WordImmediate, _, _) => true
|
||||||
case AssemblyLine(op, _, _, _) if OpcodeClasses.ReadsMemoryIfNotImpliedOrImmediate(op) => false
|
case AssemblyLine(op, _, _, _) if OpcodeClasses.ReadsMemoryIfNotImpliedOrImmediate(op) => false
|
||||||
case _ => true
|
case _ => true
|
||||||
}
|
}
|
||||||
genericPropertyScan(DoesntWriteMemory) {
|
genericPropertyScan(DoesntWriteMemory) {
|
||||||
case AssemblyLine(op, _, Implied | Immediate | WordImmediate, _) => true
|
case AssemblyLine(op, Implied | Immediate | WordImmediate, _, _) => true
|
||||||
case AssemblyLine(op, _, _, _) if OpcodeClasses.ChangesMemoryIfNotImplied(op) || OpcodeClasses.ChangesMemoryAlways(op) => false
|
case AssemblyLine(op, _, _, _) if OpcodeClasses.ChangesMemoryIfNotImplied(op) || OpcodeClasses.ChangesMemoryAlways(op) => false
|
||||||
case _ => true
|
case _ => true
|
||||||
}
|
}
|
||||||
|
genericPropertyScan(IsLeaf) {
|
||||||
|
case AssemblyLine(JSR | BSR, Implied | Immediate | WordImmediate, _, _) => false
|
||||||
|
case AssemblyLine(JMP, Absolute, th:Thing, _) => th.name.startsWith(".")
|
||||||
|
case _ => true
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
override def bytePseudoopcode: String = "!byte"
|
override def bytePseudoopcode: String = "!byte"
|
||||||
|
@ -13,8 +13,6 @@ import scala.collection.mutable
|
|||||||
* @author Karol Stasiak
|
* @author Karol Stasiak
|
||||||
*/
|
*/
|
||||||
|
|
||||||
case class InliningResult(potentiallyInlineableFunctions: Map[String, Int], nonInlineableFunctions: Set[String])
|
|
||||||
|
|
||||||
object MosInliningCalculator extends AbstractInliningCalculator[AssemblyLine] {
|
object MosInliningCalculator extends AbstractInliningCalculator[AssemblyLine] {
|
||||||
|
|
||||||
private val sizes = Seq(64, 64, 8, 6, 5, 5, 4)
|
private val sizes = Seq(64, 64, 8, 6, 5, 5, 4)
|
||||||
@ -22,22 +20,42 @@ object MosInliningCalculator extends AbstractInliningCalculator[AssemblyLine] {
|
|||||||
private val badOpcodes = Set(RTI, RTS, JSR, BRK, RTL, BSR, BYTE) ++ OpcodeClasses.ChangesStack
|
private val badOpcodes = Set(RTI, RTS, JSR, BRK, RTL, BSR, BYTE) ++ OpcodeClasses.ChangesStack
|
||||||
private val jumpingRelatedOpcodes = Set(LABEL, JMP) ++ OpcodeClasses.ShortBranching
|
private val jumpingRelatedOpcodes = Set(LABEL, JMP) ++ OpcodeClasses.ShortBranching
|
||||||
|
|
||||||
def codeForInlining(fname: String, functionsAlreadyKnownToBeNonInlineable: Set[String], code: List[AssemblyLine]): Option[List[AssemblyLine]] = {
|
def codeForInlining(fname: String, functionsThatCanBeCalledFromInlinedFunctions: Set[String], code: List[AssemblyLine]): Option[List[AssemblyLine]] = {
|
||||||
if (code.isEmpty) return None
|
if (code.isEmpty) return None
|
||||||
val lastOpcode = code.last.opcode
|
val localLabels = code.flatMap{
|
||||||
if (lastOpcode != RTS && lastOpcode != RTL) return None
|
case AssemblyLine(LABEL, _, MemoryAddressConstant(Label(l)), _) => Some(l)
|
||||||
|
case _ => None
|
||||||
|
}
|
||||||
|
val lastLineOfCode = code.last
|
||||||
|
lastLineOfCode match {
|
||||||
|
case AssemblyLine(RTS | RTL, _, _, _) =>
|
||||||
|
case AssemblyLine(JMP, AddrMode.Absolute, _, _) =>
|
||||||
|
case _ => return None
|
||||||
|
}
|
||||||
var result = code.init
|
var result = code.init
|
||||||
|
if (lastLineOfCode.opcode == JMP) {
|
||||||
|
result = result :+ lastLineOfCode.copy(opcode = JSR)
|
||||||
|
}
|
||||||
while (result.nonEmpty && OpcodeClasses.NoopDiscardsFlags(result.last.opcode)) {
|
while (result.nonEmpty && OpcodeClasses.NoopDiscardsFlags(result.last.opcode)) {
|
||||||
result = result.init
|
result = result.init
|
||||||
}
|
}
|
||||||
if (result.head.opcode == LABEL && result.head.parameter == Label(fname).toAddress) result = result.tail
|
if (result.head.opcode == LABEL && result.head.parameter == Label(fname).toAddress) result = result.tail
|
||||||
if (result.exists{
|
if (result.exists{
|
||||||
case AssemblyLine(op, AddrMode.Absolute | AddrMode.Relative | AddrMode.DoesNotExist, MemoryAddressConstant(Label(l)), _) if jumpingRelatedOpcodes(op) =>
|
case AssemblyLine(op, AddrMode.Absolute | AddrMode.Relative | AddrMode.DoesNotExist, MemoryAddressConstant(Label(l)), _) if jumpingRelatedOpcodes(op) =>
|
||||||
!l.startsWith(".")
|
if (!localLabels.contains(l) && !l.startsWith(".")) {
|
||||||
case AssemblyLine(JSR, AddrMode.Absolute, MemoryAddressConstant(th:ExternFunction), _) => false
|
println("Bad jump " + l)
|
||||||
|
true
|
||||||
|
} else false
|
||||||
|
case AssemblyLine(JSR, AddrMode.Absolute, MemoryAddressConstant(th:ExternFunction), _) =>
|
||||||
|
false
|
||||||
case AssemblyLine(JSR, AddrMode.Absolute, MemoryAddressConstant(th:NormalFunction), _) =>
|
case AssemblyLine(JSR, AddrMode.Absolute, MemoryAddressConstant(th:NormalFunction), _) =>
|
||||||
!functionsAlreadyKnownToBeNonInlineable(th.name)
|
if(!functionsThatCanBeCalledFromInlinedFunctions(th.name)){
|
||||||
case AssemblyLine(op, _, _, _) if jumpingRelatedOpcodes(op) || badOpcodes(op) => true
|
println("Bad call " + th)
|
||||||
|
true
|
||||||
|
} else false
|
||||||
|
case AssemblyLine(op, _, _, _) if jumpingRelatedOpcodes(op) || badOpcodes(op) =>
|
||||||
|
println("Bad opcode " + op)
|
||||||
|
true
|
||||||
case _ => false
|
case _ => false
|
||||||
}) return None
|
}) return None
|
||||||
Some(result)
|
Some(result)
|
||||||
|
@ -17,7 +17,7 @@ object Z80InliningCalculator extends AbstractInliningCalculator[ZLine] {
|
|||||||
private val badOpcodes = Set(RET, RETI, RETN, CALL, BYTE, POP, PUSH)
|
private val badOpcodes = Set(RET, RETI, RETN, CALL, BYTE, POP, PUSH)
|
||||||
private val jumpingRelatedOpcodes = Set(LABEL, JP, JR)
|
private val jumpingRelatedOpcodes = Set(LABEL, JP, JR)
|
||||||
|
|
||||||
override def codeForInlining(fname: String, functionsAlreadyKnownToBeNonInlineable: Set[String], code: List[ZLine]): Option[List[ZLine]] = {
|
override def codeForInlining(fname: String, functionsThatCanBeCalledFromInlinedFunctions: Set[String], code: List[ZLine]): Option[List[ZLine]] = {
|
||||||
if (code.isEmpty) return None
|
if (code.isEmpty) return None
|
||||||
code.last match {
|
code.last match {
|
||||||
case ZLine(RET, NoRegisters, _, _) =>
|
case ZLine(RET, NoRegisters, _, _) =>
|
||||||
@ -35,7 +35,7 @@ object Z80InliningCalculator extends AbstractInliningCalculator[ZLine] {
|
|||||||
case ZLine(CALL, _, NumericConstant(_, _), _) => false
|
case ZLine(CALL, _, NumericConstant(_, _), _) => false
|
||||||
case ZLine(JP, OneRegister(_), _, _) => false
|
case ZLine(JP, OneRegister(_), _, _) => false
|
||||||
case ZLine(CALL, _, MemoryAddressConstant(th: NormalFunction), _) =>
|
case ZLine(CALL, _, MemoryAddressConstant(th: NormalFunction), _) =>
|
||||||
!functionsAlreadyKnownToBeNonInlineable(th.name)
|
!functionsThatCanBeCalledFromInlinedFunctions(th.name)
|
||||||
case ZLine(op, _, _, _) if jumpingRelatedOpcodes(op) || badOpcodes(op) => true
|
case ZLine(op, _, _, _) if jumpingRelatedOpcodes(op) || badOpcodes(op) => true
|
||||||
case _ => false
|
case _ => false
|
||||||
}) return None
|
}) return None
|
||||||
|
47
src/test/scala/millfork/test/InliningSuite.scala
Normal file
47
src/test/scala/millfork/test/InliningSuite.scala
Normal file
@ -0,0 +1,47 @@
|
|||||||
|
package millfork.test
|
||||||
|
|
||||||
|
import millfork.Cpu
|
||||||
|
import millfork.test.emu.{EmuCrossPlatformBenchmarkRun, EmuOptimizedInlinedRun, EmuSizeOptimizedCrossPlatformRun}
|
||||||
|
import org.scalatest.{FunSuite, Matchers}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @author Karol Stasiak
|
||||||
|
*/
|
||||||
|
class InliningSuite extends FunSuite with Matchers {
|
||||||
|
|
||||||
|
test("Should inline square") {
|
||||||
|
EmuSizeOptimizedCrossPlatformRun(Cpu.Mos, Cpu.Z80)(
|
||||||
|
"""
|
||||||
|
| import zp_reg
|
||||||
|
| byte output @$c000
|
||||||
|
| inline byte square(byte x) {
|
||||||
|
| return x * x
|
||||||
|
| }
|
||||||
|
| void main () {
|
||||||
|
| output = square(6)
|
||||||
|
| }
|
||||||
|
""".stripMargin)(_.readByte(0xc000) should equal(36))
|
||||||
|
}
|
||||||
|
|
||||||
|
test("Should inline <<") {
|
||||||
|
EmuSizeOptimizedCrossPlatformRun(Cpu.Mos, Cpu.Z80)(
|
||||||
|
"""
|
||||||
|
| byte output @$c000
|
||||||
|
| word output2 @$c006
|
||||||
|
| inline byte thing(byte x) {
|
||||||
|
| return x << x
|
||||||
|
| }
|
||||||
|
| inline word sh(word x, byte y) {
|
||||||
|
| return x << y
|
||||||
|
| }
|
||||||
|
| void main () {
|
||||||
|
| output = thing(6)
|
||||||
|
| output2 = sh(84, 4)
|
||||||
|
| }
|
||||||
|
""".stripMargin) { m =>
|
||||||
|
m.readByte(0xc000) should equal(6.<<(6).&(0xff))
|
||||||
|
m.readWord(0xc006) should equal(84.<<(4).&(0xffff))
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
}
|
Loading…
Reference in New Issue
Block a user