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https://github.com/KarolS/millfork.git
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8080: Fix optimizations near ifs
This commit is contained in:
Karol Stasiak
parent
34254314a6
commit
dfda9f9283
@ -48,6 +48,8 @@ This matches both the CC65 behaviour and the return values from `readkey()`.
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* 8080/Z80: compiler crash when compiling conditions;
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* 8080/Z80: miscompilation of code after `if` statements;
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* 8080/Z80: miscompilation near multiplication;
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* Z80: miscompilation when using stack variables.
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@ -795,17 +795,20 @@ object AlwaysGoodI80Optimizations {
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val FreeHL = new RuleBasedAssemblyOptimization("Free HL",
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needsFlowInfo = FlowInfoRequirement.BackwardFlow,
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// 0
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(Elidable & Is16BitLoad(ZRegister.HL, ZRegister.IMM_16)) ~
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(Elidable & Is8BitLoadTo(ZRegister.MEM_HL) & DoesntMatterWhatItDoesWith(ZRegister.HL, ZRegister.A)) ~~> (code =>
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List(
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code(1).copy(registers = TwoRegisters(ZRegister.A, code(1).registers.asInstanceOf[TwoRegisters].source)),
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code.head.copy(opcode = LD, registers = TwoRegisters(ZRegister.MEM_ABS_8, ZRegister.A)),
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)),
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// 1
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(Elidable & Is16BitLoad(ZRegister.HL, ZRegister.IMM_16)) ~
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(Elidable & Is8BitLoad(ZRegister.A, ZRegister.MEM_HL) & DoesntMatterWhatItDoesWith(ZRegister.HL)) ~~> (code =>
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List(
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code.head.copy(opcode = LD, registers = TwoRegisters(ZRegister.A, ZRegister.MEM_ABS_8)),
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)),
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// 2
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(Elidable & Is16BitLoad(ZRegister.HL, ZRegister.IMM_16)) ~
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(Elidable & IsRegular8BitLoadFrom(ZRegister.MEM_HL) & DoesntMatterWhatItDoesWith(ZRegister.HL) & DoesntMatterWhatItDoesWith(ZRegister.A)) ~~> (code =>
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List(
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@ -813,12 +816,14 @@ object AlwaysGoodI80Optimizations {
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code(1).copy(registers = TwoRegisters(code(1).registers.asInstanceOf[TwoRegisters].target, ZRegister.A)),
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)),
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// 3
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(Elidable & Is16BitLoad(ZRegister.HL, ZRegister.IMM_16)) ~
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(Elidable & Is8BitLoad(ZRegister.D, ZRegister.H)) ~
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(Elidable & Is8BitLoad(ZRegister.E, ZRegister.L) & DoesntMatterWhatItDoesWith(ZRegister.HL)) ~~> (code =>
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List(
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code.head.copy(registers = TwoRegisters(ZRegister.DE, ZRegister.IMM_16))
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)),
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// 4
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(Elidable & Is16BitLoad(ZRegister.HL, ZRegister.IMM_16)) ~
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(Elidable & Is8BitLoad(ZRegister.B, ZRegister.H)) ~
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(Elidable & Is8BitLoad(ZRegister.C, ZRegister.L) & DoesntMatterWhatItDoesWith(ZRegister.HL)) ~~> (code =>
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@ -826,6 +831,7 @@ object AlwaysGoodI80Optimizations {
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code.head.copy(registers = TwoRegisters(ZRegister.BC, ZRegister.IMM_16))
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)),
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// 5
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(Elidable & Is8BitLoad(ZRegister.H, ZRegister.B)) ~
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(Elidable & Is8BitLoad(ZRegister.L, ZRegister.C)) ~
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(Elidable & HasOpcodeIn(Set(INC_16, DEC_16, PUSH, POP)) & HasRegisterParam(ZRegister.HL)) ~
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@ -835,6 +841,7 @@ object AlwaysGoodI80Optimizations {
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code(2).copy(registers = OneRegister(ZRegister.BC))
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)),
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// 6
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(Elidable & Is8BitLoad(ZRegister.L, ZRegister.C)) ~
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(Elidable & Is8BitLoad(ZRegister.H, ZRegister.B)) ~
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(Elidable & HasOpcodeIn(Set(INC_16, DEC_16, PUSH, POP)) & HasRegisterParam(ZRegister.HL)) ~
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@ -844,6 +851,7 @@ object AlwaysGoodI80Optimizations {
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code(2).copy(registers = OneRegister(ZRegister.BC))
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)),
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// 7
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(Elidable & Is8BitLoad(ZRegister.H, ZRegister.D)) ~
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(Elidable & Is8BitLoad(ZRegister.L, ZRegister.E)) ~
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(Elidable & HasOpcodeIn(Set(INC_16, DEC_16, PUSH, POP)) & HasRegisterParam(ZRegister.HL)) ~
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@ -853,6 +861,7 @@ object AlwaysGoodI80Optimizations {
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code(2).copy(registers = OneRegister(ZRegister.DE))
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)),
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// 8
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(Elidable & Is8BitLoad(ZRegister.L, ZRegister.E)) ~
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(Elidable & Is8BitLoad(ZRegister.H, ZRegister.D)) ~
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(Elidable & HasOpcodeIn(Set(INC_16, DEC_16, PUSH, POP)) & HasRegisterParam(ZRegister.HL)) ~
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@ -862,6 +871,7 @@ object AlwaysGoodI80Optimizations {
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code(2).copy(registers = OneRegister(ZRegister.DE))
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)),
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// 9
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(Elidable & Is8BitLoad(ZRegister.H, ZRegister.D)) ~
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(Elidable & Is8BitLoad(ZRegister.L, ZRegister.E)) ~
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(Elidable & HasOpcodeIn(Set(INC_16, DEC_16, PUSH, POP)) & HasRegisterParam(ZRegister.HL)) ~
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@ -873,6 +883,7 @@ object AlwaysGoodI80Optimizations {
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code(2).copy(registers = OneRegister(ZRegister.BC))
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)),
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// 10
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(Elidable & Is8BitLoad(ZRegister.H, ZRegister.B)) ~
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(Elidable & Is8BitLoad(ZRegister.L, ZRegister.C)) ~
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(Elidable & HasOpcodeIn(Set(INC_16, DEC_16, PUSH, POP)) & HasRegisterParam(ZRegister.HL)) ~
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@ -885,6 +896,7 @@ object AlwaysGoodI80Optimizations {
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)),
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// 11
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// 2 bytes more, but 3 cycles fewer and frees BC
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(Elidable & Is16BitLoad(ZRegister.BC, ZRegister.IMM_16) & MatchParameter(0)) ~
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(Linear & Not(Concerns(ZRegister.BC)) & Not(Concerns(ZRegister.HL))).*.capture(1) ~
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@ -903,48 +915,57 @@ object AlwaysGoodI80Optimizations {
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},
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// 12
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(Elidable & Is8BitLoad(ZRegister.H, ZRegister.D)) ~
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(Elidable & Is8BitLoad(ZRegister.L, ZRegister.E)) ~
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(Elidable & HasOpcode(PUSH) & HasRegisterParam(ZRegister.HL) & DoesntMatterWhatItDoesWith(ZRegister.HL)) ~~> {_ =>
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List(ZLine.register(PUSH, ZRegister.DE))
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},
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// 13
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(Elidable & Is8BitLoad(ZRegister.H, ZRegister.B)) ~
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(Elidable & Is8BitLoad(ZRegister.L, ZRegister.C)) ~
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(Elidable & HasOpcode(PUSH) & HasRegisterParam(ZRegister.HL) & DoesntMatterWhatItDoesWith(ZRegister.HL)) ~~> {_ =>
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List(ZLine.register(PUSH, ZRegister.BC))
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},
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// 14
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(Elidable & Is8BitLoad(ZRegister.D, ZRegister.H)) ~
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(Elidable & Is8BitLoad(ZRegister.E, ZRegister.L)) ~
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(Elidable & HasOpcode(PUSH) & HasRegisterParam(ZRegister.DE) & DoesntMatterWhatItDoesWith(ZRegister.DE)) ~~> {_ =>
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List(ZLine.register(PUSH, ZRegister.HL))
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},
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// 15
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(Elidable & Is8BitLoad(ZRegister.B, ZRegister.H)) ~
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(Elidable & Is8BitLoad(ZRegister.C, ZRegister.L)) ~
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(Elidable & HasOpcode(PUSH) & HasRegisterParam(ZRegister.BC) & DoesntMatterWhatItDoesWith(ZRegister.BC)) ~~> {_ =>
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List(ZLine.register(PUSH, ZRegister.HL))
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},
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// 16
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(Elidable & Is8BitLoad(ZRegister.L, ZRegister.E)) ~
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(Elidable & Is8BitLoad(ZRegister.H, ZRegister.D)) ~
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(Elidable & HasOpcode(PUSH) & HasRegisterParam(ZRegister.HL) & DoesntMatterWhatItDoesWith(ZRegister.HL)) ~~> {_ =>
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List(ZLine.register(PUSH, ZRegister.DE))
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},
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// 17
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(Elidable & Is8BitLoad(ZRegister.L, ZRegister.C)) ~
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(Elidable & Is8BitLoad(ZRegister.H, ZRegister.B)) ~
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(Elidable & HasOpcode(PUSH) & HasRegisterParam(ZRegister.HL) & DoesntMatterWhatItDoesWith(ZRegister.HL)) ~~> {_ =>
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List(ZLine.register(PUSH, ZRegister.BC))
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},
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// 18
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(Elidable & Is8BitLoad(ZRegister.E, ZRegister.L)) ~
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(Elidable & Is8BitLoad(ZRegister.D, ZRegister.H)) ~
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(Elidable & HasOpcode(PUSH) & HasRegisterParam(ZRegister.DE) & DoesntMatterWhatItDoesWith(ZRegister.DE)) ~~> {_ =>
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List(ZLine.register(PUSH, ZRegister.HL))
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},
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// 19
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(Elidable & Is8BitLoad(ZRegister.C, ZRegister.L)) ~
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(Elidable & Is8BitLoad(ZRegister.B, ZRegister.H)) ~
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(Elidable & HasOpcode(PUSH) & HasRegisterParam(ZRegister.BC) & DoesntMatterWhatItDoesWith(ZRegister.BC)) ~~> {_ =>
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List(ZLine.register(PUSH, ZRegister.HL))
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},
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// 20
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(Elidable & Is8BitLoad(ZRegister.H, ZRegister.B)) ~
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(Elidable & Is8BitLoad(ZRegister.L, ZRegister.C)) ~
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(Elidable & HasOpcode(EX_DE_HL) & DoesntMatterWhatItDoesWith(ZRegister.HL)) ~~> { _ =>
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@ -953,48 +974,57 @@ object AlwaysGoodI80Optimizations {
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ZLine.ld8(ZRegister.E, ZRegister.C))
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},
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// 21
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Is8BitLoad(ZRegister.D, ZRegister.H) ~
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Is8BitLoad(ZRegister.E, ZRegister.L) ~
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(Elidable & HasOpcode(EX_DE_HL)) ~~> { code =>
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code.init
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},
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// 22
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Is8BitLoad(ZRegister.H, ZRegister.D) ~
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Is8BitLoad(ZRegister.L, ZRegister.E) ~
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(Elidable & HasOpcode(EX_DE_HL)) ~~> { code =>
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code.init
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},
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// 23
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(Elidable & HasOpcode(LD_16) & HasRegisters(TwoRegisters(ZRegister.HL, ZRegister.MEM_ABS_16)) & MatchParameter(0)) ~
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(Elidable & Is8BitLoad(ZRegister.A, ZRegister.L) & DoesntMatterWhatItDoesWith(ZRegister.HL)) ~~> { (_, ctx) =>
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List(ZLine.ldAbs8(ZRegister.A, ctx.get[Constant](0)))
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},
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//24
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(Elidable & HasOpcode(LD_16) & HasRegisters(TwoRegisters(ZRegister.HL, ZRegister.MEM_ABS_16)) & MatchParameter(0)) ~
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(Elidable & Is8BitLoad(ZRegister.A, ZRegister.H) & DoesntMatterWhatItDoesWith(ZRegister.HL)) ~~> { (_, ctx) =>
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List(ZLine.ldAbs8(ZRegister.A, (ctx.get[Constant](0) + 1).quickSimplify))
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},
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// 25
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(Elidable & HasOpcode(LD_16) & HasRegisters(TwoRegisters(ZRegister.DE, ZRegister.MEM_ABS_16)) & MatchParameter(0)) ~
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(Elidable & Is8BitLoad(ZRegister.A, ZRegister.E) & DoesntMatterWhatItDoesWith(ZRegister.DE)) ~~> { (_, ctx) =>
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List(ZLine.ldAbs8(ZRegister.A, ctx.get[Constant](0)))
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},
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// 26
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(Elidable & HasOpcode(LD_16) & HasRegisters(TwoRegisters(ZRegister.DE, ZRegister.MEM_ABS_16)) & MatchParameter(0)) ~
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(Elidable & Is8BitLoad(ZRegister.A, ZRegister.D) & DoesntMatterWhatItDoesWith(ZRegister.DE)) ~~> { (_, ctx) =>
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List(ZLine.ldAbs8(ZRegister.A, (ctx.get[Constant](0) + 1).quickSimplify))
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},
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// 27
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(Elidable & HasOpcode(LD_16) & HasRegisters(TwoRegisters(ZRegister.BC, ZRegister.MEM_ABS_16)) & MatchParameter(0)) ~
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(Elidable & Is8BitLoad(ZRegister.A, ZRegister.C) & DoesntMatterWhatItDoesWith(ZRegister.DE)) ~~> { (_, ctx) =>
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List(ZLine.ldAbs8(ZRegister.A, ctx.get[Constant](0)))
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},
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// 28
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(Elidable & HasOpcode(LD_16) & HasRegisters(TwoRegisters(ZRegister.BC, ZRegister.MEM_ABS_16)) & MatchParameter(0)) ~
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(Elidable & Is8BitLoad(ZRegister.A, ZRegister.B) & DoesntMatterWhatItDoesWith(ZRegister.BC)) ~~> { (_, ctx) =>
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List(ZLine.ldAbs8(ZRegister.A, (ctx.get[Constant](0) + 1).quickSimplify))
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},
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// 29
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(Elidable & Is8BitLoad(ZRegister.D, ZRegister.B)) ~
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(Elidable & Is8BitLoad(ZRegister.E, ZRegister.C)) ~
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(Not(Concerns(ZRegister.DE)) & Not(Concerns(ZRegister.BC))).* ~
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@ -1002,6 +1032,7 @@ object AlwaysGoodI80Optimizations {
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code.drop(2).init :+ code.last.copy(registers = TwoRegisters(ZRegister.HL, ZRegister.BC))
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},
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// 30
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(Elidable & Is8BitLoad(ZRegister.B, ZRegister.D)) ~
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(Elidable & Is8BitLoad(ZRegister.C, ZRegister.E)) ~
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(Not(Concerns(ZRegister.DE)) & Not(Concerns(ZRegister.BC))).* ~
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@ -1009,21 +1040,25 @@ object AlwaysGoodI80Optimizations {
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code.drop(2).init :+ code.last.copy(registers = TwoRegisters(ZRegister.HL, ZRegister.DE))
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},
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// 31
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(Elidable & Is8BitLoadTo(ZRegister.H) & MatchImmediate(1)) ~
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(Elidable & Is8BitLoadTo(ZRegister.L) & MatchImmediate(0)) ~~> { (_, ctx) =>
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List(ZLine.ldImm16(ZRegister.HL, (ctx.get[Constant](0) + ctx.get[Constant](1).asl(8)).quickSimplify))
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},
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// 32
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(Elidable & Is8BitLoadTo(ZRegister.D) & MatchImmediate(1)) ~
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(Elidable & Is8BitLoadTo(ZRegister.E) & MatchImmediate(0)) ~~> { (_, ctx) =>
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List(ZLine.ldImm16(ZRegister.DE, (ctx.get[Constant](0) + ctx.get[Constant](1).asl(8)).quickSimplify))
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},
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// 33
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(Elidable & Is8BitLoadTo(ZRegister.B) & MatchImmediate(1)) ~
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(Elidable & Is8BitLoadTo(ZRegister.C) & MatchImmediate(0)) ~~> { (_, ctx) =>
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List(ZLine.ldImm16(ZRegister.BC, (ctx.get[Constant](0) + ctx.get[Constant](1).asl(8)).quickSimplify))
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},
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// 34
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(Elidable & Is8BitLoad(A, MEM_ABS_8) & MatchParameter(1)) ~
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(Not(Concerns(ZRegister.HL)) & IsNotALabelUsedManyTimes).*.capture(5) ~
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Where(ctx => ctx.isExternallyLinearBlock(5)) ~
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@ -1032,6 +1067,7 @@ object AlwaysGoodI80Optimizations {
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code.head.copy(registers = TwoRegisters(A, MEM_HL), parameter = Constant.Zero) ::
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code.tail.init),
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// 35
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// TODO: this is a bit controversial
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// 41 cycles 6 bytes → 24 cycles 8 bytes
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MultipleAssemblyRules(Seq(BC, DE).map{ reg =>
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@ -1051,6 +1087,7 @@ object AlwaysGoodI80Optimizations {
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}
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}),
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// 36
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(Elidable & Is8BitLoadTo(E)).capture(1) ~
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(Not(Concerns(A)) & Not(Concerns(DE))).*.capture(2) ~
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(Elidable & Is8BitLoadTo(D)).capture(3) ~
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@ -1066,6 +1103,7 @@ object AlwaysGoodI80Optimizations {
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ctx.get[List[ZLine]](7).map(x => x.copy(registers = x.registers.asInstanceOf[TwoRegisters].copy(source = BC)))
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},
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// 37
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(Elidable & Is8BitLoadTo(C)).capture(1) ~
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(Not(Concerns(A)) & Not(Concerns(BC))).*.capture(2) ~
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(Elidable & Is8BitLoadTo(B)).capture(3) ~
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@ -1081,6 +1119,7 @@ object AlwaysGoodI80Optimizations {
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ctx.get[List[ZLine]](7).map(x => x.copy(registers = x.registers.asInstanceOf[TwoRegisters].copy(source = DE)))
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},
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// 38
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(Elidable & HasOpcode(LD_16) & HasRegisters(TwoRegisters(MEM_ABS_16, HL)) & MatchParameter(0)).captureLine(10) ~
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(Linear & DoesntChangeMemoryAt(10) & Not(Concerns(HL))).*.capture(55) ~
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(Elidable & HasOpcode(LD_16) & HasRegisters(TwoRegisters(HL, IMM_16)) & MatchParameter(0)) ~
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@ -1088,6 +1127,7 @@ object AlwaysGoodI80Optimizations {
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ctx.get[List[ZLine]](55) ++ ctx.get[List[ZLine]](11).map(_.copy(registers = OneRegister(L))) :+ code.head
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},
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// 39
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(Elidable & HasOpcode(LD_16) & HasRegisters(TwoRegisters(MEM_ABS_16, HL)) & MatchParameter(0)).captureLine(10) ~
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(Linear & DoesntChangeMemoryAt(10) & Not(Concerns(HL))).*.capture(55) ~
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(Elidable & HasOpcode(LD_16) & HasRegisters(TwoRegisters(HL, IMM_16)) & MatchParameter(1)) ~
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@ -177,8 +177,7 @@ class AssemblyMatchingContext(val compilationOptions: CompilationOptions) {
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}
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// if a jump leads inside the block, then it's internal
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// if a jump leads outside the block, then it's external
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jumps --= labels
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jumps.isEmpty
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jumps == labels
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}
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def isStackPreservingBlock(i: Int): Boolean = {
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