From e06d3bf0818d557c641abbe0ce289d459dde9727 Mon Sep 17 00:00:00 2001
From: Karol Stasiak <karol.m.stasiak@gmail.com>
Date: Fri, 31 May 2019 02:09:50 +0200
Subject: [PATCH] 8080: correct Intel disassembly for DI

---
 src/main/scala/millfork/assembly/z80/ZLine.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/main/scala/millfork/assembly/z80/ZLine.scala b/src/main/scala/millfork/assembly/z80/ZLine.scala
index ce06062a..657ab1d9 100644
--- a/src/main/scala/millfork/assembly/z80/ZLine.scala
+++ b/src/main/scala/millfork/assembly/z80/ZLine.scala
@@ -570,7 +570,7 @@ case class ZLine(opcode: ZOpcode.Value, registers: ZRegisters, parameter: Consta
       case IN_IMM => s"    IN ${parameter.toIntelString}"
       case OUT_IMM => s"    OUT ${parameter.toIntelString}"
       case EI => "    EI"
-      case DI => "    EI"
+      case DI => "    DI"
       case EX_DE_HL => "    XCHG"
       case NOP => "    NOP"
       case CPL => "    CMA"