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8080: Faster strlen; more multiplication optimizations
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fe1bf68295
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@ -1,4 +1,16 @@
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#if ARCH_I80
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byte strzlen(pointer str) {
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pointer end
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end = str
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while end[0] != 0 {
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end += 1
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}
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return lo(end - str)
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}
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#else
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byte strzlen(pointer str) {
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byte strzlen(pointer str) {
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byte index
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byte index
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@ -8,3 +20,4 @@ byte strzlen(pointer str) {
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}
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}
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return index
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return index
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}
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}
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#endif
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@ -736,6 +736,18 @@ object AlwaysGoodI80Optimizations {
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ZLine.ld8(ZRegister.E, ZRegister.C))
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ZLine.ld8(ZRegister.E, ZRegister.C))
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},
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},
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Is8BitLoad(ZRegister.D, ZRegister.H) ~
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Is8BitLoad(ZRegister.E, ZRegister.L) ~
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(Elidable & HasOpcode(EX_DE_HL)) ~~> { code =>
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code.init
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},
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Is8BitLoad(ZRegister.H, ZRegister.D) ~
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Is8BitLoad(ZRegister.L, ZRegister.E) ~
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(Elidable & HasOpcode(EX_DE_HL)) ~~> { code =>
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code.init
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},
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(Elidable & HasOpcode(LD_16) & HasRegisters(TwoRegisters(ZRegister.HL, ZRegister.MEM_ABS_16)) & MatchParameter(0)) ~
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(Elidable & HasOpcode(LD_16) & HasRegisters(TwoRegisters(ZRegister.HL, ZRegister.MEM_ABS_16)) & MatchParameter(0)) ~
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(Elidable & Is8BitLoad(ZRegister.A, ZRegister.L) & DoesntMatterWhatItDoesWith(ZRegister.HL)) ~~> { (code, ctx) =>
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(Elidable & Is8BitLoad(ZRegister.A, ZRegister.L) & DoesntMatterWhatItDoesWith(ZRegister.HL)) ~~> { (code, ctx) =>
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List(ZLine.ldAbs8(ZRegister.A, ctx.get[Constant](0)))
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List(ZLine.ldAbs8(ZRegister.A, ctx.get[Constant](0)))
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@ -1037,14 +1049,90 @@ object AlwaysGoodI80Optimizations {
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val ConstantMultiplication = new RuleBasedAssemblyOptimization("Constant multiplication",
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val ConstantMultiplication = new RuleBasedAssemblyOptimization("Constant multiplication",
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needsFlowInfo = FlowInfoRequirement.BothFlows,
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needsFlowInfo = FlowInfoRequirement.BothFlows,
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(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
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(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
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& MatchRegister(ZRegister.A, 4)
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& MatchRegister(ZRegister.A, 4)
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& MatchRegister(ZRegister.D, 5)
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& MatchRegister(ZRegister.D, 5)
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& DoesntMatterWhatItDoesWithFlags
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& DoesntMatterWhatItDoesWithFlags
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& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
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& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
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val product = ctx.get[Int](4) * ctx.get[Int](5)
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val product = ctx.get[Int](4) * ctx.get[Int](5)
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List(ZLine.ldImm8(ZRegister.A, product))
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List(ZLine.ldImm8(ZRegister.A, product))
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},
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},
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(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
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& (HasRegister(ZRegister.D, 0) | HasRegister(ZRegister.A, 0))
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& DoesntMatterWhatItDoesWithFlags
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& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
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List(ZLine.ldImm8(ZRegister.A, 0))
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},
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(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
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& HasRegister(ZRegister.D, 1)
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& DoesntMatterWhatItDoesWithFlags
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& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
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Nil
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},
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(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
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& HasRegister(ZRegister.D, 2)
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& DoesntMatterWhatItDoesWithFlags
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& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
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List(ZLine.register(ADD, ZRegister.A))
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},
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(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
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& HasRegister(ZRegister.D, 4)
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& DoesntMatterWhatItDoesWithFlags
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& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
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List(ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A))
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},
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(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
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& HasRegister(ZRegister.D, 8)
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& DoesntMatterWhatItDoesWithFlags
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& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
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List(ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A))
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},
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(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
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& HasRegister(ZRegister.D, 16)
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& DoesntMatterWhatItDoesWithFlags
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& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
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List(ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A))
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},
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(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
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& HasRegister(ZRegister.A, 1)
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& DoesntMatterWhatItDoesWithFlags
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& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
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List(ZLine.ld8(ZRegister.A, ZRegister.D))
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},
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(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
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& HasRegister(ZRegister.A, 2)
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& DoesntMatterWhatItDoesWithFlags
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& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
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List(ZLine.ld8(ZRegister.A, ZRegister.D), ZLine.register(ADD, ZRegister.A))
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},
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(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
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& HasRegister(ZRegister.A, 4)
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& DoesntMatterWhatItDoesWithFlags
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& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
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List(ZLine.ld8(ZRegister.A, ZRegister.D), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A))
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},
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(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
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& HasRegister(ZRegister.A, 8)
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& DoesntMatterWhatItDoesWithFlags
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& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
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List(ZLine.ld8(ZRegister.A, ZRegister.D), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A))
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},
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(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
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& HasRegister(ZRegister.A, 16)
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& DoesntMatterWhatItDoesWithFlags
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& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
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List(ZLine.ld8(ZRegister.A, ZRegister.D), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A), ZLine.register(ADD, ZRegister.A))
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},
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(Elidable & Is8BitLoad(D, A)) ~
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(Elidable & Is8BitLoad(A, IMM_8)) ~
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(Elidable & HasOpcode(CALL) & RefersTo("__mul_u8u8u8", 0)
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& DoesntMatterWhatItDoesWith(ZRegister.D, ZRegister.E, ZRegister.C)) ~~> { (code, ctx) =>
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List(code(1).copy(registers = TwoRegisters(D, IMM_8)), code(2))
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},
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)
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)
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val All: List[AssemblyOptimization[ZLine]] = List[AssemblyOptimization[ZLine]](
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val All: List[AssemblyOptimization[ZLine]] = List[AssemblyOptimization[ZLine]](
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