From f045f7f4c2a7d6ab030819ab0f053b47b5102345 Mon Sep 17 00:00:00 2001 From: Karol Stasiak Date: Mon, 6 Aug 2018 19:20:07 +0200 Subject: [PATCH] Z80: Analyze flow through RES and SET correctly --- src/main/scala/millfork/assembly/z80/ZLine.scala | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/main/scala/millfork/assembly/z80/ZLine.scala b/src/main/scala/millfork/assembly/z80/ZLine.scala index cbc900a3..767ddee4 100644 --- a/src/main/scala/millfork/assembly/z80/ZLine.scala +++ b/src/main/scala/millfork/assembly/z80/ZLine.scala @@ -726,9 +726,9 @@ case class ZLine(opcode: ZOpcode.Value, registers: ZRegisters, parameter: Consta case _ => false } case op if ZOpcodeClasses.RES_or_SET(op) => registers match { - case OneRegister(MEM_HL) => r == H || r == L - case OneRegister(MEM_IX_D) => r == IXH || r == IXL - case OneRegister(MEM_IY_D) => r == IYH || r == IYL + case OneRegister(MEM_HL) => false + case OneRegister(MEM_IX_D) => false + case OneRegister(MEM_IY_D) => false case OneRegister(s) => r == s case OneRegisterOffset(s, _) => r == s case _ => false