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6502: Fix word addition if zpreg is larger than 2
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@ -67,7 +67,7 @@ object PseudoregisterBuiltIns {
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}
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val b = ctx.env.get[Type]("byte")
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val w = ctx.env.get[Type]("word")
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val reg = ctx.env.get[VariableInMemory]("__reg")
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val reg = ctx.env.get[VariableInMemory]("__reg.loword")
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// TODO: smarter on 65816
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val op = if (subtract) SBC else ADC
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val prepareCarry = AssemblyLine.implied(if (subtract) SEC else CLC)
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