mirror of https://github.com/KarolS/millfork.git
37 lines
1.4 KiB
Scala
37 lines
1.4 KiB
Scala
package millfork.assembly.opt
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import millfork.assembly.{AssemblyLine, Opcode}
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import millfork.assembly.Opcode._
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import millfork.assembly.AddrMode._
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import millfork.assembly.OpcodeClasses._
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import millfork.env.{Constant, NormalFunction}
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/**
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* @author Karol Stasiak
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*/
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object CmosOptimizations {
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val StzAddrModes = Set(ZeroPage, ZeroPageX, Absolute, AbsoluteX)
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val ZeroStoreAsStz = new RuleBasedAssemblyOptimization("Zero store",
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needsFlowInfo = FlowInfoRequirement.ForwardFlow,
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(HasA(0) & HasOpcode(STA) & Elidable & HasAddrModeIn(StzAddrModes)) ~~> {code =>
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code.head.copy(opcode = STZ) :: Nil
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},
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(HasX(0) & HasOpcode(STX) & Elidable & HasAddrModeIn(StzAddrModes)) ~~> {code =>
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code.head.copy(opcode = STZ) :: Nil
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},
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(HasY(0) & HasOpcode(STY) & Elidable & HasAddrModeIn(StzAddrModes)) ~~> {code =>
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code.head.copy(opcode = STZ) :: Nil
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},
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)
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val OptimizeZeroIndex = new RuleBasedAssemblyOptimization("Optimizing zero index",
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needsFlowInfo = FlowInfoRequirement.ForwardFlow,
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(Elidable & HasY(0) & HasAddrMode(IndexedY) & HasOpcodeIn(SupportsZeroPageIndirect)) ~~> (code => code.map(_.copy(addrMode = ZeroPageIndirect))),
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(Elidable & HasX(0) & HasAddrMode(IndexedX) & HasOpcodeIn(SupportsZeroPageIndirect)) ~~> (code => code.map(_.copy(addrMode = ZeroPageIndirect))),
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)
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val All: List[AssemblyOptimization] = List(ZeroStoreAsStz)
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}
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