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Add no_std support

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This commit is contained in:
Matthias Endler 2018-11-04 20:26:51 +01:00
parent d5e9281969
commit 5ee12bdbc0
12 changed files with 876 additions and 383 deletions
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1
.gitignore vendored
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@ -1,4 +1,3 @@
Cargo.lock
*.a *.a
*.aux *.aux
*.bc *.bc

383
Cargo.lock generated Normal file
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@ -0,0 +1,383 @@
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21
Cargo.toml
View File

@ -30,18 +30,25 @@
name = "mos6502" name = "mos6502"
description = "A MOS 6502 Emulator" description = "A MOS 6502 Emulator"
license = "BSD-3-Clause" license = "BSD-3-Clause"
version = "0.0.1" version = "0.1.0"
authors = ["The 6502-rs Developers"] authors = ["The 6502-rs Developers"]
build = "build.rs"
[lib] [lib]
# This will look in src/lib.rs # This will look in src/lib.rs
name = "mos6502" name = "mos6502"
[[bin]]
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name = "mos6502"
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num = "0.1"
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default-features = false
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skeptic = "0.13"
[dev-dependencies]
skeptic = "0.13"

108
README.md
View File

@ -7,3 +7,111 @@ This started off as a fork of [6502-rs](https://github.com/amw-zero/6502-rs),
which seems to be unmaintained at this point. which seems to be unmaintained at this point.
It builds with the latest stable Rust. It builds with the latest stable Rust.
## Usage example
```rust
extern crate mos6502;
use mos6502::cpu;
use mos6502::address::Address;
fn main() {
let mut cpu = cpu::CPU::new();
let zero_page_data = [
// ZeroPage data start
0x00,
0x02, // ADC ZeroPage target
0x00,
0x04, // ADC ZeroPageX target
0x00,
0x00,
0x00,
0x00,
0x10, // ADC IndexedIndirectX address
0x80, // ADC IndexedIndirectX address
0x00,
0x00,
0x00,
0x00,
0x00,
0x08, // ADC IndirectIndexedY address
0x80, // ADC IndirectIndexedY address
];
let program = [
// Code start
0xA9, // LDA Immediate
0x01, // Immediate operand
0x69, // ADC Immediate
0x07, // Immediate operand
0x65, // ADC ZeroPage
0x01, // ZeroPage operand
0xA2, // LDX Immediate
0x01, // Immediate operand
0x75, // ADC ZeroPageX
0x02, // ZeroPageX operand
0x6D, // ADC Absolute
0x01, // Absolute operand
0x80, // Absolute operand
0xA2, // LDX immediate
0x08, // Immediate operand
0x7D, // ADC AbsoluteX
0x00, // AbsoluteX operand
0x80, // AbsoluteX operand
0xA0, // LDY immediate
0x04, // Immediate operand
0x79, // ADC AbsoluteY
0x00, // AbsoluteY operand
0x80, // AbsoluteY operand
0xA2, // LDX immediate
0x05, // Immediate operand
0x61, // ADC IndexedIndirectX
0x03, // IndexedIndirectX operand
0xA0, // LDY immediate
0x10, // Immediate operand
0x71, // ADC IndirectIndexedY
0x0F, // IndirectIndexedY operand
0xEA, // NOP :)
0xFF, // Something invalid -- the end!
];
let data: [u8; 25] = [
0x00,
0x09, // ADC Absolute target
0x00,
0x00,
0x40, // ADC AbsoluteY target
0x00,
0x00,
0x00,
0x11, // ADC AbsoluteX target
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x12, // ADC IndexedIndirectX target
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x06, // ADC IndirectIndexedY target
];
// "Load" a program
cpu.memory.set_bytes(Address(0x0000), &zero_page_data);
cpu.memory.set_bytes(Address(0x4000), &program);
cpu.memory.set_bytes(Address(0x8000), &data);
cpu.registers.program_counter = Address(0x4000);
cpu.run();
}
```

5
build.rs Normal file
View File

@ -0,0 +1,5 @@
extern crate skeptic;
fn main() {
skeptic::generate_doc_tests(&["README.md"]);
}

5
src/address.rs
View File

@ -25,7 +25,7 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE. // POSSIBILITY OF SUCH DAMAGE.
use std::ops::Add; use core::ops::Add;
// The idea here is that it doesn't make sense to add two addresses, but it // The idea here is that it doesn't make sense to add two addresses, but it
// does make sense to add an address and an "address-difference". (If this // does make sense to add an address and an "address-difference". (If this
@ -42,8 +42,7 @@ impl Add<AddressDiff> for Address {
fn add(self, AddressDiff(rhs): AddressDiff) -> Address { fn add(self, AddressDiff(rhs): AddressDiff) -> Address {
let Address(lhs) = self; let Address(lhs) = self;
// TODO akeeton: Do a checked cast. Address(((i32::from(lhs)) + rhs) as u16)
Address(((lhs as i32) + rhs) as u16)
} }
} }

8
src/bin/main.rs → src/bin/mos6502.rs
View File

@ -39,10 +39,8 @@ fn main() {
// "Load" a program // "Load" a program
// JAM: FIXME: What's the syntax for specifying the array element type,
// but not the length? (For a fixed-size array)
let zero_page_data: [u8; 17] = [ let zero_page_data = [
// ZeroPage data start // ZeroPage data start
0x00, 0x00,
0x02, // ADC ZeroPage target 0x02, // ADC ZeroPage target
@ -63,7 +61,7 @@ fn main() {
0x80, // ADC IndirectIndexedY address 0x80, // ADC IndirectIndexedY address
]; ];
let program: [u8; 33] = [ let program = [
// Code start // Code start
0xA9, // LDA Immediate 0xA9, // LDA Immediate
0x01, // Immediate operand 0x01, // Immediate operand
@ -100,7 +98,7 @@ fn main() {
0xFF, // Something invalid -- the end! 0xFF, // Something invalid -- the end!
]; ];
let data: [u8; 25] = [ let data = [
0x00, 0x00,
0x09, // ADC Absolute target 0x09, // ADC Absolute target
0x00, 0x00,

661
src/cpu.rs
View File

@ -25,15 +25,14 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE. // POSSIBILITY OF SUCH DAMAGE.
use std;
use address::{Address, AddressDiff}; use address::{Address, AddressDiff};
use instruction; use instruction;
use instruction::{DecodedInstr, Instruction, OpInput}; use instruction::{DecodedInstr, Instruction, OpInput};
use memory::Memory; use memory::Memory;
use registers::{Registers, StackPointer, Status, StatusArgs}; use registers::{Registers, StackPointer, Status, StatusArgs};
use registers::{PS_CARRY, PS_DECIMAL_MODE, PS_DISABLE_INTERRUPTS, PS_NEGATIVE, PS_OVERFLOW, use registers::{
PS_ZERO}; PS_CARRY, PS_DECIMAL_MODE, PS_DISABLE_INTERRUPTS, PS_NEGATIVE, PS_OVERFLOW, PS_ZERO,
};
#[derive(Clone)] #[derive(Clone)]
pub struct CPU { pub struct CPU {
@ -410,12 +409,8 @@ impl CPU {
} }
pub fn run(&mut self) { pub fn run(&mut self) {
loop { while let Some(decoded_instr) = self.fetch_next_and_decode() {
if let Some(decoded_instr) = self.fetch_next_and_decode() {
self.execute_instruction(decoded_instr); self.execute_instruction(decoded_instr);
} else {
break;
}
} }
} }
@ -758,8 +753,8 @@ impl CPU {
} }
} }
impl std::fmt::Debug for CPU { impl core::fmt::Debug for CPU {
fn fmt(&self, f: &mut std::fmt::Formatter) -> std::fmt::Result { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
write!( write!(
f, f,
"CPU Dump:\n\nAccumulator: {}", "CPU Dump:\n\nAccumulator: {}",
@ -776,385 +771,385 @@ mod tests {
#[test] #[test]
fn add_with_carry_test() { fn add_with_carry_test() {
let mut CPU = CPU::new(); let mut cpu = CPU::new();
CPU.add_with_carry(1); cpu.add_with_carry(1);
assert_eq!(CPU.registers.accumulator, 1); assert_eq!(cpu.registers.accumulator, 1);
assert_eq!(CPU.registers.status.contains(PS_CARRY), false); assert_eq!(cpu.registers.status.contains(PS_CARRY), false);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
CPU.add_with_carry(-1); cpu.add_with_carry(-1);
assert_eq!(CPU.registers.accumulator, 0); assert_eq!(cpu.registers.accumulator, 0);
assert_eq!(CPU.registers.status.contains(PS_CARRY), true); assert_eq!(cpu.registers.status.contains(PS_CARRY), true);
assert_eq!(CPU.registers.status.contains(PS_ZERO), true); assert_eq!(cpu.registers.status.contains(PS_ZERO), true);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
CPU.add_with_carry(1); cpu.add_with_carry(1);
assert_eq!(CPU.registers.accumulator, 2); assert_eq!(cpu.registers.accumulator, 2);
assert_eq!(CPU.registers.status.contains(PS_CARRY), false); assert_eq!(cpu.registers.status.contains(PS_CARRY), false);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
let mut CPU = CPU::new(); let mut cpu = CPU::new();
CPU.add_with_carry(127); cpu.add_with_carry(127);
assert_eq!(CPU.registers.accumulator, 127); assert_eq!(cpu.registers.accumulator, 127);
assert_eq!(CPU.registers.status.contains(PS_CARRY), false); assert_eq!(cpu.registers.status.contains(PS_CARRY), false);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
CPU.add_with_carry(-127); cpu.add_with_carry(-127);
assert_eq!(CPU.registers.accumulator, 0); assert_eq!(cpu.registers.accumulator, 0);
assert_eq!(CPU.registers.status.contains(PS_CARRY), true); assert_eq!(cpu.registers.status.contains(PS_CARRY), true);
assert_eq!(CPU.registers.status.contains(PS_ZERO), true); assert_eq!(cpu.registers.status.contains(PS_ZERO), true);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
CPU.registers.status.remove(PS_CARRY); cpu.registers.status.remove(PS_CARRY);
CPU.add_with_carry(-128); cpu.add_with_carry(-128);
assert_eq!(CPU.registers.accumulator, -128); assert_eq!(cpu.registers.accumulator, -128);
assert_eq!(CPU.registers.status.contains(PS_CARRY), false); assert_eq!(cpu.registers.status.contains(PS_CARRY), false);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), true); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), true);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
CPU.add_with_carry(127); cpu.add_with_carry(127);
assert_eq!(CPU.registers.accumulator, -1); assert_eq!(cpu.registers.accumulator, -1);
assert_eq!(CPU.registers.status.contains(PS_CARRY), false); assert_eq!(cpu.registers.status.contains(PS_CARRY), false);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), true); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), true);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
let mut CPU = CPU::new(); let mut cpu = CPU::new();
CPU.add_with_carry(127); cpu.add_with_carry(127);
assert_eq!(CPU.registers.accumulator, 127); assert_eq!(cpu.registers.accumulator, 127);
assert_eq!(CPU.registers.status.contains(PS_CARRY), false); assert_eq!(cpu.registers.status.contains(PS_CARRY), false);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
CPU.add_with_carry(1); cpu.add_with_carry(1);
assert_eq!(CPU.registers.accumulator, -128); assert_eq!(cpu.registers.accumulator, -128);
assert_eq!(CPU.registers.status.contains(PS_CARRY), false); assert_eq!(cpu.registers.status.contains(PS_CARRY), false);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), true); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), true);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), true); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), true);
} }
#[test] #[test]
fn and_test() { fn and_test() {
let mut CPU = CPU::new(); let mut cpu = CPU::new();
CPU.registers.accumulator = 0; cpu.registers.accumulator = 0;
CPU.and(-1); cpu.and(-1);
assert_eq!(CPU.registers.accumulator, 0); assert_eq!(cpu.registers.accumulator, 0);
assert_eq!(CPU.registers.status.contains(PS_ZERO), true); assert_eq!(cpu.registers.status.contains(PS_ZERO), true);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
CPU.registers.accumulator = -1; cpu.registers.accumulator = -1;
CPU.and(0); cpu.and(0);
assert_eq!(CPU.registers.accumulator, 0); assert_eq!(cpu.registers.accumulator, 0);
assert_eq!(CPU.registers.status.contains(PS_ZERO), true); assert_eq!(cpu.registers.status.contains(PS_ZERO), true);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
CPU.registers.accumulator = -1; cpu.registers.accumulator = -1;
CPU.and(0x0f); cpu.and(0x0f);
assert_eq!(CPU.registers.accumulator, 0x0f); assert_eq!(cpu.registers.accumulator, 0x0f);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
CPU.registers.accumulator = -1; cpu.registers.accumulator = -1;
CPU.and(-128); cpu.and(-128);
assert_eq!(CPU.registers.accumulator, -128); assert_eq!(cpu.registers.accumulator, -128);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), true); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), true);
} }
#[test] #[test]
fn subtract_with_carry_test() { fn subtract_with_carry_test() {
let mut CPU = CPU::new(); let mut cpu = CPU::new();
CPU.execute_instruction((Instruction::SEC, OpInput::UseImplied)); cpu.execute_instruction((Instruction::SEC, OpInput::UseImplied));
CPU.registers.accumulator = 0; cpu.registers.accumulator = 0;
CPU.subtract_with_carry(1); cpu.subtract_with_carry(1);
assert_eq!(CPU.registers.accumulator, -1); assert_eq!(cpu.registers.accumulator, -1);
assert_eq!(CPU.registers.status.contains(PS_CARRY), true); assert_eq!(cpu.registers.status.contains(PS_CARRY), true);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), true); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), true);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
CPU.execute_instruction((Instruction::SEC, OpInput::UseImplied)); cpu.execute_instruction((Instruction::SEC, OpInput::UseImplied));
CPU.registers.accumulator = -128; cpu.registers.accumulator = -128;
CPU.subtract_with_carry(1); cpu.subtract_with_carry(1);
assert_eq!(CPU.registers.accumulator, 127); assert_eq!(cpu.registers.accumulator, 127);
assert_eq!(CPU.registers.status.contains(PS_CARRY), false); assert_eq!(cpu.registers.status.contains(PS_CARRY), false);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), true); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), true);
CPU.execute_instruction((Instruction::SEC, OpInput::UseImplied)); cpu.execute_instruction((Instruction::SEC, OpInput::UseImplied));
CPU.registers.accumulator = 127; cpu.registers.accumulator = 127;
CPU.subtract_with_carry(-1); cpu.subtract_with_carry(-1);
assert_eq!(CPU.registers.accumulator, -128); assert_eq!(cpu.registers.accumulator, -128);
assert_eq!(CPU.registers.status.contains(PS_CARRY), true); assert_eq!(cpu.registers.status.contains(PS_CARRY), true);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), true); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), true);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), true); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), true);
CPU.execute_instruction((Instruction::CLC, OpInput::UseImplied)); cpu.execute_instruction((Instruction::CLC, OpInput::UseImplied));
CPU.registers.accumulator = -64; cpu.registers.accumulator = -64;
CPU.subtract_with_carry(64); cpu.subtract_with_carry(64);
assert_eq!(CPU.registers.accumulator, 127); assert_eq!(cpu.registers.accumulator, 127);
assert_eq!(CPU.registers.status.contains(PS_CARRY), false); assert_eq!(cpu.registers.status.contains(PS_CARRY), false);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), true); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), true);
CPU.execute_instruction((Instruction::SEC, OpInput::UseImplied)); cpu.execute_instruction((Instruction::SEC, OpInput::UseImplied));
CPU.registers.accumulator = 0; cpu.registers.accumulator = 0;
CPU.subtract_with_carry(-128); cpu.subtract_with_carry(-128);
assert_eq!(CPU.registers.accumulator, -128); assert_eq!(cpu.registers.accumulator, -128);
assert_eq!(CPU.registers.status.contains(PS_CARRY), true); assert_eq!(cpu.registers.status.contains(PS_CARRY), true);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), true); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), true);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), true); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), true);
CPU.execute_instruction((Instruction::CLC, OpInput::UseImplied)); cpu.execute_instruction((Instruction::CLC, OpInput::UseImplied));
CPU.registers.accumulator = 0; cpu.registers.accumulator = 0;
CPU.subtract_with_carry(127); cpu.subtract_with_carry(127);
assert_eq!(CPU.registers.accumulator, -128); assert_eq!(cpu.registers.accumulator, -128);
assert_eq!(CPU.registers.status.contains(PS_CARRY), true); assert_eq!(cpu.registers.status.contains(PS_CARRY), true);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), true); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), true);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
} }
#[test] #[test]
fn decrement_memory_test() { fn decrement_memory_test() {
let mut CPU = CPU::new(); let mut cpu = CPU::new();
let addr = Address(0xA1B2); let addr = Address(0xA1B2);
CPU.memory.set_byte(addr, 5); cpu.memory.set_byte(addr, 5);
CPU.decrement_memory(addr); cpu.decrement_memory(addr);
assert_eq!(CPU.memory.get_byte(addr), 4); assert_eq!(cpu.memory.get_byte(addr), 4);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
CPU.decrement_memory(addr); cpu.decrement_memory(addr);
assert_eq!(CPU.memory.get_byte(addr), 3); assert_eq!(cpu.memory.get_byte(addr), 3);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
CPU.decrement_memory(addr); cpu.decrement_memory(addr);
CPU.decrement_memory(addr); cpu.decrement_memory(addr);
CPU.decrement_memory(addr); cpu.decrement_memory(addr);
assert_eq!(CPU.memory.get_byte(addr), 0); assert_eq!(cpu.memory.get_byte(addr), 0);
assert_eq!(CPU.registers.status.contains(PS_ZERO), true); assert_eq!(cpu.registers.status.contains(PS_ZERO), true);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
CPU.decrement_memory(addr); cpu.decrement_memory(addr);
assert_eq!(CPU.memory.get_byte(addr) as i8, -1); assert_eq!(cpu.memory.get_byte(addr) as i8, -1);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), true); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), true);
} }
#[test] #[test]
fn logical_shift_right_test() { fn logical_shift_right_test() {
// Testing UseImplied version (which targets the accumulator) only, for now // Testing UseImplied version (which targets the accumulator) only, for now
let mut CPU = CPU::new(); let mut cpu = CPU::new();
CPU.execute_instruction((Instruction::LDA, OpInput::UseImmediate(0))); cpu.execute_instruction((Instruction::LDA, OpInput::UseImmediate(0)));
CPU.execute_instruction((Instruction::LSR, OpInput::UseImplied)); cpu.execute_instruction((Instruction::LSR, OpInput::UseImplied));
assert_eq!(CPU.registers.accumulator, 0); assert_eq!(cpu.registers.accumulator, 0);
assert_eq!(CPU.registers.status.contains(PS_CARRY), false); assert_eq!(cpu.registers.status.contains(PS_CARRY), false);
assert_eq!(CPU.registers.status.contains(PS_ZERO), true); assert_eq!(cpu.registers.status.contains(PS_ZERO), true);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
CPU.execute_instruction((Instruction::LDA, OpInput::UseImmediate(1))); cpu.execute_instruction((Instruction::LDA, OpInput::UseImmediate(1)));
CPU.execute_instruction((Instruction::LSR, OpInput::UseImplied)); cpu.execute_instruction((Instruction::LSR, OpInput::UseImplied));
assert_eq!(CPU.registers.accumulator, 0); assert_eq!(cpu.registers.accumulator, 0);
assert_eq!(CPU.registers.status.contains(PS_CARRY), true); assert_eq!(cpu.registers.status.contains(PS_CARRY), true);
assert_eq!(CPU.registers.status.contains(PS_ZERO), true); assert_eq!(cpu.registers.status.contains(PS_ZERO), true);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
CPU.execute_instruction((Instruction::LDA, OpInput::UseImmediate(255))); cpu.execute_instruction((Instruction::LDA, OpInput::UseImmediate(255)));
CPU.execute_instruction((Instruction::LSR, OpInput::UseImplied)); cpu.execute_instruction((Instruction::LSR, OpInput::UseImplied));
assert_eq!(CPU.registers.accumulator, 0x7F); assert_eq!(cpu.registers.accumulator, 0x7F);
assert_eq!(CPU.registers.status.contains(PS_CARRY), true); assert_eq!(cpu.registers.status.contains(PS_CARRY), true);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
CPU.execute_instruction((Instruction::LDA, OpInput::UseImmediate(254))); cpu.execute_instruction((Instruction::LDA, OpInput::UseImmediate(254)));
CPU.execute_instruction((Instruction::LSR, OpInput::UseImplied)); cpu.execute_instruction((Instruction::LSR, OpInput::UseImplied));
assert_eq!(CPU.registers.accumulator, 0x7F); assert_eq!(cpu.registers.accumulator, 0x7F);
assert_eq!(CPU.registers.status.contains(PS_CARRY), false); assert_eq!(cpu.registers.status.contains(PS_CARRY), false);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
} }
#[test] #[test]
fn dec_x_test() { fn dec_x_test() {
let mut CPU = CPU::new(); let mut cpu = CPU::new();
CPU.dec_x(); cpu.dec_x();
assert_eq!(CPU.registers.index_x, -1); assert_eq!(cpu.registers.index_x, -1);
assert_eq!(CPU.registers.status.contains(PS_CARRY), false); assert_eq!(cpu.registers.status.contains(PS_CARRY), false);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), true); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), true);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
CPU.dec_x(); cpu.dec_x();
assert_eq!(CPU.registers.index_x, -2); assert_eq!(cpu.registers.index_x, -2);
assert_eq!(CPU.registers.status.contains(PS_CARRY), false); assert_eq!(cpu.registers.status.contains(PS_CARRY), false);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), true); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), true);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
CPU.load_x_register(5); cpu.load_x_register(5);
CPU.dec_x(); cpu.dec_x();
assert_eq!(CPU.registers.index_x, 4); assert_eq!(cpu.registers.index_x, 4);
assert_eq!(CPU.registers.status.contains(PS_CARRY), false); assert_eq!(cpu.registers.status.contains(PS_CARRY), false);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
CPU.dec_x(); cpu.dec_x();
CPU.dec_x(); cpu.dec_x();
CPU.dec_x(); cpu.dec_x();
CPU.dec_x(); cpu.dec_x();
assert_eq!(CPU.registers.index_x, 0); assert_eq!(cpu.registers.index_x, 0);
assert_eq!(CPU.registers.status.contains(PS_CARRY), false); assert_eq!(cpu.registers.status.contains(PS_CARRY), false);
assert_eq!(CPU.registers.status.contains(PS_ZERO), true); assert_eq!(cpu.registers.status.contains(PS_ZERO), true);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), false); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), false);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
CPU.dec_x(); cpu.dec_x();
assert_eq!(CPU.registers.index_x, -1); assert_eq!(cpu.registers.index_x, -1);
assert_eq!(CPU.registers.status.contains(PS_CARRY), false); assert_eq!(cpu.registers.status.contains(PS_CARRY), false);
assert_eq!(CPU.registers.status.contains(PS_ZERO), false); assert_eq!(cpu.registers.status.contains(PS_ZERO), false);
assert_eq!(CPU.registers.status.contains(PS_NEGATIVE), true); assert_eq!(cpu.registers.status.contains(PS_NEGATIVE), true);
assert_eq!(CPU.registers.status.contains(PS_OVERFLOW), false); assert_eq!(cpu.registers.status.contains(PS_OVERFLOW), false);
} }
#[test] #[test]
fn jump_test() { fn jump_test() {
let mut CPU = CPU::new(); let mut cpu = CPU::new();
let addr = Address(0xA1B1); let addr = Address(0xA1B1);
CPU.jump(addr); cpu.jump(addr);
assert_eq!(CPU.registers.program_counter, addr); assert_eq!(cpu.registers.program_counter, addr);
} }
#[test] #[test]
fn branch_if_carry_clear_test() { fn branch_if_carry_clear_test() {
let mut CPU = CPU::new(); let mut cpu = CPU::new();
CPU.execute_instruction((Instruction::SEC, OpInput::UseImplied)); cpu.execute_instruction((Instruction::SEC, OpInput::UseImplied));
CPU.branch_if_carry_clear(Address(0xABCD)); cpu.branch_if_carry_clear(Address(0xABCD));
assert_eq!(CPU.registers.program_counter, Address(0)); assert_eq!(cpu.registers.program_counter, Address(0));
CPU.execute_instruction((Instruction::CLC, OpInput::UseImplied)); cpu.execute_instruction((Instruction::CLC, OpInput::UseImplied));
CPU.branch_if_carry_clear(Address(0xABCD)); cpu.branch_if_carry_clear(Address(0xABCD));
assert_eq!(CPU.registers.program_counter, Address(0xABCD)); assert_eq!(cpu.registers.program_counter, Address(0xABCD));
} }
#[test] #[test]
fn branch_if_carry_set_test() { fn branch_if_carry_set_test() {
let mut CPU = CPU::new(); let mut cpu = CPU::new();
CPU.execute_instruction((Instruction::CLC, OpInput::UseImplied)); cpu.execute_instruction((Instruction::CLC, OpInput::UseImplied));
CPU.branch_if_carry_set(Address(0xABCD)); cpu.branch_if_carry_set(Address(0xABCD));
assert_eq!(CPU.registers.program_counter, Address(0)); assert_eq!(cpu.registers.program_counter, Address(0));
CPU.execute_instruction((Instruction::SEC, OpInput::UseImplied)); cpu.execute_instruction((Instruction::SEC, OpInput::UseImplied));
CPU.branch_if_carry_set(Address(0xABCD)); cpu.branch_if_carry_set(Address(0xABCD));
assert_eq!(CPU.registers.program_counter, Address(0xABCD)); assert_eq!(cpu.registers.program_counter, Address(0xABCD));
} }
#[test] #[test]
fn branch_if_equal_test() { fn branch_if_equal_test() {
let mut CPU = CPU::new(); let mut cpu = CPU::new();
CPU.branch_if_equal(Address(0xABCD)); cpu.branch_if_equal(Address(0xABCD));
assert_eq!(CPU.registers.program_counter, Address(0)); assert_eq!(cpu.registers.program_counter, Address(0));
CPU.registers.status.or(PS_ZERO); cpu.registers.status.or(PS_ZERO);
CPU.branch_if_equal(Address(0xABCD)); cpu.branch_if_equal(Address(0xABCD));
assert_eq!(CPU.registers.program_counter, Address(0xABCD)); assert_eq!(cpu.registers.program_counter, Address(0xABCD));
} }
#[test] #[test]
fn branch_if_minus_test() { fn branch_if_minus_test() {
{ {
let mut CPU = CPU::new(); let mut cpu = CPU::new();
let registers_before = CPU.registers; let registers_before = cpu.registers;
CPU.branch_if_minus(Address(0xABCD)); cpu.branch_if_minus(Address(0xABCD));
assert_eq!(CPU.registers, registers_before); assert_eq!(cpu.registers, registers_before);
assert_eq!(CPU.registers.program_counter, Address(0)); assert_eq!(cpu.registers.program_counter, Address(0));
} }
{ {
let mut CPU = CPU::new(); let mut cpu = CPU::new();
CPU.registers.status.or(PS_NEGATIVE); cpu.registers.status.or(PS_NEGATIVE);
let registers_before = CPU.registers; let registers_before = cpu.registers;
CPU.branch_if_minus(Address(0xABCD)); cpu.branch_if_minus(Address(0xABCD));
assert_eq!(CPU.registers.status, registers_before.status); assert_eq!(cpu.registers.status, registers_before.status);
assert_eq!(CPU.registers.program_counter, Address(0xABCD)); assert_eq!(cpu.registers.program_counter, Address(0xABCD));
} }
} }
#[test] #[test]
fn branch_if_positive_test() { fn branch_if_positive_test() {
let mut CPU = CPU::new(); let mut cpu = CPU::new();
CPU.registers.status.insert(PS_NEGATIVE); cpu.registers.status.insert(PS_NEGATIVE);
CPU.branch_if_positive(Address(0xABCD)); cpu.branch_if_positive(Address(0xABCD));
assert_eq!(CPU.registers.program_counter, Address(0)); assert_eq!(cpu.registers.program_counter, Address(0));
CPU.registers.status.remove(PS_NEGATIVE); cpu.registers.status.remove(PS_NEGATIVE);
CPU.branch_if_positive(Address(0xABCD)); cpu.branch_if_positive(Address(0xABCD));
assert_eq!(CPU.registers.program_counter, Address(0xABCD)); assert_eq!(cpu.registers.program_counter, Address(0xABCD));
} }
#[test] #[test]
fn branch_if_overflow_clear_test() { fn branch_if_overflow_clear_test() {
let mut CPU = CPU::new(); let mut cpu = CPU::new();
CPU.registers.status.insert(PS_OVERFLOW); cpu.registers.status.insert(PS_OVERFLOW);
CPU.branch_if_overflow_clear(Address(0xABCD)); cpu.branch_if_overflow_clear(Address(0xABCD));
assert_eq!(CPU.registers.program_counter, Address(0)); assert_eq!(cpu.registers.program_counter, Address(0));
CPU.registers.status.remove(PS_OVERFLOW); cpu.registers.status.remove(PS_OVERFLOW);
CPU.branch_if_overflow_clear(Address(0xABCD)); cpu.branch_if_overflow_clear(Address(0xABCD));
assert_eq!(CPU.registers.program_counter, Address(0xABCD)); assert_eq!(cpu.registers.program_counter, Address(0xABCD));
} }
#[test] #[test]
fn branch_if_overflow_set_test() { fn branch_if_overflow_set_test() {
let mut CPU = CPU::new(); let mut cpu = CPU::new();
CPU.branch_if_overflow_set(Address(0xABCD)); cpu.branch_if_overflow_set(Address(0xABCD));
assert_eq!(CPU.registers.program_counter, Address(0)); assert_eq!(cpu.registers.program_counter, Address(0));
CPU.registers.status.insert(PS_OVERFLOW); cpu.registers.status.insert(PS_OVERFLOW);
CPU.branch_if_overflow_set(Address(0xABCD)); cpu.branch_if_overflow_set(Address(0xABCD));
assert_eq!(CPU.registers.program_counter, Address(0xABCD)); assert_eq!(cpu.registers.program_counter, Address(0xABCD));
} }
#[cfg(test)] #[cfg(test)]
@ -1162,61 +1157,56 @@ mod tests {
where where
F: FnMut(&mut CPU, u8), F: FnMut(&mut CPU, u8),
{ {
let mut CPU = CPU::new(); let mut cpu = CPU::new();
CPU.execute_instruction((load_instruction, OpInput::UseImmediate(127))); cpu.execute_instruction((load_instruction, OpInput::UseImmediate(127)));
compare(&mut CPU, 127); compare(&mut cpu, 127);
assert!(CPU.registers.status.contains(PS_ZERO)); assert!(cpu.registers.status.contains(PS_ZERO));
assert!(CPU.registers.status.contains(PS_CARRY)); assert!(cpu.registers.status.contains(PS_CARRY));
assert!(!CPU.registers.status.contains(PS_NEGATIVE)); assert!(!cpu.registers.status.contains(PS_NEGATIVE));
cpu.execute_instruction((load_instruction, OpInput::UseImmediate(127)));
CPU.execute_instruction((load_instruction, OpInput::UseImmediate(127))); compare(&mut cpu, 1);
assert!(!cpu.registers.status.contains(PS_ZERO));
assert!(cpu.registers.status.contains(PS_CARRY));
assert!(!cpu.registers.status.contains(PS_NEGATIVE));
compare(&mut CPU, 1); cpu.execute_instruction((load_instruction, OpInput::UseImmediate(1)));
assert!(!CPU.registers.status.contains(PS_ZERO));
assert!(CPU.registers.status.contains(PS_CARRY));
assert!(!CPU.registers.status.contains(PS_NEGATIVE));
compare(&mut cpu, 2);
assert!(!cpu.registers.status.contains(PS_ZERO));
assert!(!cpu.registers.status.contains(PS_CARRY));
assert!(cpu.registers.status.contains(PS_NEGATIVE));
CPU.execute_instruction((load_instruction, OpInput::UseImmediate(1))); cpu.execute_instruction((load_instruction, OpInput::UseImmediate(20)));
compare(&mut CPU, 2); compare(&mut cpu, -50i8 as u8);
assert!(!CPU.registers.status.contains(PS_ZERO)); assert!(!cpu.registers.status.contains(PS_ZERO));
assert!(!CPU.registers.status.contains(PS_CARRY)); assert!(!cpu.registers.status.contains(PS_CARRY));
assert!(CPU.registers.status.contains(PS_NEGATIVE)); assert!(!cpu.registers.status.contains(PS_NEGATIVE));
cpu.execute_instruction((load_instruction, OpInput::UseImmediate(1)));
CPU.execute_instruction((load_instruction, OpInput::UseImmediate(20))); compare(&mut cpu, -1i8 as u8);
assert!(!cpu.registers.status.contains(PS_ZERO));
assert!(!cpu.registers.status.contains(PS_CARRY));
assert!(!cpu.registers.status.contains(PS_NEGATIVE));
compare(&mut CPU, -50i8 as u8); cpu.execute_instruction((load_instruction, OpInput::UseImmediate(127)));
assert!(!CPU.registers.status.contains(PS_ZERO));
assert!(!CPU.registers.status.contains(PS_CARRY));
assert!(!CPU.registers.status.contains(PS_NEGATIVE));
compare(&mut cpu, -128i8 as u8);
CPU.execute_instruction((load_instruction, OpInput::UseImmediate(1))); assert!(!cpu.registers.status.contains(PS_ZERO));
assert!(!cpu.registers.status.contains(PS_CARRY));
compare(&mut CPU, -1i8 as u8); assert!(cpu.registers.status.contains(PS_NEGATIVE));
assert!(!CPU.registers.status.contains(PS_ZERO));
assert!(!CPU.registers.status.contains(PS_CARRY));
assert!(!CPU.registers.status.contains(PS_NEGATIVE));
CPU.execute_instruction((load_instruction, OpInput::UseImmediate(127)));
compare(&mut CPU, -128i8 as u8);
assert!(!CPU.registers.status.contains(PS_ZERO));
assert!(!CPU.registers.status.contains(PS_CARRY));
assert!(CPU.registers.status.contains(PS_NEGATIVE));
} }
#[test] #[test]
fn compare_with_a_register_test() { fn compare_with_a_register_test() {
compare_test_helper( compare_test_helper(
&mut |CPU: &mut CPU, val: u8| { &mut |cpu: &mut CPU, val: u8| {
CPU.compare_with_a_register(val); cpu.compare_with_a_register(val);
}, },
Instruction::LDA, Instruction::LDA,
); );
@ -1225,8 +1215,8 @@ mod tests {
#[test] #[test]
fn compare_with_x_register_test() { fn compare_with_x_register_test() {
compare_test_helper( compare_test_helper(
&mut |CPU: &mut CPU, val: u8| { &mut |cpu: &mut CPU, val: u8| {
CPU.compare_with_x_register(val); cpu.compare_with_x_register(val);
}, },
Instruction::LDX, Instruction::LDX,
); );
@ -1235,8 +1225,8 @@ mod tests {
#[test] #[test]
fn compare_with_y_register_test() { fn compare_with_y_register_test() {
compare_test_helper( compare_test_helper(
&mut |CPU: &mut CPU, val: u8| { &mut |cpu: &mut CPU, val: u8| {
CPU.compare_with_y_register(val); cpu.compare_with_y_register(val);
}, },
Instruction::LDY, Instruction::LDY,
); );
@ -1244,27 +1234,27 @@ mod tests {
#[test] #[test]
fn exclusive_or_test() { fn exclusive_or_test() {
let mut CPU = CPU::new(); let mut cpu = CPU::new();
for a_before in range_inclusive(0u8, 255u8) { for a_before in range_inclusive(0u8, 255u8) {
for val in range_inclusive(0u8, 255u8) { for val in range_inclusive(0u8, 255u8) {
CPU.execute_instruction((Instruction::LDA, OpInput::UseImmediate(a_before))); cpu.execute_instruction((Instruction::LDA, OpInput::UseImmediate(a_before)));
CPU.exclusive_or(val); cpu.exclusive_or(val);
let a_after = a_before ^ val; let a_after = a_before ^ val;
assert_eq!(CPU.registers.accumulator, a_after as i8); assert_eq!(cpu.registers.accumulator, a_after as i8);
if a_after == 0 { if a_after == 0 {
assert!(CPU.registers.status.contains(PS_ZERO)); assert!(cpu.registers.status.contains(PS_ZERO));
} else { } else {
assert!(!CPU.registers.status.contains(PS_ZERO)); assert!(!cpu.registers.status.contains(PS_ZERO));
} }
if (a_after as i8) < 0 { if (a_after as i8) < 0 {
assert!(CPU.registers.status.contains(PS_NEGATIVE)); assert!(cpu.registers.status.contains(PS_NEGATIVE));
} else { } else {
assert!(!CPU.registers.status.contains(PS_NEGATIVE)); assert!(!cpu.registers.status.contains(PS_NEGATIVE));
} }
} }
} }
@ -1272,29 +1262,30 @@ mod tests {
#[test] #[test]
fn inclusive_or_test() { fn inclusive_or_test() {
let mut CPU = CPU::new(); let mut cpu = CPU::new();
for a_before in range_inclusive(0u8, 255u8) { for a_before in range_inclusive(0u8, 255u8) {
for val in range_inclusive(0u8, 255u8) { for val in range_inclusive(0u8, 255u8) {
CPU.execute_instruction((Instruction::LDA, OpInput::UseImmediate(a_before))); cpu.execute_instruction((Instruction::LDA, OpInput::UseImmediate(a_before)));
CPU.inclusive_or(val); cpu.inclusive_or(val);
let a_after = a_before | val; let a_after = a_before | val;
assert_eq!(CPU.registers.accumulator, a_after as i8); assert_eq!(cpu.registers.accumulator, a_after as i8);
if a_after == 0 { if a_after == 0 {
assert!(CPU.registers.status.contains(PS_ZERO)); assert!(cpu.registers.status.contains(PS_ZERO));
} else { } else {
assert!(!CPU.registers.status.contains(PS_ZERO)); assert!(!cpu.registers.status.contains(PS_ZERO));
} }
if (a_after as i8) < 0 { if (a_after as i8) < 0 {
assert!(CPU.registers.status.contains(PS_NEGATIVE)); assert!(cpu.registers.status.contains(PS_NEGATIVE));
} else { } else {
assert!(!CPU.registers.status.contains(PS_NEGATIVE)); assert!(!cpu.registers.status.contains(PS_NEGATIVE));
} }
} }
} }
} }
} }

18
src/instruction.rs
View File

@ -139,7 +139,7 @@ pub enum AddressingMode {
fn arr_to_addr(arr: &[u8]) -> Address { fn arr_to_addr(arr: &[u8]) -> Address {
debug_assert!(arr.len() == 2); debug_assert!(arr.len() == 2);
let x = (arr[0] as u16) + ((arr[1] as u16) << 8usize); let x = u16::from(arr[0]) + (u16::from(arr[1]) << 8usize);
Address(x) Address(x)
} }
@ -187,19 +187,19 @@ impl AddressingMode {
// Use [u8, ..1] from instruction // Use [u8, ..1] from instruction
// Interpret as zero page address // Interpret as zero page address
// (Output: an 8-bit zero-page address) // (Output: an 8-bit zero-page address)
OpInput::UseAddress(Address(arr[0] as u16)) OpInput::UseAddress(Address(u16::from(arr[0])))
} }
AddressingMode::ZeroPageX => { AddressingMode::ZeroPageX => {
// Use [u8, ..1] from instruction // Use [u8, ..1] from instruction
// Add to X register (as u8 -- the final address is in 0-page) // Add to X register (as u8 -- the final address is in 0-page)
// (Output: an 8-bit zero-page address) // (Output: an 8-bit zero-page address)
OpInput::UseAddress(Address((arr[0] + x) as u16)) OpInput::UseAddress(Address(u16::from(arr[0] + x)))
} }
AddressingMode::ZeroPageY => { AddressingMode::ZeroPageY => {
// Use [u8, ..1] from instruction // Use [u8, ..1] from instruction
// Add to Y register (as u8 -- the final address is in 0-page) // Add to Y register (as u8 -- the final address is in 0-page)
// (Output: an 8-bit zero-page address) // (Output: an 8-bit zero-page address)
OpInput::UseAddress(Address((arr[0] + y) as u16)) OpInput::UseAddress(Address(u16::from(arr[0] + y)))
} }
AddressingMode::Relative => { AddressingMode::Relative => {
// Use [u8, ..1] from instruction // Use [u8, ..1] from instruction
@ -214,12 +214,12 @@ impl AddressingMode {
AddressingMode::AbsoluteX => { AddressingMode::AbsoluteX => {
// Use [u8, ..2] from instruction as address, add X // Use [u8, ..2] from instruction as address, add X
// (Output: a 16-bit address) // (Output: a 16-bit address)
OpInput::UseAddress(arr_to_addr(arr) + AddressDiff(x as i32)) OpInput::UseAddress(arr_to_addr(arr) + AddressDiff(i32::from(x)))
} }
AddressingMode::AbsoluteY => { AddressingMode::AbsoluteY => {
// Use [u8, ..2] from instruction as address, add Y // Use [u8, ..2] from instruction as address, add Y
// (Output: a 16-bit address) // (Output: a 16-bit address)
OpInput::UseAddress(arr_to_addr(arr) + AddressDiff(y as i32)) OpInput::UseAddress(arr_to_addr(arr) + AddressDiff(i32::from(y)))
} }
AddressingMode::Indirect => { AddressingMode::Indirect => {
// Use [u8, ..2] from instruction as an address. Interpret the // Use [u8, ..2] from instruction as an address. Interpret the
@ -234,7 +234,7 @@ impl AddressingMode {
// This is where the absolute (16-bit) target address is stored. // This is where the absolute (16-bit) target address is stored.
// (Output: a 16-bit address) // (Output: a 16-bit address)
let start = arr[0] + x; let start = arr[0] + x;
let slice = memory.get_slice(Address(start as u16), AddressDiff(2)); let slice = memory.get_slice(Address(u16::from(start)), AddressDiff(2));
OpInput::UseAddress(arr_to_addr(slice)) OpInput::UseAddress(arr_to_addr(slice))
} }
AddressingMode::IndirectIndexedY => { AddressingMode::IndirectIndexedY => {
@ -243,8 +243,8 @@ impl AddressingMode {
// Add Y register to this address to get the final address // Add Y register to this address to get the final address
// (Output: a 16-bit address) // (Output: a 16-bit address)
let start = arr[0]; let start = arr[0];
let slice = memory.get_slice(Address(start as u16), AddressDiff(2)); let slice = memory.get_slice(Address(u16::from(start)), AddressDiff(2));
OpInput::UseAddress(arr_to_addr(slice) + AddressDiff(y as i32)) OpInput::UseAddress(arr_to_addr(slice) + AddressDiff(i32::from(y)))
} }
} }
} }

6
src/lib.rs
View File

@ -25,7 +25,8 @@
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE. // POSSIBILITY OF SUCH DAMAGE.
// Needed for debug! / log! macros #![no_std]
#[macro_use] #[macro_use]
extern crate log; extern crate log;
@ -35,7 +36,8 @@ extern crate num;
extern crate bitflags; extern crate bitflags;
pub mod address; pub mod address;
pub mod instruction;
pub mod cpu; pub mod cpu;
pub mod instruction;
pub mod memory; pub mod memory;
pub mod registers; pub mod registers;

38
src/registers.rs
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@ -58,17 +58,17 @@ impl StatusArgs {
bitflags! { bitflags! {
pub struct Status: u8 { pub struct Status: u8 {
const PS_NEGATIVE = 0b10000000; const PS_NEGATIVE = 0b1000_0000;
const PS_OVERFLOW = 0b01000000; const PS_OVERFLOW = 0b0100_0000;
const PS_UNUSED = 0b00100000; // JAM: Should this exist? const PS_UNUSED = 0b0010_0000; // JAM: Should this exist?
// (note that it affects the // (note that it affects the
// behavior of things like // behavior of things like
// from_bits_truncate) // from_bits_truncate)
const PS_BRK = 0b00010000; const PS_BRK = 0b0001_0000;
const PS_DECIMAL_MODE = 0b00001000; const PS_DECIMAL_MODE = 0b0000_1000;
const PS_DISABLE_INTERRUPTS = 0b00000100; const PS_DISABLE_INTERRUPTS = 0b0000_0100;
const PS_ZERO = 0b00000010; const PS_ZERO = 0b0000_0010;
const PS_CARRY = 0b00000001; const PS_CARRY = 0b0000_0001;
} }
} }
@ -100,39 +100,39 @@ impl Status {
let mut out = Status::empty(); let mut out = Status::empty();
if negative { if negative {
out = out | PS_NEGATIVE out |= PS_NEGATIVE
} }
if overflow { if overflow {
out = out | PS_OVERFLOW out |= PS_OVERFLOW
} }
if unused { if unused {
out = out | PS_UNUSED out |= PS_UNUSED
} }
if brk { if brk {
out = out | PS_BRK out |= PS_BRK
} }
if decimal_mode { if decimal_mode {
out = out | PS_DECIMAL_MODE out |= PS_DECIMAL_MODE
} }
if disable_interrupts { if disable_interrupts {
out = out | PS_DISABLE_INTERRUPTS out |= PS_DISABLE_INTERRUPTS
} }
if zero { if zero {
out = out | PS_ZERO out |= PS_ZERO
} }
if carry { if carry {
out = out | PS_CARRY out |= PS_CARRY
} }
out out
} }
pub fn and(&mut self, rhs: Status) { pub fn and(&mut self, rhs: Status) {
*self = *self & rhs; *self &= rhs;
} }
pub fn or(&mut self, rhs: Status) { pub fn or(&mut self, rhs: Status) {
*self = *self | rhs; *self |= rhs;
} }
pub fn set_with_mask(&mut self, mask: Status, rhs: Status) { pub fn set_with_mask(&mut self, mask: Status, rhs: Status) {
@ -146,7 +146,7 @@ pub struct StackPointer(pub u8);
impl StackPointer { impl StackPointer {
pub fn to_address(&self) -> Address { pub fn to_address(&self) -> Address {
let StackPointer(sp) = *self; let StackPointer(sp) = *self;
STACK_ADDRESS_LO + AddressDiff(sp as i32) STACK_ADDRESS_LO + AddressDiff(i32::from(sp))
} }
// JAM: FIXME: Should we prevent overflow here? What would a 6502 do? // JAM: FIXME: Should we prevent overflow here? What would a 6502 do?

1
tests/skeptic.rs Normal file
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@ -0,0 +1 @@
include!(concat!(env!("OUT_DIR"), "/skeptic-tests.rs"));