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https://github.com/mre/mos6502.git
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remove pointless conversion from u8 to u8
This commit is contained in:
parent
d70a7de49f
commit
917db51f89
36
src/cpu.rs
36
src/cpu.rs
@ -203,7 +203,7 @@ impl<M: Bus> CPU<M> {
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(Instruction::ASL, OpInput::UseImplied) => {
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// Accumulator mode
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let mut val = self.registers.accumulator as u8;
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let mut val = self.registers.accumulator;
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CPU::<M>::shift_left_with_flags(&mut val, &mut self.registers.status);
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self.registers.accumulator = val;
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}
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@ -234,7 +234,7 @@ impl<M: Bus> CPU<M> {
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}
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(Instruction::BIT, OpInput::UseAddress(addr)) => {
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let a: u8 = self.registers.accumulator as u8;
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let a: u8 = self.registers.accumulator;
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let m: u8 = self.memory.get_byte(addr);
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let res = a & m;
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@ -402,7 +402,7 @@ impl<M: Bus> CPU<M> {
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(Instruction::LSR, OpInput::UseImplied) => {
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// Accumulator mode
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let mut val = self.registers.accumulator as u8;
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let mut val = self.registers.accumulator;
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CPU::<M>::shift_right_with_flags(&mut val, &mut self.registers.status);
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self.registers.accumulator = val;
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}
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@ -422,7 +422,7 @@ impl<M: Bus> CPU<M> {
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(Instruction::PHA, OpInput::UseImplied) => {
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// Push accumulator
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let val = self.registers.accumulator as u8;
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let val = self.registers.accumulator;
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self.push_on_stack(val);
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}
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(Instruction::PHP, OpInput::UseImplied) => {
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@ -456,7 +456,7 @@ impl<M: Bus> CPU<M> {
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(Instruction::ROL, OpInput::UseImplied) => {
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// Accumulator mode
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let mut val = self.registers.accumulator as u8;
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let mut val = self.registers.accumulator;
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CPU::<M>::rotate_left_with_flags(&mut val, &mut self.registers.status);
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self.registers.accumulator = val;
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}
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@ -467,7 +467,7 @@ impl<M: Bus> CPU<M> {
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}
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(Instruction::ROR, OpInput::UseImplied) => {
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// Accumulator mode
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let mut val = self.registers.accumulator as u8;
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let mut val = self.registers.accumulator;
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CPU::<M>::rotate_right_with_flags(&mut val, &mut self.registers.status);
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self.registers.accumulator = val;
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}
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@ -516,7 +516,7 @@ impl<M: Bus> CPU<M> {
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}
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(Instruction::STA, OpInput::UseAddress(addr)) => {
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self.memory.set_byte(addr, self.registers.accumulator as u8);
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self.memory.set_byte(addr, self.registers.accumulator);
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}
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(Instruction::STX, OpInput::UseAddress(addr)) => {
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self.memory.set_byte(addr, self.registers.index_x);
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@ -527,11 +527,11 @@ impl<M: Bus> CPU<M> {
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(Instruction::TAX, OpInput::UseImplied) => {
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let val = self.registers.accumulator;
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self.load_x_register(val as u8);
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self.load_x_register(val);
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}
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(Instruction::TAY, OpInput::UseImplied) => {
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let val = self.registers.accumulator;
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self.load_y_register(val as u8);
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self.load_y_register(val);
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}
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(Instruction::TSX, OpInput::UseImplied) => {
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let StackPointer(val) = self.registers.stack_pointer;
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@ -698,13 +698,13 @@ impl<M: Bus> CPU<M> {
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fn add_with_carry(&mut self, value: u8) {
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#[cfg(feature = "decimal_mode")]
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fn decimal_adjust(result: u8) -> u8 {
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let bcd1: u8 = if (result & 0x0f) as u8 > 0x09 {
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let bcd1: u8 = if (result & 0x0f) > 0x09 {
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0x06
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} else {
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0x00
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};
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let bcd2: u8 = if (result.wrapping_add(bcd1) as u8 & 0xf0) > 0x90 {
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let bcd2: u8 = if (result.wrapping_add(bcd1) & 0xf0) > 0x90 {
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0x60
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} else {
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0x00
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@ -718,8 +718,8 @@ impl<M: Bus> CPU<M> {
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let a_after: u8 = a_before.wrapping_add(c_before).wrapping_add(value);
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debug_assert_eq!(
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a_after as u8,
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a_before.wrapping_add(c_before).wrapping_add(value) as u8
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a_after,
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a_before.wrapping_add(c_before).wrapping_add(value)
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);
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#[cfg(feature = "decimal_mode")]
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@ -732,7 +732,7 @@ impl<M: Bus> CPU<M> {
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#[cfg(not(feature = "decimal_mode"))]
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let result: u8 = a_after;
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let did_carry = (result as u8) < (a_before as u8) || (a_after == 0 && c_before == 0x01);
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let did_carry = (result) < (a_before) || (a_after == 0 && c_before == 0x01);
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let did_overflow = (a_before > 127 && value > 127 && a_after < 128)
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|| (a_before < 128 && value < 128 && a_after > 127);
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@ -793,7 +793,7 @@ impl<M: Bus> CPU<M> {
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0x00
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};
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let bcd2: u8 = if (a_after.wrapping_sub(bcd1) as u8 & 0xf0) > 0x90 {
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let bcd2: u8 = if (a_after.wrapping_sub(bcd1) & 0xf0) > 0x90 {
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0x60
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} else {
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0x00
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@ -810,7 +810,7 @@ impl<M: Bus> CPU<M> {
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let result: i8 = a_after;
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// The carry flag is set on unsigned overflow.
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let did_carry = (result as u8) > (a_before as u8);
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let did_carry = (result) > (a_before);
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self.registers.status.set_with_mask(
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mask,
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@ -924,7 +924,7 @@ impl<M: Bus> CPU<M> {
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self.registers.status.remove(Status::PS_CARRY);
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}
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if r == val as u8 {
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if r == val {
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self.registers.status.insert(Status::PS_ZERO);
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} else {
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self.registers.status.remove(Status::PS_ZERO);
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@ -1052,7 +1052,7 @@ mod tests {
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cpu.registers.accumulator = 0;
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cpu.subtract_with_carry(0x48);
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assert_eq!(cpu.registers.accumulator as u8, 0x52);
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assert_eq!(cpu.registers.accumulator, 0x52);
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assert!(cpu.registers.status.contains(Status::PS_CARRY));
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assert!(!cpu.registers.status.contains(Status::PS_ZERO));
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assert!(!cpu.registers.status.contains(Status::PS_NEGATIVE));
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