1
0
mirror of https://github.com/mre/mos6502.git synced 2024-12-22 12:29:31 +00:00

the get_byte method needs to take mutable reference to self

the reson for this is it's possible for external hardware to have some
side effect on a read.
This commit is contained in:
Sam M W 2023-04-03 22:46:46 +01:00
parent 26926a9feb
commit 9f75d1a6b5
2 changed files with 4 additions and 4 deletions

View File

@ -83,9 +83,9 @@ impl<M: Bus> CPU<M> {
let x = self.registers.index_x; let x = self.registers.index_x;
let y = self.registers.index_y; let y = self.registers.index_y;
let memory = &self.memory; let memory = &mut self.memory;
fn read_address<M: Bus>(mem: &M, addr: u16) -> [u8; 2] { fn read_address<M: Bus>(mem: &mut M, addr: u16) -> [u8; 2] {
let lo = mem.get_byte(addr); let lo = mem.get_byte(addr);
let hi = mem.get_byte(addr.wrapping_add(1)); let hi = mem.get_byte(addr.wrapping_add(1));
[lo, hi] [lo, hi]

View File

@ -59,7 +59,7 @@ impl Default for Memory {
} }
pub trait Bus { pub trait Bus {
fn get_byte(&self, address: u16) -> u8; fn get_byte(&mut self, address: u16) -> u8;
fn set_byte(&mut self, address: u16, value: u8); fn set_byte(&mut self, address: u16, value: u8);
fn set_bytes(&mut self, start: u16, values: &[u8]) { fn set_bytes(&mut self, start: u16, values: &[u8]) {
@ -78,7 +78,7 @@ impl Memory {
} }
impl Bus for Memory { impl Bus for Memory {
fn get_byte(&self, address: u16) -> u8 { fn get_byte(&mut self, address: u16) -> u8 {
self.bytes[address as usize] self.bytes[address as usize]
} }