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Add just a bit of extra annotation to the Instruction chart
This commit is contained in:
Johannes Muenzel
parent
0b2c805a96
commit
e4c998ddfd
170
src/machine6502/defs/mod.rs
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170
src/machine6502/defs/mod.rs
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// Copyright (C) 2014 The 6502-rs Developers
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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// 1. Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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// 3. Neither the names of the copyright holders nor the names of any
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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// Abbreviations
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//
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// General
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//
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// M | `Memory location`
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//
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// Registers
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//
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// A | accumulator
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// X | general purpose register
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// Y | general purpose register
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// NV-BDIZC | processor status flags -- see ProcessorStatus bitflags
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// SP | stack pointer
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// PC | program counter
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//
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pub bitflags! {
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flags ProcessorStatus: u8 {
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static N = 0b10000000, // Negative -- sometimes called S for "sign"
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static V = 0b01000000, // oVerflow
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static B = 0b00010000, // Brk
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static D = 0b00001000, // Decimal mode active?
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static I = 0b00000100, // Irq disabled?
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static Z = 0b00000010, // Zero
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static C = 0b00000001, // Carry
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}
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}
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#[allow(non_snake_case)]
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pub struct Machine {
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pub A : u8,
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pub X : u8,
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pub Y : u8,
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pub P : ProcessorStatus,
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pub SP : u8,
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pub PC : u16,
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}
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impl Machine {
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pub fn new() -> Machine {
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Machine {
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A: 0,
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X: 0,
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Y: 0,
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SP: 0,
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P: ProcessorStatus::empty(),
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PC: 0
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}
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}
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}
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pub struct StackPointer(u8);
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pub static STACK_POINTER_IN_MEMORY_LO : u16 = 0x0100;
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pub static STACK_POINTER_IN_MEMORY_HI : u16 = 0x01FF;
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pub struct MemoryAddr(u16);
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pub fn stack_pointer_to_addr(StackPointer(x) : StackPointer) -> MemoryAddr
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{
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MemoryAddr(x as u16 + STACK_POINTER_IN_MEMORY_HI)
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}
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#[deriving(Show)]
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pub enum Instruction
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// i/o vars should be listed as follows:
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// NV BDIZC A X Y SP PC M
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//
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// | outputs | inputs
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{ ADC // ADd with Carry................ | NV ...ZC A = A + M + C
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, AND // logical AND (bitwise)......... | N. ...Z. A = A && M
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, ASL // Arithmetic Shift Left......... | N. ...ZC A = M << 1
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, BCC // Branch if Carry Clear......... | .. ..... PC = !C
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, BCS // Branch if Carry Set........... | .. ..... PC = C
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, BEQ // Branch if Equal (to zero?).... | .. ..... PC = Z
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, BIT // BIT test...................... | NV ...Z. = A & M
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, BMI // Branch if Minus............... | .. ..... PC = N
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, BNE // Branch if Not Equal........... | .. ..... PC = !Z
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, BPL // Branch if Positive............ | .. ..... PC = Z
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, BRK // BReaK......................... | .. .....
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, BVC // Branch if oVerflow Clear...... | .. .....
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, BVS // Branch if oVerflow Set........ | .. .....
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, CLC // CLear Carry flag.............. | .. .....
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, CLD // Clear Decimal Mode............ | .. .....
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, CLI // Clear Interrupt Disable....... | .. .....
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, CLV // Clear oVerflow flag........... | .. .....
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, CMP // Compare....................... | .. .....
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, CPX // Compare X register............ | .. .....
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, CPY // Compare Y register............ | .. .....
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, DEC // DECrement memory.............. | .. .....
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, DEX // DEcrement X register.......... | .. .....
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, DEY // DEcrement Y register.......... | .. .....
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, EOR // Exclusive OR.................. | .. .....
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, INC // INCrement memory.............. | .. .....
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, INX // INcrement X register.......... | .. .....
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, INY // INcrement Y register.......... | .. .....
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, JMP // JuMP.......................... | .. .....
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, JSR // Jump to SubRoutine............ | .. .....
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, LDA // LoaD Accumulator.............. | .. .....
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, LDX // LoaD X register............... | .. .....
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, LDY // LoaD Y register............... | .. .....
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, LSR // Logical Shift Right........... | .. .....
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, NOP // No OPeration.................. | .. .....
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, ORA // inclusive OR.................. | .. .....
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, PHA // PusH Accumulator.............. | .. .....
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, PHP // PusH Processor status......... | .. .....
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, PLA // PuLl Accumulator.............. | .. .....
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, PLP // PuLl Processor status......... | .. .....
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, ROL // ROtate Left................... | .. .....
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, ROR // ROtate Right.................. | .. .....
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, RTI // ReTurn from Interrupt......... | .. .....
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, RTS // ReTurn from Subroutine........ | .. .....
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, SBC // SuBtract with Carry........... | .. .....
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, SEC // SEt Carry flag................ | .. .....
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, SED // SEt Decimal flag.............. | .. .....
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, SEI // SEt Interrupt disable......... | .. .....
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, STA // STore Accumulator............. | .. .....
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, STX // STore X register.............. | .. .....
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, STY // STore Y register.............. | .. .....
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, TAX // Transfer Accumulator to X..... | .. .....
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, TAY // Transfer Accumulator to Y..... | .. .....
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, TSX // Transfer Stack pointer to X... | .. .....
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, TXA // Transfer X to Accumulator..... | .. .....
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, TXS // Transfer X to Stack pointer... | .. .....
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, TYA // Transfer Y to Accumulator..... | .. .....
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}
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pub enum AddressingMode {
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Immediate,
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Absolute,
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ZeroPage,
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Implied,
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IndirectAbsolute,
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AbsoluteIndexedX,
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AbsoluteIndexedY,
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ZeroPageIndexedX,
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ZeroageIndexedY,
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IndexedIndirect,
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IndirectIndexed,
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Relative,
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Accumulator,
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}
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@ -25,5 +25,5 @@
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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pub mod machine;
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pub mod defs;
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@ -1,164 +0,0 @@
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// Copyright (C) 2014 The 6502-rs Developers
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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// 1. Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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// 3. Neither the names of the copyright holders nor the names of any
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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// Abbreviations
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//
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// Registers
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//
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// A accumulator
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// X general purpose register
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// Y general purpose register
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// SP stack pointer
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// NV-BDIZC processor status flags -- see ProcessorStatus bitflags
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// PC program counter
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//
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// M stands for `Memory location`
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pub bitflags! {
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flags ProcessorStatus: u8 {
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static N = 0b10000000, // Negative
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static V = 0b01000000, // oVerflow
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static B = 0b00010000, // Brk
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static D = 0b00001000, // Decimal mode active?
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static I = 0b00000100, // Irq disabled?
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static Z = 0b00000010, // Zero
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static C = 0b00000001, // Carry
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}
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}
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#[allow(non_snake_case)]
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pub struct Machine {
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pub A : u8,
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pub X : u8,
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pub Y : u8,
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pub SP : u8,
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pub P : ProcessorStatus,
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pub PC : u16,
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}
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impl Machine {
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pub fn new() -> Machine {
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Machine {
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A: 0,
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X: 0,
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Y: 0,
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SP: 0,
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P: ProcessorStatus::empty(),
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PC: 0
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}
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}
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}
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pub struct StackPointer(u8);
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pub static STACK_POINTER_IN_MEMORY_LO : u16 = 0x0100;
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pub static STACK_POINTER_IN_MEMORY_HI : u16 = 0x01FF;
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pub struct MemoryAddr(u16);
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pub fn stack_pointer_to_addr(StackPointer(x) : StackPointer) -> MemoryAddr
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{
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MemoryAddr(x as u16 + STACK_POINTER_IN_MEMORY_HI)
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}
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#[deriving(Show)]
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pub enum Instruction
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// out in
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{ ADC // ADd with Carry................ A,Z,C,N = A + M + C
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, AND // logical AND................... A,Z,N = A && M
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, ASL // Arithmetic Shift Left......... A,Z,C,N = M << 1
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, BCC // Branch if Carry Clear......... _ <-
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, BCS // Branch if Carry Set...........
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, BEQ // Branch if Equal...............
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, BIT // BIT test...................... a &
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, BMI // Branch if Minus...............
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, BNE // Branch if Not Equal...........
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, BPL // Branch if Positive............
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, BRK // BReaK.........................
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, BVC // Branch if oVerflow Clear......
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, BVS // Branch if oVerflow Set........
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, CLC // CLear Carry flag..............
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, CLD // Clear Decimal Mode............
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, CLI // Clear Interrupt Disable.......
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, CLV // Clear oVerflow flag...........
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, CMP // Compare.......................
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, CPX // Compare X register............
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, CPY // Compare Y register............
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, DEC // DECrement memory..............
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, DEX // DEcrement X register..........
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, DEY // DEcrement Y register..........
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, EOR // Exclusive OR..................
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, INC // INCrement memory..............
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, INX // INcrement X register..........
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, INY // INcrement Y register..........
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, JMP // JuMP..........................
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, JSR // Jump to SubRoutine............
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, LDA // LoaD Accumulator..............
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, LDX // LoaD X register...............
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, LDY // LoaD Y register...............
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, LSR // Logical Shift Right...........
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, NOP // No OPeration..................
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, ORA // inclusive OR..................
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, PHA // PusH Accumulator..............
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, PHP // PusH Processor status.........
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, PLA // PuLl Accumulator..............
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, PLP // PuLl Processor status.........
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, ROL // ROtate Left...................
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, ROR // ROtate Right..................
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, RTI // ReTurn from Interrupt.........
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, RTS // ReTurn from Subroutine........
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, SBC // SuBtract with Carry...........
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, SEC // SEt Carry flag................
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, SED // SEt Decimal flag..............
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, SEI // SEt Interrupt disable.........
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, STA // STore Accumulator.............
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, STX // STore X register..............
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, STY // STore Y register..............
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, TAX // Transfer Accumulator to X.....
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, TAY // Transfer Accumulator to Y.....
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, TSX // Transfer Stack pointer to X...
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, TXA // Transfer X to Accumulator.....
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, TXS // Transfer X to Stack pointer...
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, TYA // Transfer Y to Accumulator.....
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}
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pub enum AddressingMode {
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Immediate,
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Absolute,
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ZeroPage,
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Implied,
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IndirectAbsolute,
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AbsoluteIndexedX,
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AbsoluteIndexedY,
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ZeroPageIndexedX,
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ZeroageIndexedY,
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IndexedIndirect,
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IndirectIndexed,
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Relative,
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Accumulator,
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}
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@ -27,7 +27,7 @@
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extern crate machine6502;
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use machine6502::machine::Machine;
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use machine6502::defs::Machine;
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fn main() {
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let _q = Machine::new();
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