mirror of https://github.com/mre/mos6502.git
BRK on CMOS clears the decimal flag
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parent
cfb956f6a2
commit
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12
src/cpu.rs
12
src/cpu.rs
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@ -326,6 +326,18 @@ impl<M: Bus, V: Variant> CPU<M, V> {
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self.registers.status.or(Status::PS_DISABLE_INTERRUPTS);
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}
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(Instruction::BRKcld, OpInput::UseImplied) => {
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for b in self.registers.program_counter.wrapping_sub(1).to_be_bytes() {
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self.push_on_stack(b);
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}
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self.push_on_stack(self.registers.status.bits());
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let pcl = self.memory.get_byte(0xfffe);
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let pch = self.memory.get_byte(0xffff);
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self.jump(((pch as u16) << 8) | pcl as u16);
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self.registers.status.or(Status::PS_DISABLE_INTERRUPTS);
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self.registers.status.and(!Status::PS_DECIMAL_MODE);
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}
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(Instruction::BVC, OpInput::UseRelative(rel)) => {
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let addr = self.registers.program_counter.wrapping_add(rel);
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self.branch_if_overflow_clear(addr);
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@ -57,6 +57,7 @@ pub enum Instruction {
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BPL, // Branch if Positive............ | .. ..... PC = Z
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BRA, // Unconditional BRAnch.......... | .. B.... S PC =
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BRK, // BReaK......................... | .. B.... S PC =
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BRKcld,// BReaK, clearing decimal flag.. | .. BD... S PC =
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BVC, // Branch if oVerflow Clear...... | .. ..... PC = !V
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BVS, // Branch if oVerflow Set........ | .. ..... PC = V
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CLC, // CLear Carry flag.............. | .. ....C = 0
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@ -495,6 +496,7 @@ impl crate::Variant for Cmos6502 {
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fn decode(opcode: u8) -> Option<(Instruction, AddressingMode)> {
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// TODO: We obviously need to add the other CMOS instructions here.
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match opcode {
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0x00 => Some((Instruction::BRKcld, AddressingMode::Implied)),
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0x1a => Some((Instruction::INC, AddressingMode::Accumulator)),
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0x3a => Some((Instruction::DEC, AddressingMode::Accumulator)),
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0x6c => Some((Instruction::JMP, AddressingMode::Indirect)),
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