mirror of https://github.com/mre/mos6502.git
Compare commits
13 Commits
87dd7c4e85
...
54196929d8
Author | SHA1 | Date |
---|---|---|
omarandlorraine | 54196929d8 | |
Sam M W | 0f1c01ce60 | |
Sam M W | 2c26ebb00a | |
Sam M W | df51b077e7 | |
Sam M W | 309ad50374 | |
Sam M W | 4847744518 | |
Matthias Endler | 11d9540729 | |
Sam M W | bf06ad8924 | |
Sam M W | 54dd0cd536 | |
Sam M W | 2444ef52d1 | |
Sam M W | ad622bc930 | |
Sam M W | 97d6b3fd89 | |
Sam M W | da30c8c67d |
|
@ -156,7 +156,7 @@ impl<M: Bus, V: Variant> CPU<M, V> {
|
|||
// (Output: a 16-bit address)
|
||||
// TODO: If the pointer ends in 0xff, then incrementing it would propagate
|
||||
// the carry to the high byte of the pointer. This incurs a cost of one
|
||||
// machine on the real 65C02, which is not implemented here.
|
||||
// machine cycle on the real 65C02, which is not implemented here.
|
||||
let slice = read_address(memory, address_from_bytes(slice[0], slice[1]));
|
||||
OpInput::UseAddress(address_from_bytes(slice[0], slice[1]))
|
||||
}
|
||||
|
@ -580,6 +580,9 @@ impl<M: Bus, V: Variant> CPU<M, V> {
|
|||
(Instruction::STY, OpInput::UseAddress(addr)) => {
|
||||
self.memory.set_byte(addr, self.registers.index_y);
|
||||
}
|
||||
(Instruction::STZ, OpInput::UseAddress(addr)) => {
|
||||
self.memory.set_byte(addr, 0);
|
||||
}
|
||||
|
||||
(Instruction::TAX, OpInput::UseImplied) => {
|
||||
let val = self.registers.accumulator;
|
||||
|
|
|
@ -100,6 +100,7 @@ pub enum Instruction {
|
|||
STA, // STore Accumulator............. | .. ..... M = A
|
||||
STX, // STore X register.............. | .. ..... M = X
|
||||
STY, // STore Y register.............. | .. ..... M = Y
|
||||
STZ, // STore Zero.................... | .. ..... M = Y
|
||||
TAX, // Transfer Accumulator to X..... | N. ...Z. X = A
|
||||
TAY, // Transfer Accumulator to Y..... | N. ...Z. Y = A
|
||||
TSX, // Transfer Stack pointer to X... | N. ...Z. X = S
|
||||
|
@ -494,6 +495,10 @@ impl crate::Variant for Cmos6502 {
|
|||
0x3a => Some((Instruction::DEC, AddressingMode::Accumulator)),
|
||||
0x6c => Some((Instruction::JMP, AddressingMode::Indirect)),
|
||||
0x80 => Some((Instruction::BRA, AddressingMode::Relative)),
|
||||
0x64 => Some((Instruction::STZ, AddressingMode::ZeroPage)),
|
||||
0x74 => Some((Instruction::STZ, AddressingMode::ZeroPageX)),
|
||||
0x9c => Some((Instruction::STZ, AddressingMode::Absolute)),
|
||||
0x9e => Some((Instruction::STZ, AddressingMode::AbsoluteX)),
|
||||
_ => Nmos6502::decode(opcode),
|
||||
}
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue