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ossc/software/sys_controller_bsp/drivers/inc/pll_reconfig_regs.h

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optimize clock network * replace all clock muxes with a single cycloneive_clkctrl to minimize skew * use a single dynamically configured PLL to comply with cycloneive_clkctrl
2019-10-05 21:26:50 +00:00
../../../../ip/pll_reconfig/inc/pll_reconfig_regs.h
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