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optimize code size and add HDR flag setting

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This commit is contained in:
marqs 2023-08-27 10:55:45 +03:00
parent 4bc98224e4
commit 6ae321a9ff
7 changed files with 7134 additions and 7256 deletions
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2
software/sys_controller/link.common.ld
View File

@ -7,7 +7,7 @@ MEMORY
}
/* Stack information variables */
_min_stack = 0x400; /* 1K - minimum stack space to reserve */
_min_stack = 0x4B0; /* 1200 - minimum stack space to reserve */
_stack_start = ORIGIN(dataram) + LENGTH(dataram);
/* We have to align each sector to word boundaries as our current s19->slm

14162
software/sys_controller/mem_init/sys_onchip_memory2_0.hex
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File diff suppressed because it is too large Load Diff

17
software/sys_controller/ossc/av_controller.c
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@ -1116,11 +1116,18 @@ int main()
cm.cc.tx_mode = tc.tx_mode;
cm.clkcnt = 0; //TODO: proper invalidate
}
if ((tc.tx_mode != TX_DVI) && (tc.hdmi_itc != cm.cc.hdmi_itc)) {
//EnableAVIInfoFrame(FALSE, NULL);
printf("setting ITC to %d\n", tc.hdmi_itc);
HDMITX_SetAVIInfoFrame(vmode_out.vic, (tc.tx_mode == TX_HDMI_RGB) ? F_MODE_RGB444 : F_MODE_YUV444, 0, 0, tc.hdmi_itc, vm_conf.hdmitx_pixr_ifr);
cm.cc.hdmi_itc = tc.hdmi_itc;
if (tc.tx_mode != TX_DVI) {
if (tc.hdmi_itc != cm.cc.hdmi_itc) {
//EnableAVIInfoFrame(FALSE, NULL);
printf("setting ITC to %d\n", tc.hdmi_itc);
HDMITX_SetAVIInfoFrame(vmode_out.vic, (tc.tx_mode == TX_HDMI_RGB) ? F_MODE_RGB444 : F_MODE_YUV444, 0, 0, tc.hdmi_itc, vm_conf.hdmitx_pixr_ifr);
cm.cc.hdmi_itc = tc.hdmi_itc;
}
if (tc.hdmi_hdr != cm.cc.hdmi_hdr) {
printf("setting HDR flag to %d\n", tc.hdmi_hdr);
HDMITX_SetHDRInfoFrame(tc.hdmi_hdr ? 3 : 0);
cm.cc.hdmi_hdr = tc.hdmi_hdr;
}
}
if (tc.av3_alt_rgb != cm.cc.av3_alt_rgb) {
printf("Changing AV3 RGB source\n");

3
software/sys_controller/ossc/avconfig.h
View File

@ -110,7 +110,7 @@ typedef struct {
alt_u8 sl_altern;
alt_u8 sl_str;
alt_u8 sl_id;
alt_u8 sl_cust_l_str[5];
alt_u8 sl_cust_l_str[6];
alt_u8 sl_cust_c_str[6];
alt_u8 sl_cust_iv_x;
alt_u8 sl_cust_iv_y;
@ -141,6 +141,7 @@ typedef struct {
/* TX / extra settings */
alt_u8 tx_mode;
alt_u8 hdmi_itc;
alt_u8 hdmi_hdr;
alt_u8 full_tx_setup;
alt_u8 av3_alt_rgb;
avinput_t link_av;

3
software/sys_controller/ossc/firmware.c
View File

@ -103,7 +103,7 @@ int fw_update()
#ifdef CHECK_STACK_USE
// estimate stack usage, assuming around here is the worst case (due to 512B databuf)
alt_u32 sp;
asm volatile("mov %0, sp" : "=r"(sp));
asm volatile("mv %0, sp" : "=r"(sp));
sniprintf(menu_row1, LCD_ROW_LEN+1, "Stack size:");
sniprintf(menu_row2, LCD_ROW_LEN+1, "%lu bytes", (ONCHIP_MEMORY2_0_BASE+ONCHIP_MEMORY2_0_SIZE_VALUE)-sp);
ui_disp_menu(1);
@ -161,7 +161,6 @@ update_init:
goto failure;
strncpy(menu_row1, "Verifying flash", LCD_ROW_LEN+1);
strncpy(menu_row2, "please wait...", LCD_ROW_LEN+1);
ui_disp_menu(1);
retval = verify_flash(0, fw_header.data_len, fw_header.data_crc, databuf);
if (retval != 0)

2
software/sys_controller/ossc/menu.c
View File

@ -128,6 +128,7 @@ MENU(menu_cust_sl, P99_PROTECT({ \
{ "Sub-line 3 str", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.sl_cust_l_str[2], OPT_NOWRAP, 0, SCANLINESTR_MAX+1, sl_cust_str_disp } } },
{ "Sub-line 4 str", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.sl_cust_l_str[3], OPT_NOWRAP, 0, SCANLINESTR_MAX+1, sl_cust_str_disp } } },
{ "Sub-line 5 str", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.sl_cust_l_str[4], OPT_NOWRAP, 0, SCANLINESTR_MAX+1, sl_cust_str_disp } } },
{ "Sub-line 6 str", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.sl_cust_l_str[5], OPT_NOWRAP, 0, SCANLINESTR_MAX+1, sl_cust_str_disp } } },
{ "Sub-column 1 str", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.sl_cust_c_str[0], OPT_NOWRAP, 0, SCANLINESTR_MAX+1, sl_cust_str_disp } } },
{ "Sub-column 2 str", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.sl_cust_c_str[1], OPT_NOWRAP, 0, SCANLINESTR_MAX+1, sl_cust_str_disp } } },
{ "Sub-column 3 str", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.sl_cust_c_str[2], OPT_NOWRAP, 0, SCANLINESTR_MAX+1, sl_cust_str_disp } } },
@ -185,6 +186,7 @@ MENU(menu_output, P99_PROTECT({ \
{ LNG("256x240 aspect","256x240ｱｽﾍﾟｸﾄ"), OPT_AVCONFIG_SELECTION, { .sel = { &tc.ar_256col, OPT_WRAP, SETTING_ITEM(ar_256col_desc) } } },
{ LNG("TX mode","TXﾓｰﾄﾞ"), OPT_AVCONFIG_SELECTION, { .sel = { &tc.tx_mode, OPT_WRAP, SETTING_ITEM(tx_mode_desc) } } },
{ "HDMI ITC", OPT_AVCONFIG_SELECTION, { .sel = { &tc.hdmi_itc, OPT_WRAP, SETTING_ITEM(off_on_desc) } } },
{ "HDMI HDR flag", OPT_AVCONFIG_SELECTION, { .sel = { &tc.hdmi_hdr, OPT_WRAP, SETTING_ITEM(off_on_desc) } } },
}))
MENU(menu_scanlines, P99_PROTECT({ \

201
software/sys_controller/ossc/video_modes.c
View File

@ -153,10 +153,10 @@ int get_pure_lm_mode(avconfig_t *cc, mode_data_t *vm_in, mode_data_t *vm_out, vm
valid_lm[3] = MODE_L2_240x360;
valid_lm[4] = MODE_L3_240x360;
if ((!vm_in->timings.h_total) && (mode_preset->timings.v_total == 449)) {
if (!strncmp(mode_preset->name, "720x400_70", 10)) {
if ((video_modes_plm_default[i].timings.h_active == 720) && (video_modes_plm_default[i].timings.v_active == 400)) {
if (cc->s400p_mode == 0)
continue;
} else if (!strncmp(mode_preset->name, "640x400_70", 10)) {
} else if ((video_modes_plm_default[i].timings.h_active == 640) && (video_modes_plm_default[i].timings.v_active == 400)) {
if (cc->s400p_mode == 1)
continue;
}
@ -243,6 +243,17 @@ int get_pure_lm_mode(avconfig_t *cc, mode_data_t *vm_in, mode_data_t *vm_out, vm
mindiff_lm &= mode_preset->flags; //ensure L2 mode uniqueness
if (mindiff_lm >= MODE_L6_GEN_4_3)
vm_conf->y_rpt = 5;
else if (mindiff_lm >= MODE_L5_GEN_4_3)
vm_conf->y_rpt = 4;
else if (mindiff_lm >= MODE_L4_GEN_4_3)
vm_conf->y_rpt = 3;
else if (mindiff_lm >= MODE_L3_GEN_16_9)
vm_conf->y_rpt = 2;
else if (mindiff_lm >= MODE_L2)
vm_conf->y_rpt = 1;
switch (mindiff_lm) {
case MODE_PT:
vm_out->vic = vm_in->vic;
@ -252,11 +263,8 @@ int get_pure_lm_mode(avconfig_t *cc, mode_data_t *vm_in, mode_data_t *vm_out, vm
vm_conf->x_rpt = vm_conf->h_skip = 2*(vm_conf->h_skip+1)-1;
}
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
break;
case MODE_L2:
vm_conf->y_rpt = 1;
// Upsample / pixel-repeat horizontal resolution of 384p/480p/960i modes
if ((mode_preset->group == GROUP_384P) || (mode_preset->group == GROUP_480P) || (mode_preset->group == GROUP_576P) || ((mode_preset->group == GROUP_1080I) && (mode_preset->timings.h_total < 1200))) {
if (upsample2x) {
@ -269,37 +277,8 @@ int get_pure_lm_mode(avconfig_t *cc, mode_data_t *vm_in, mode_data_t *vm_out, vm
} else {
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
}
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
break;
case MODE_L2_512_COL:
vm_conf->y_rpt = 1;
vm_conf->x_rpt = vm_conf->h_skip = 1;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
break;
case MODE_L2_384_COL:
case MODE_L2_320_COL:
vm_conf->y_rpt = 1;
vm_conf->x_rpt = vm_conf->h_skip = 1;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
break;
case MODE_L2_256_COL:
vm_conf->y_rpt = 1;
vm_conf->x_rpt = vm_conf->h_skip = 2;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
vm_conf->x_rpt -= cc->ar_256col;
break;
case MODE_L2_240x360:
vm_conf->y_rpt = 1;
vm_conf->x_rpt = vm_conf->h_skip = 4;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
break;
case MODE_L3_GEN_16_9:
vm_conf->y_rpt = 2;
// Upsample / pixel-repeat horizontal resolution of 480i mode
if ((mode_preset->group == GROUP_480I) || (mode_preset->group == GROUP_576I)) {
if (upsample2x) {
@ -312,10 +291,8 @@ int get_pure_lm_mode(avconfig_t *cc, mode_data_t *vm_in, mode_data_t *vm_out, vm
} else {
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
}
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
break;
case MODE_L3_GEN_4_3:
vm_conf->y_rpt = 2;
vm_conf->x_size = vm_out->timings.h_active-2*vm_in->mask.h;
vm_out->timings.h_synclen /= 3;
vm_out->timings.h_backporch /= 3;
@ -323,43 +300,8 @@ int get_pure_lm_mode(avconfig_t *cc, mode_data_t *vm_in, mode_data_t *vm_out, vm
vm_out->timings.h_total /= 3;
vm_out->timings.h_total_adj = 0;
vmode_hv_mult(vm_out, 4, VM_OUT_YMULT);
vm_conf->si_pclk_mult = 4;
break;
case MODE_L3_512_COL:
vm_conf->y_rpt = 2;
vm_conf->x_rpt = vm_conf->h_skip = 1;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
break;
case MODE_L3_384_COL:
vm_conf->y_rpt = 2;
vm_conf->x_rpt = vm_conf->h_skip = 2;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
break;
case MODE_L3_320_COL:
vm_conf->y_rpt = 2;
vm_conf->x_rpt = vm_conf->h_skip = 3;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
vm_conf->x_rpt = 2;
break;
case MODE_L3_256_COL:
vm_conf->y_rpt = 2;
vm_conf->x_rpt = vm_conf->h_skip = 4;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
vm_conf->x_rpt = cc->ar_256col ? 2 : 3;
break;
case MODE_L3_240x360:
vm_conf->y_rpt = 2;
vm_conf->x_rpt = vm_conf->h_skip = 6;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
break;
case MODE_L4_GEN_4_3:
vm_conf->y_rpt = 3;
// Upsample / pixel-repeat horizontal resolution of 480i mode
if ((mode_preset->group == GROUP_480I) || (mode_preset->group == GROUP_576I)) {
if (upsample2x) {
@ -372,94 +314,50 @@ int get_pure_lm_mode(avconfig_t *cc, mode_data_t *vm_in, mode_data_t *vm_out, vm
} else {
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
}
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
break;
case MODE_L4_512_COL:
vm_conf->y_rpt = 3;
vm_conf->x_rpt = vm_conf->h_skip = 1;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
break;
case MODE_L4_384_COL:
vm_conf->y_rpt = 3;
vm_conf->x_rpt = vm_conf->h_skip = 2;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
break;
case MODE_L4_320_COL:
vm_conf->y_rpt = 3;
vm_conf->x_rpt = vm_conf->h_skip = 3;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
break;
case MODE_L4_256_COL:
vm_conf->y_rpt = 3;
vm_conf->x_rpt = vm_conf->h_skip = 4;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
vm_conf->x_rpt -= cc->ar_256col;
break;
case MODE_L5_GEN_4_3:
vm_conf->y_rpt = 4;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
// Force TX pixel-repeat
if (mode_preset->group == GROUP_288P)
vm_conf->tx_pixelrep = 1;
break;
case MODE_L5_512_COL:
vm_conf->y_rpt = 4;
vm_conf->x_rpt = vm_conf->h_skip = 2;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
break;
case MODE_L5_384_COL:
vm_conf->y_rpt = 4;
vm_conf->x_rpt = vm_conf->h_skip = 3;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
break;
case MODE_L5_320_COL:
vm_conf->y_rpt = 4;
vm_conf->x_rpt = vm_conf->h_skip = 4;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
break;
case MODE_L5_256_COL:
vm_conf->y_rpt = 4;
vm_conf->x_rpt = vm_conf->h_skip = 5;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
vm_conf->x_rpt -= cc->ar_256col;
break;
case MODE_L6_GEN_4_3:
vm_conf->y_rpt = 5;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
vm_conf->tx_pixelrep = 1;
break;
case MODE_L2_512_COL:
case MODE_L2_384_COL:
case MODE_L2_320_COL:
case MODE_L3_512_COL:
case MODE_L4_512_COL:
case MODE_L6_512_COL:
vm_conf->y_rpt = 5;
vm_conf->x_rpt = vm_conf->h_skip = 1;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
vm_conf->tx_pixelrep = 1;
break;
case MODE_L2_256_COL:
case MODE_L3_384_COL:
case MODE_L4_384_COL:
case MODE_L5_512_COL:
case MODE_L6_384_COL:
case MODE_L6_320_COL:
vm_conf->y_rpt = 5;
vm_conf->x_rpt = vm_conf->h_skip = 2;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
vm_conf->tx_pixelrep = 1;
break;
case MODE_L3_320_COL:
case MODE_L4_320_COL:
case MODE_L5_384_COL:
case MODE_L6_256_COL:
vm_conf->y_rpt = 5;
vm_conf->x_rpt = vm_conf->h_skip = 3;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
vm_conf->x_rpt = cc->ar_256col ? 2 : 3;
vm_conf->tx_pixelrep = 1;
break;
case MODE_L2_240x360:
case MODE_L3_256_COL:
case MODE_L4_256_COL:
case MODE_L5_320_COL:
vm_conf->x_rpt = vm_conf->h_skip = 4;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
break;
case MODE_L5_256_COL:
vm_conf->x_rpt = vm_conf->h_skip = 5;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
break;
case MODE_L3_240x360:
vm_conf->x_rpt = vm_conf->h_skip = 6;
vmode_hv_mult(vm_out, VM_OUT_XMULT, VM_OUT_YMULT);
break;
default:
printf("WARNING: invalid mindiff_lm\n");
@ -467,6 +365,25 @@ int get_pure_lm_mode(avconfig_t *cc, mode_data_t *vm_in, mode_data_t *vm_out, vm
break;
}
// Set clock multiplication factor
if (mindiff_lm == MODE_L3_GEN_4_3)
vm_conf->si_pclk_mult = 4;
else
vm_conf->si_pclk_mult = VM_OUT_PCLKMULT;
// Reduce x_rpt for 1:1 PAR 256col mode
if (mindiff_lm & (MODE_L2_256_COL|MODE_L4_256_COL|MODE_L5_256_COL))
vm_conf->x_rpt -= cc->ar_256col;
else if (mindiff_lm & (MODE_L3_256_COL|MODE_L6_256_COL))
vm_conf->x_rpt = cc->ar_256col ? 2 : 3;
if (mindiff_lm == MODE_L3_320_COL)
vm_conf->x_rpt = 2;
// Force TX pixel-repeat for high bandwidth modes
if (((mindiff_lm == MODE_L5_GEN_4_3) && (mode_preset->group == GROUP_288P)) || (mindiff_lm >= MODE_L6_GEN_4_3))
vm_conf->tx_pixelrep = 1;
sniprintf(vm_out->name, 10, "%s x%u", vm_in->name, vm_conf->y_rpt+1);
if (vm_conf->x_size == 0)