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Timer and SPI added.

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This commit is contained in:
marqs 2016-10-16 12:53:54 +03:00
parent 9f086828ac
commit 71d60144e8
21 changed files with 3245 additions and 959 deletions
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14
rtl/ossc.v
View File

@ -149,18 +149,18 @@ assign cpu_reset_n = reset_n_reg;
sys sys_inst(
.clk_clk (clk27),
.reset_reset_n (cpu_reset_n),
.i2c_opencores_0_export_scl_pad_io (scl),
.i2c_opencores_0_export_sda_pad_io (sda),
.spi_0_external_MISO (SD_DAT[0]),
.spi_0_external_MOSI (SD_CMD),
.spi_0_external_SCLK (SD_CLK),
.spi_0_external_SS_n (SD_DAT[3]),
.pio_0_sys_ctrl_out_export (sys_ctrl),
.pio_1_controls_in_export ({ir_code_cnt, 5'b00000, HDMI_TX_MODE, btn, ir_code}),
.pio_2_horizontal_info_out_export (h_info),
.pio_3_vertical_info_out_export (v_info),
.pio_4_linecount_in_export ({VSYNC_out, 13'h0000, fpga_vsyncgen, 5'h00, lines_out}),
.pio_5_lcd_ctrl_out_export (lcd_ctrl),
.i2c_opencores_0_export_scl_pad_io (scl),
.i2c_opencores_0_export_sda_pad_io (sda),
.sdcard_0_b_SD_cmd (SD_CMD),
.sdcard_0_b_SD_dat (SD_DAT[0]),
.sdcard_0_b_SD_dat3 (SD_DAT[3]),
.sdcard_0_o_SD_clock (SD_CLK)
.pio_5_lcd_ctrl_out_export (lcd_ctrl)
);
scanconverter scanconverter_inst (

7
software/ossc_sw.project
View File

@ -79,6 +79,13 @@
<File Name="sys_controller/ossc/userdata.h"/>
<File Name="sys_controller/ossc/userdata.c"/>
</VirtualDirectory>
<VirtualDirectory Name="ulibSD">
<File Name="sys_controller/ulibSD/integer.h"/>
<File Name="sys_controller/ulibSD/sd_io.c"/>
<File Name="sys_controller/ulibSD/sd_io.h"/>
<File Name="sys_controller/ulibSD/spi_io.h"/>
<File Name="sys_controller/ulibSD/spi_io.c"/>
</VirtualDirectory>
</VirtualDirectory>
<Description/>
<Dependencies/>

2
software/sys_controller/it6613/it6613_drv.h
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@ -507,7 +507,7 @@
#define B_AUDFMT_MSB_SHIFT_FIRST (0<<4)
#define B_AUDFMT_LSB_SHIFT_FIRST (1<<4)
#define B_AUDFMT_RISE_EDGE_SAMPLE_WS (0<<5)
#define B_AUDFMT_FALL_EDGE_SAMPLE_WS (0<<5)
#define B_AUDFMT_FALL_EDGE_SAMPLE_WS (1<<5)
#define REG_TX_AUDIO_FIFOMAP 0xE2
#define O_FIFO3SEL 6

9
software/sys_controller/memory/sdcard.c
View File

@ -28,7 +28,7 @@ alt_up_sd_card_dev *sdcard_dev;
int read_sd_block(alt_u32 offset, alt_u32 size, alt_u8 *dstbuf)
{
int i;
/*int i;
alt_u32 tmp;
if ((offset % SD_BUFFER_SIZE) || (size > 512)) {
@ -48,13 +48,13 @@ int read_sd_block(alt_u32 offset, alt_u32 size, alt_u8 *dstbuf)
tmp = IORD_32DIRECT(sdcard_dev->base, i);
*((alt_u32*)(dstbuf+i)) = tmp;
}
*/
return 0;
}
int check_sdcard(alt_u8 *databuf)
{
sdcard_dev = alt_up_sd_card_open_dev(ALTERA_UP_SD_CARD_AVALON_INTERFACE_0_NAME);
/* sdcard_dev = alt_up_sd_card_open_dev(ALTERA_UP_SD_CARD_AVALON_INTERFACE_0_NAME);
if ((sdcard_dev == NULL) || !alt_up_sd_card_is_Present()) {
sniprintf(menu_row1, LCD_ROW_LEN+1, "No SD card det.");
@ -62,5 +62,6 @@ int check_sdcard(alt_u8 *databuf)
return 1;
}
return read_sd_block(0, 512, databuf);
return read_sd_block(0, 512, databuf);*/
return 0;
}

2
software/sys_controller/ossc/firmware.h
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@ -23,7 +23,7 @@
#include "alt_types.h"
#define FW_VER_MAJOR 0
#define FW_VER_MINOR 73
#define FW_VER_MINOR 74
#define FW_UPDATE_RETRIES 3

78
software/sys_controller/ulibSD/integer.h Normal file
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@ -0,0 +1,78 @@
/*
* File: integer.h
* Author: Nelson Lombardo
* Year: 2015
* e-mail: nelson.lombardo@gmail.com
* License at the end of file.
*/
/*****************************************************************************/
/* Integer type definitions */
/*****************************************************************************/
#ifndef _INTEGER_H_
#define _INTEGER_H_
#include <stdint.h>
/* 16-bit, 32-bit or larger integer */
typedef int16_t INT;
typedef uint16_t UINT;
/* 8-bit integer */
typedef int8_t CHAR;
typedef uint8_t UCHAR;
typedef uint8_t BYTE;
typedef uint8_t BOOL;
/* 16-bit integer */
typedef int16_t SHORT;
typedef uint16_t USHORT;
typedef uint16_t WORD;
typedef uint16_t WCHAR;
/* 32-bit integer */
typedef int32_t LONG;
typedef uint32_t ULONG;
typedef uint32_t DWORD;
/* Boolean type */
typedef enum { FALSE = 0, TRUE } BOOLEAN;
typedef enum { LOW = 0, HIGH } THROTTLE;
#endif
// «integer.h» is part of:
/*----------------------------------------------------------------------------/
/ ulibSD - Library for SD cards semantics (C)Nelson Lombardo, 2015
/-----------------------------------------------------------------------------/
/ ulibSD library is a free software that opened under license policy of
/ following conditions.
/
/ Copyright (C) 2015, ChaN, all right reserved.
/
/ 1. Redistributions of source code must retain the above copyright notice,
/ this condition and the following disclaimer.
/
/ This software is provided by the copyright holder and contributors "AS IS"
/ and any warranties related to this software are DISCLAIMED.
/ The copyright owner or contributors be NOT LIABLE for any damages caused
/ by use of this software.
/----------------------------------------------------------------------------*/
// Derived from Mister Chan works on FatFs code (http://elm-chan.org/fsw/ff/00index_e.html):
/*----------------------------------------------------------------------------/
/ FatFs - FAT file system module R0.11 (C)ChaN, 2015
/-----------------------------------------------------------------------------/
/ FatFs module is a free software that opened under license policy of
/ following conditions.
/
/ Copyright (C) 2015, ChaN, all right reserved.
/
/ 1. Redistributions of source code must retain the above copyright notice,
/ this condition and the following disclaimer.
/
/ This software is provided by the copyright holder and contributors "AS IS"
/ and any warranties related to this software are DISCLAIMED.
/ The copyright owner or contributors be NOT LIABLE for any damages caused
/ by use of this software.
/----------------------------------------------------------------------------*/

482
software/sys_controller/ulibSD/sd_io.c Normal file
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@ -0,0 +1,482 @@
/*
* File: sd_io.c
* Author: Nelson Lombardo
* Year: 2015
* e-mail: nelson.lombardo@gmail.com
* License at the end of file.
*/
#include "sd_io.h"
#ifdef _M_IX86 // For use over x86
/*****************************************************************************/
/* Private Methods Prototypes - Direct work with PC file */
/*****************************************************************************/
/**
* \brief Get the total numbers of sectors in SD card.
* \param dev Device descriptor.
* \return Quantity of sectors. Zero if fail.
*/
DWORD __SD_Sectors (SD_DEV* dev);
/*****************************************************************************/
/* Private Methods - Direct work with PC file */
/*****************************************************************************/
DWORD __SD_Sectors (SD_DEV *dev)
{
if (dev->fp == NULL) return(0); // Fail
else {
fseek(dev->fp, 0L, SEEK_END);
return (((DWORD)(ftell(dev->fp)))/((DWORD)512)-1);
}
}
#else // For use with uControllers
/******************************************************************************
Private Methods Prototypes - Direct work with SD card
******************************************************************************/
/**
\brief Simple function to calculate power of two.
\param e Exponent.
\return Math function result.
*/
DWORD __SD_Power_Of_Two(BYTE e);
/**
\brief Assert the SD card (SPI CS low).
*/
inline void __SD_Assert (void);
/**
\brief Deassert the SD (SPI CS high).
*/
inline void __SD_Deassert (void);
/**
\brief Change to max the speed transfer.
\param throttle
*/
void __SD_Speed_Transfer (BYTE throttle);
/**
\brief Send SPI commands.
\param cmd Command to send.
\param arg Argument to send.
\return R1 response.
*/
BYTE __SD_Send_Cmd(BYTE cmd, DWORD arg);
/**
\brief Write a data block on SD card.
\param dat Storage the data to transfer.
\param token Inidicates the type of transfer (single or multiple).
*/
SDRESULTS __SD_Write_Block(SD_DEV *dev, void *dat, BYTE token);
/**
\brief Get the total numbers of sectors in SD card.
\param dev Device descriptor.
\return Quantity of sectors. Zero if fail.
*/
DWORD __SD_Sectors (SD_DEV *dev);
/******************************************************************************
Private Methods - Direct work with SD card
******************************************************************************/
DWORD __SD_Power_Of_Two(BYTE e)
{
DWORD partial = 1;
BYTE idx;
for(idx=0; idx!=e; idx++) partial *= 2;
return(partial);
}
inline void __SD_Assert(void){
SPI_CS_Low();
}
inline void __SD_Deassert(void){
SPI_CS_High();
}
void __SD_Speed_Transfer(BYTE throttle) {
if(throttle == HIGH) SPI_Freq_High();
else SPI_Freq_Low();
}
BYTE __SD_Send_Cmd(BYTE cmd, DWORD arg)
{
BYTE crc, res;
// ACMD«n» is the command sequense of CMD55-CMD«n»
if(cmd & 0x80) {
cmd &= 0x7F;
res = __SD_Send_Cmd(CMD55, 0);
if (res > 1) return (res);
}
// Select the card
__SD_Deassert();
SPI_RW(0xFF);
__SD_Assert();
SPI_RW(0xFF);
// Send complete command set
SPI_RW(cmd); // Start and command index
SPI_RW((BYTE)(arg >> 24)); // Arg[31-24]
SPI_RW((BYTE)(arg >> 16)); // Arg[23-16]
SPI_RW((BYTE)(arg >> 8 )); // Arg[15-08]
SPI_RW((BYTE)(arg >> 0 )); // Arg[07-00]
// CRC?
crc = 0x01; // Dummy CRC and stop
if(cmd == CMD0) crc = 0x95; // Valid CRC for CMD0(0)
if(cmd == CMD8) crc = 0x87; // Valid CRC for CMD8(0x1AA)
SPI_RW(crc);
// Receive command response
// Wait for a valid response in timeout of 5 milliseconds
SPI_Timer_On(5);
do {
res = SPI_RW(0xFF);
} while((res & 0x80)&&(SPI_Timer_Status()==TRUE));
SPI_Timer_Off();
// Return with the response value
return(res);
}
SDRESULTS __SD_Write_Block(SD_DEV *dev, void *dat, BYTE token)
{
WORD idx;
BYTE line;
// Send token (single or multiple)
SPI_RW(token);
// Single block write?
if(token != 0xFD)
{
// Send block data
for(idx=0; idx!=SD_BLK_SIZE; idx++) SPI_RW(*((BYTE*)dat + idx));
/* Dummy CRC */
SPI_RW(0xFF);
SPI_RW(0xFF);
// If not accepted, returns the reject error
if((SPI_RW(0xFF) & 0x1F) != 0x05) return(SD_REJECT);
}
#ifdef SD_IO_WRITE_WAIT_BLOCKER
// Waits until finish of data programming (blocked)
while(SPI_RW(0xFF)==0);
return(SD_OK);
#else
// Waits until finish of data programming with a timeout
SPI_Timer_On(SD_IO_WRITE_TIMEOUT_WAIT);
do {
line = SPI_RW(0xFF);
} while((line==0)&&(SPI_Timer_Status()==TRUE));
SPI_Timer_Off();
#ifdef SD_IO_DBG_COUNT
dev->debug.write++;
#endif
if(line==0) return(SD_BUSY);
else return(SD_OK);
#endif
}
DWORD __SD_Sectors (SD_DEV *dev)
{
BYTE csd[16];
BYTE idx;
DWORD ss = 0;
WORD C_SIZE = 0;
BYTE C_SIZE_MULT = 0;
BYTE READ_BL_LEN = 0;
if(__SD_Send_Cmd(CMD9, 0)==0)
{
// Wait for response
while (SPI_RW(0xFF) == 0xFF);
for (idx=0; idx!=16; idx++) csd[idx] = SPI_RW(0xFF);
// Dummy CRC
SPI_RW(0xFF);
SPI_RW(0xFF);
SPI_Release();
if(dev->cardtype & SDCT_SD1)
{
ss = csd[0];
// READ_BL_LEN[83:80]: max. read data block length
READ_BL_LEN = (csd[5] & 0x0F);
// C_SIZE [73:62]
C_SIZE = (csd[6] & 0x03);
C_SIZE <<= 8;
C_SIZE |= (csd[7]);
C_SIZE <<= 2;
C_SIZE |= ((csd[8] >> 6) & 0x03);
// C_SIZE_MULT [49:47]
C_SIZE_MULT = (csd[9] & 0x03);
C_SIZE_MULT <<= 1;
C_SIZE_MULT |= ((csd[10] >> 7) & 0x01);
}
else if(dev->cardtype & SDCT_SD2)
{
// C_SIZE [69:48]
C_SIZE = (csd[7] & 0x3F);
C_SIZE <<= 8;
C_SIZE |= (csd[8] & 0xFF);
C_SIZE <<= 8;
C_SIZE |= (csd[9] & 0xFF);
// C_SIZE_MULT [--]. don't exits
C_SIZE_MULT = 0;
}
ss = (C_SIZE + 1);
ss *= __SD_Power_Of_Two(C_SIZE_MULT + 2);
ss *= __SD_Power_Of_Two(READ_BL_LEN);
ss /= SD_BLK_SIZE;
return (ss);
} else return (0); // Error
}
#endif // Private methods for uC
/******************************************************************************
Public Methods - Direct work with SD card
******************************************************************************/
SDRESULTS SD_Init(SD_DEV *dev)
{
#if defined(_M_IX86) // x86
dev->fp = fopen(dev->fn, "r+");
if (dev->fp == NULL)
return (SD_ERROR);
else
{
dev->last_sector = __SD_Sectors(dev);
#ifdef SD_IO_DBG_COUNT
dev->debug.read = 0;
dev->debug.write = 0;
#endif
return (SD_OK);
}
#else // uControllers
BYTE n, cmd, ct, ocr[4];
BYTE idx;
BYTE init_trys;
ct = 0;
for(init_trys=0; ((init_trys!=SD_INIT_TRYS)&&(!ct)); init_trys++)
{
// Initialize SPI for use with the memory card
SPI_Init();
SPI_CS_High();
SPI_Freq_Low();
// 80 dummy clocks
for(idx = 0; idx != 10; idx++) SPI_RW(0xFF);
SPI_Timer_On(500);
while(SPI_Timer_Status()==TRUE);
SPI_Timer_Off();
dev->mount = FALSE;
SPI_Timer_On(500);
while ((__SD_Send_Cmd(CMD0, 0) != 1)&&(SPI_Timer_Status()==TRUE));
SPI_Timer_Off();
// Idle state
if (__SD_Send_Cmd(CMD0, 0) == 1) {
// SD version 2?
if (__SD_Send_Cmd(CMD8, 0x1AA) == 1) {
// Get trailing return value of R7 resp
for (n = 0; n < 4; n++) ocr[n] = SPI_RW(0xFF);
// VDD range of 2.7-3.6V is OK?
if ((ocr[2] == 0x01)&&(ocr[3] == 0xAA))
{
// Wait for leaving idle state (ACMD41 with HCS bit)...
SPI_Timer_On(1000);
while ((SPI_Timer_Status()==TRUE)&&(__SD_Send_Cmd(ACMD41, 1UL << 30)));
SPI_Timer_Off();
// CCS in the OCR?
if ((SPI_Timer_Status()==TRUE)&&(__SD_Send_Cmd(CMD58, 0) == 0))
{
for (n = 0; n < 4; n++) ocr[n] = SPI_RW(0xFF);
// SD version 2?
ct = (ocr[0] & 0x40) ? SDCT_SD2 | SDCT_BLOCK : SDCT_SD2;
}
}
} else {
// SD version 1 or MMC?
if (__SD_Send_Cmd(ACMD41, 0) <= 1)
{
// SD version 1
ct = SDCT_SD1;
cmd = ACMD41;
} else {
// MMC version 3
ct = SDCT_MMC;
cmd = CMD1;
}
// Wait for leaving idle state
SPI_Timer_On(250);
while((SPI_Timer_Status()==TRUE)&&(__SD_Send_Cmd(cmd, 0)));
SPI_Timer_Off();
if(SPI_Timer_Status()==FALSE) ct = 0;
if(__SD_Send_Cmd(CMD59, 0)) ct = 0; // Deactivate CRC check (default)
if(__SD_Send_Cmd(CMD16, 512)) ct = 0; // Set R/W block length to 512 bytes
}
}
}
if(ct) {
dev->cardtype = ct;
dev->mount = TRUE;
dev->last_sector = __SD_Sectors(dev) - 1;
#ifdef SD_IO_DBG_COUNT
dev->debug.read = 0;
dev->debug.write = 0;
#endif
__SD_Speed_Transfer(HIGH); // High speed transfer
}
SPI_Release();
return (ct ? SD_OK : SD_NOINIT);
#endif
}
SDRESULTS SD_Read(SD_DEV *dev, void *dat, DWORD sector, WORD ofs, WORD cnt)
{
#if defined(_M_IX86) // x86
// Check the sector query
if((sector > dev->last_sector)||(cnt == 0)) return(SD_PARERR);
if(dev->fp!=NULL)
{
if (fseek(dev->fp, ((512 * sector) + ofs), SEEK_SET)!=0)
return(SD_ERROR);
else {
if(fread(dat, 1, (cnt - ofs),dev->fp)==(cnt - ofs))
{
#ifdef SD_IO_DBG_COUNT
dev->debug.read++;
#endif
return(SD_OK);
}
else return(SD_ERROR);
}
} else {
return(SD_ERROR);
}
#else // uControllers
SDRESULTS res;
BYTE tkn;
WORD remaining;
res = SD_ERROR;
if ((sector > dev->last_sector)||(cnt == 0)) return(SD_PARERR);
// Convert sector number to byte address (sector * SD_BLK_SIZE)
if (__SD_Send_Cmd(CMD17, sector * SD_BLK_SIZE) == 0) {
SPI_Timer_On(100); // Wait for data packet (timeout of 100ms)
do {
tkn = SPI_RW(0xFF);
} while((tkn==0xFF)&&(SPI_Timer_Status()==TRUE));
SPI_Timer_Off();
// Token of single block?
if(tkn==0xFE) {
// Size block (512 bytes) + CRC (2 bytes) - offset - bytes to count
remaining = SD_BLK_SIZE + 2 - ofs - cnt;
// Skip offset
if(ofs) {
do {
SPI_RW(0xFF);
} while(--ofs);
}
// I receive the data and I write in user's buffer
do {
*(BYTE*)dat = SPI_RW(0xFF);
dat++;
} while(--cnt);
// Skip remaining
do {
SPI_RW(0xFF);
} while (--remaining);
res = SD_OK;
}
}
SPI_Release();
#ifdef SD_IO_DBG_COUNT
dev->debug.read++;
#endif
return(res);
#endif
}
#ifdef SD_IO_WRITE
SDRESULTS SD_Write(SD_DEV *dev, void *dat, DWORD sector)
{
#if defined(_M_IX86) // x86
// Query ok?
if(sector > dev->last_sector) return(SD_PARERR);
if(dev->fp != NULL)
{
if(fseek(dev->fp, SD_BLK_SIZE * sector, SEEK_SET)!=0)
return(SD_ERROR);
else {
if(fwrite(dat, 1, SD_BLK_SIZE, dev->fp)==SD_BLK_SIZE)
{
#ifdef SD_IO_DBG_COUNT
dev->debug.write++;
#endif
return(SD_OK);
}
else return(SD_ERROR);
}
} else return(SD_ERROR);
#else // uControllers
// Query ok?
if(sector > dev->last_sector) return(SD_PARERR);
// Single block write (token <- 0xFE)
// Convert sector number to bytes address (sector * SD_BLK_SIZE)
if(__SD_Send_Cmd(CMD24, sector * SD_BLK_SIZE)==0)
return(__SD_Write_Block(dev, dat, 0xFE));
else
return(SD_ERROR);
#endif
}
#endif
SDRESULTS SD_Status(SD_DEV *dev)
{
#if defined(_M_IX86)
return((dev->fp == NULL) ? SD_OK : SD_NORESPONSE);
#else
return(__SD_Send_Cmd(CMD0, 0) ? SD_OK : SD_NORESPONSE);
#endif
}
// «sd_io.c» is part of:
/*----------------------------------------------------------------------------/
/ ulibSD - Library for SD cards semantics (C)Nelson Lombardo, 2015
/-----------------------------------------------------------------------------/
/ ulibSD library is a free software that opened under license policy of
/ following conditions.
/
/ Copyright (C) 2015, ChaN, all right reserved.
/
/ 1. Redistributions of source code must retain the above copyright notice,
/ this condition and the following disclaimer.
/
/ This software is provided by the copyright holder and contributors "AS IS"
/ and any warranties related to this software are DISCLAIMED.
/ The copyright owner or contributors be NOT LIABLE for any damages caused
/ by use of this software.
/----------------------------------------------------------------------------*/
// Derived from Mister Chan works on FatFs code (http://elm-chan.org/fsw/ff/00index_e.html):
/*----------------------------------------------------------------------------/
/ FatFs - FAT file system module R0.11 (C)ChaN, 2015
/-----------------------------------------------------------------------------/
/ FatFs module is a free software that opened under license policy of
/ following conditions.
/
/ Copyright (C) 2015, ChaN, all right reserved.
/
/ 1. Redistributions of source code must retain the above copyright notice,
/ this condition and the following disclaimer.
/
/ This software is provided by the copyright holder and contributors "AS IS"
/ and any warranties related to this software are DISCLAIMED.
/ The copyright owner or contributors be NOT LIABLE for any damages caused
/ by use of this software.
/----------------------------------------------------------------------------*/

187
software/sys_controller/ulibSD/sd_io.h Normal file
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@ -0,0 +1,187 @@
/*
* File: sd_io.h
* Author: Nelson Lombardo
* Year: 2015
* e-mail: nelson.lombardo@gmail.com
* License at the end of file.
*/
#ifndef _SD_IO_H_
#define _SD_IO_H_
/*****************************************************************************/
/* Configurations */
/*****************************************************************************/
//#define _M_IX86 // For use with x86 architecture
#define SD_IO_WRITE
//#define SD_IO_WRITE_WAIT_BLOCKER
#define SD_IO_WRITE_TIMEOUT_WAIT 250
//#define SD_IO_DBG_COUNT
/*****************************************************************************/
#if defined(_M_IX86)
#include <stdio.h>
#include "integer.h"
/* Results of SD functions */
typedef enum {
SD_OK = 0, /* 0: Function succeeded */
SD_NOINIT /* 1: SD not initialized */
SD_ERROR, /* 2: Disk error */
SD_PARERR, /* 3: Invalid parameter */
SD_BUSY, /* 4: Programming busy */
SD_REJECT /* 5: Reject data */
} SDRESULTS;
#ifdef SD_IO_DBG_COUNT
typedef struct _DBG_COUNT {
WORD read;
WORD write;
} DBG_COUNT;
#endif
/* SD device object */
typedef struct _SD_DEV {
BOOL mount;
BYTE cardtype;
char fn[20]; /* dd if=/dev/zero of=sim_sd.raw bs=1k count=0 seek=8192 */
FILE *fp;
DWORD last_sector;
#ifdef SD_IO_DBG_COUNT
DBG_COUNT debug;
#endif
} SD_DEV;
#else // For use with uControllers
#include "spi_io.h" /* Provide the low-level functions */
/* Definitions of SD commands */
#define CMD0 (0x40+0) /* GO_IDLE_STATE */
#define CMD1 (0x40+1) /* SEND_OP_COND (MMC) */
#define ACMD41 (0xC0+41) /* SEND_OP_COND (SDC) */
#define CMD8 (0x40+8) /* SEND_IF_COND */
#define CMD9 (0x40+9) /* SEND_CSD */
#define CMD16 (0x40+16) /* SET_BLOCKLEN */
#define CMD17 (0x40+17) /* READ_SINGLE_BLOCK */
#define CMD24 (0x40+24) /* WRITE_SINGLE_BLOCK */
#define CMD42 (0x40+42) /* LOCK_UNLOCK */
#define CMD55 (0x40+55) /* APP_CMD */
#define CMD58 (0x40+58) /* READ_OCR */
#define CMD59 (0x40+59) /* CRC_ON_OFF */
#define SD_INIT_TRYS 0x03
/* CardType) */
#define SDCT_MMC 0x01 /* MMC version 3 */
#define SDCT_SD1 0x02 /* SD version 1 */
#define SDCT_SD2 0x04 /* SD version 2 */
#define SDCT_SDC (SDCT_SD1|SDCT_SD2) /* SD */
#define SDCT_BLOCK 0x08 /* Block addressing */
#define SD_BLK_SIZE 512
/* Results of SD functions */
typedef enum {
SD_OK = 0, /* 0: Function succeeded */
SD_NOINIT, /* 1: SD not initialized */
SD_ERROR, /* 2: Disk error */
SD_PARERR, /* 3: Invalid parameter */
SD_BUSY, /* 4: Programming busy */
SD_REJECT, /* 5: Reject data */
SD_NORESPONSE /* 6: No response */
} SDRESULTS;
#ifdef SD_IO_DBG_COUNT
typedef struct _DBG_COUNT {
WORD read;
WORD write;
} DBG_COUNT;
#endif
/* SD device object */
typedef struct _SD_DEV {
BOOL mount;
BYTE cardtype;
DWORD last_sector;
#ifdef SD_IO_DBG_COUNT
DBG_COUNT debug;
#endif
} SD_DEV;
#endif
/*******************************************************************************
* Public Methods - Direct work with SD card *
******************************************************************************/
/**
\brief Initialization the SD card.
\return If all goes well returns SD_OK.
*/
SDRESULTS SD_Init (SD_DEV *dev);
/**
\brief Read a single block.
\param dest Pointer to the destination object to put data
\param sector Start sector number (internally is converted to byte address).
\param ofs Byte offset in the sector (0..511).
\param cnt Byte count (1..512).
\return If all goes well returns SD_OK.
*/
SDRESULTS SD_Read (SD_DEV *dev, void *dat, DWORD sector, WORD ofs, WORD cnt);
/**
\brief Write a single block.
\param dat Data to write.
\param sector Sector number to write (internally is converted to byte address).
\return If all goes well returns SD_OK.
*/
SDRESULTS SD_Write (SD_DEV *dev, void *dat, DWORD sector);
/**
\brief Allows know status of SD card.
\return If all goes well returns SD_OK.
*/
SDRESULTS SD_Status (SD_DEV *dev);
#endif
// «sd_io.h» is part of:
/*----------------------------------------------------------------------------/
/ ulibSD - Library for SD cards semantics (C)Nelson Lombardo, 2015
/-----------------------------------------------------------------------------/
/ ulibSD library is a free software that opened under license policy of
/ following conditions.
/
/ Copyright (C) 2015, ChaN, all right reserved.
/
/ 1. Redistributions of source code must retain the above copyright notice,
/ this condition and the following disclaimer.
/
/ This software is provided by the copyright holder and contributors "AS IS"
/ and any warranties related to this software are DISCLAIMED.
/ The copyright owner or contributors be NOT LIABLE for any damages caused
/ by use of this software.
/----------------------------------------------------------------------------*/
// Derived from Mister Chan works on FatFs code (http://elm-chan.org/fsw/ff/00index_e.html):
/*----------------------------------------------------------------------------/
/ FatFs - FAT file system module R0.11 (C)ChaN, 2015
/-----------------------------------------------------------------------------/
/ FatFs module is a free software that opened under license policy of
/ following conditions.
/
/ Copyright (C) 2015, ChaN, all right reserved.
/
/ 1. Redistributions of source code must retain the above copyright notice,
/ this condition and the following disclaimer.
/
/ This software is provided by the copyright holder and contributors "AS IS"
/ and any warranties related to this software are DISCLAIMED.
/ The copyright owner or contributors be NOT LIABLE for any damages caused
/ by use of this software.
/----------------------------------------------------------------------------*/

46
software/sys_controller/ulibSD/spi_io.c Normal file
View File

@ -0,0 +1,46 @@
#include "spi_io.h"
#define SD_SLAVE_ID 0
void SPI_Init (void) {
return;
}
BYTE SPI_RW (BYTE d) {
BYTE rdata;
alt_avalon_spi_command(SPI_0_BASE, SD_SLAVE_ID, 1, &d, 1, &rdata, 0);
return rdata;
}
void SPI_Release (void) {
return;
}
inline void SPI_CS_Low (void) {
return;
}
inline void SPI_CS_High (void){
return;
}
inline void SPI_Freq_High (void) {
return;
}
inline void SPI_Freq_Low (void) {
return;
}
void SPI_Timer_On (WORD ms) {
}
inline BOOL SPI_Timer_Status (void) {
}
inline void SPI_Timer_Off (void) {
}

96
software/sys_controller/ulibSD/spi_io.h Normal file
View File

@ -0,0 +1,96 @@
/*
* spi_io.h
* Author: Nelson Lombardo (C) 2015
* e-mail: nelson.lombardo@gmail.com
* License at the end of file.
*/
#ifndef _SPI_IO_H_
#define _SPI_IO_H_
#include "integer.h" /* Type redefinition for portability */
/******************************************************************************
Public methods
*****************************************************************************/
/**
\brief Initialize SPI hardware
*/
void SPI_Init (void);
/**
\brief Read/Write a single byte.
\param d Byte to send.
\return Byte that arrived.
*/
BYTE SPI_RW (BYTE d);
/**
\brief Flush of SPI buffer.
*/
void SPI_Release (void);
/**
\brief Selecting function in SPI terms, associated with SPI module.
*/
void SPI_CS_Low (void);
/**
\brief Deselecting function in SPI terms, associated with SPI module.
*/
void SPI_CS_High (void);
/**
\brief Setting frequency of SPI's clock to maximun possible.
*/
void SPI_Freq_High (void);
/**
\brief Setting frequency of SPI's clock equal or lower than 400kHz.
*/
void SPI_Freq_Low (void);
/**
\brief Start a non-blocking timer.
\param ms Milliseconds.
*/
void SPI_Timer_On (WORD ms);
/**
\brief Check the status of non-blocking timer.
\return Status, TRUE if timeout is not reach yet.
*/
BOOL SPI_Timer_Status (void);
/**
\brief Stop of non-blocking timer. Mandatory.
*/
void SPI_Timer_Off (void);
#endif
/*
The MIT License (MIT)
Copyright (c) 2015 Nelson Lombardo
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE.
*/

26
software/sys_controller_bsp/Makefile
View File

@ -202,13 +202,6 @@ GENERATED_C_LIB_SRCS += alt_sys_init.c
# used to build each file.
#-------------------------------------------------------------------------------
# altera_up_sd_card_avalon_interface_mod_driver sources root
Altera_UP_SD_Card_Avalon_Interface_mod_driver_SRCS_ROOT := drivers
# altera_up_sd_card_avalon_interface_mod_driver sources
Altera_UP_SD_Card_Avalon_Interface_mod_driver_C_LIB_SRCS := \
$(Altera_UP_SD_Card_Avalon_Interface_mod_driver_SRCS_ROOT)/src/Altera_UP_SD_Card_Avalon_Interface_mod.c
# altera_avalon_jtag_uart_driver sources root
altera_avalon_jtag_uart_driver_SRCS_ROOT := drivers
@ -224,6 +217,22 @@ altera_avalon_jtag_uart_driver_C_LIB_SRCS := \
altera_avalon_pio_driver_SRCS_ROOT := drivers
# altera_avalon_pio_driver sources
# altera_avalon_spi_driver sources root
altera_avalon_spi_driver_SRCS_ROOT := drivers
# altera_avalon_spi_driver sources
altera_avalon_spi_driver_C_LIB_SRCS := \
$(altera_avalon_spi_driver_SRCS_ROOT)/src/altera_avalon_spi.c
# altera_avalon_timer_driver sources root
altera_avalon_timer_driver_SRCS_ROOT := drivers
# altera_avalon_timer_driver sources
altera_avalon_timer_driver_C_LIB_SRCS := \
$(altera_avalon_timer_driver_SRCS_ROOT)/src/altera_avalon_timer_sc.c \
$(altera_avalon_timer_driver_SRCS_ROOT)/src/altera_avalon_timer_ts.c \
$(altera_avalon_timer_driver_SRCS_ROOT)/src/altera_avalon_timer_vars.c
# altera_epcq_controller_mod_driver sources root
altera_epcq_controller_mod_driver_SRCS_ROOT := drivers
@ -345,8 +354,9 @@ nios2_hw_crc32_driver_C_LIB_SRCS := \
# Assemble all component C source files
COMPONENT_C_LIB_SRCS += \
$(Altera_UP_SD_Card_Avalon_Interface_mod_driver_C_LIB_SRCS) \
$(altera_avalon_jtag_uart_driver_C_LIB_SRCS) \
$(altera_avalon_spi_driver_C_LIB_SRCS) \
$(altera_avalon_timer_driver_C_LIB_SRCS) \
$(altera_epcq_controller_mod_driver_C_LIB_SRCS) \
$(altera_nios2_gen2_hal_driver_C_LIB_SRCS) \
$(hal_C_LIB_SRCS) \

11
software/sys_controller_bsp/alt_sys_init.c
View File

@ -4,7 +4,7 @@
* Machine generated for CPU 'nios2_qsys_0' in SOPC Builder design 'sys'
* SOPC Builder design path: ../../sys.sopcinfo
*
* Generated: Wed Dec 30 21:13:11 EET 2015
* Generated: Sun Oct 16 12:18:06 EEST 2016
*/
/*
@ -59,8 +59,9 @@
*/
#include "altera_nios2_gen2_irq.h"
#include "Altera_UP_SD_Card_Avalon_Interface_mod.h"
#include "altera_avalon_jtag_uart.h"
#include "altera_avalon_spi.h"
#include "altera_avalon_timer.h"
#include "altera_epcq_controller_mod.h"
#include "i2c_opencores.h"
@ -70,8 +71,9 @@
ALTERA_NIOS2_GEN2_IRQ_INSTANCE ( NIOS2_QSYS_0, nios2_qsys_0);
ALTERA_AVALON_JTAG_UART_INSTANCE ( JTAG_UART_0, jtag_uart_0);
ALTERA_AVALON_SPI_INSTANCE ( SPI_0, spi_0);
ALTERA_AVALON_TIMER_INSTANCE ( TIMER_0, timer_0);
ALTERA_EPCQ_CONTROLLER_MOD_AVL_MEM_AVL_CSR_INSTANCE ( EPCQ_CONTROLLER_0, EPCQ_CONTROLLER_0_AVL_MEM, EPCQ_CONTROLLER_0_AVL_CSR, epcq_controller_0);
ALTERA_UP_SD_CARD_AVALON_INTERFACE_MOD_INSTANCE ( ALTERA_UP_SD_CARD_AVALON_INTERFACE_0, Altera_UP_SD_Card_Avalon_Interface_0);
I2C_OPENCORES_INSTANCE ( I2C_OPENCORES_0, i2c_opencores_0);
/*
@ -95,8 +97,9 @@ void alt_irq_init ( const void* base )
void alt_sys_init( void )
{
ALTERA_AVALON_TIMER_INIT ( TIMER_0, timer_0);
ALTERA_AVALON_JTAG_UART_INIT ( JTAG_UART_0, jtag_uart_0);
ALTERA_AVALON_SPI_INIT ( SPI_0, spi_0);
ALTERA_EPCQ_CONTROLLER_MOD_INIT ( EPCQ_CONTROLLER_0, epcq_controller_0);
ALTERA_UP_SD_CARD_AVALON_INTERFACE_MOD_INIT ( ALTERA_UP_SD_CARD_AVALON_INTERFACE_0, Altera_UP_SD_Card_Avalon_Interface_0);
I2C_OPENCORES_INIT ( I2C_OPENCORES_0, i2c_opencores_0);
}

BIN
software/sys_controller_bsp/libhal_bsp.a
View File

Binary file not shown.

4
software/sys_controller_bsp/linker.h
View File

@ -4,7 +4,7 @@
* Machine generated for CPU 'nios2_qsys_0' in SOPC Builder design 'sys'
* SOPC Builder design path: ../../sys.sopcinfo
*
* Generated: Sun May 03 12:35:19 EEST 2015
* Generated: Sun Oct 16 12:18:06 EEST 2016
*/
/*
@ -68,7 +68,7 @@
#define EPCQ_CONTROLLER_0_AVL_MEM_REGION_BASE 0x0
#define EPCQ_CONTROLLER_0_AVL_MEM_REGION_SPAN 8388608
#define ONCHIP_MEMORY2_0_REGION_BASE 0x810020
#define ONCHIP_MEMORY2_0_REGION_SPAN 36832
#define ONCHIP_MEMORY2_0_REGION_SPAN 40928
#define RESET_REGION_BASE 0x810000
#define RESET_REGION_SPAN 32

8
software/sys_controller_bsp/linker.x
View File

@ -4,7 +4,7 @@
* Machine generated for CPU 'nios2_qsys_0' in SOPC Builder design 'sys'
* SOPC Builder design path: ../../sys.sopcinfo
*
* Generated: Sun May 03 12:35:19 EEST 2015
* Generated: Sun Oct 16 12:18:06 EEST 2016
*/
/*
@ -52,7 +52,7 @@ MEMORY
{
epcq_controller_0_avl_mem : ORIGIN = 0x0, LENGTH = 8388608
reset : ORIGIN = 0x810000, LENGTH = 32
onchip_memory2_0 : ORIGIN = 0x810020, LENGTH = 36832
onchip_memory2_0 : ORIGIN = 0x810020, LENGTH = 40928
}
/* Define symbols for each memory base-address */
@ -386,7 +386,7 @@ SECTIONS
/*
* Don't override this, override the __alt_stack_* symbols instead.
*/
__alt_data_end = 0x819000;
__alt_data_end = 0x81a000;
/*
* The next two symbols define the location of the default stack. You can
@ -402,4 +402,4 @@ PROVIDE( __alt_stack_limit = __alt_stack_base );
* Override this symbol to put the heap in a different memory.
*/
PROVIDE( __alt_heap_start = end );
PROVIDE( __alt_heap_limit = 0x819000 );
PROVIDE( __alt_heap_limit = 0x81a000 );

4
software/sys_controller_bsp/mem_init.mk
View File

@ -199,8 +199,8 @@ HDL_SIM_INSTALL_FILES += $(HDL_SIM_INSTALL_DIR)/$(MEM_1).dat
SYM_FILES += $(HDL_SIM_DIR)/$(MEM_1).sym
HDL_SIM_INSTALL_FILES += $(HDL_SIM_INSTALL_DIR)/$(MEM_1).sym
$(MEM_1)_START := 0x00810000
$(MEM_1)_END := 0x00818fff
$(MEM_1)_SPAN := 0x00009000
$(MEM_1)_END := 0x00819fff
$(MEM_1)_SPAN := 0x0000a000
$(MEM_1)_HIERARCHICAL_PATH := onchip_memory2_0
$(MEM_1)_WIDTH := 32
$(MEM_1)_HEX_DATA_WIDTH := 32

4
software/sys_controller_bsp/memory.gdb
View File

@ -3,7 +3,7 @@
# Machine generated for CPU 'nios2_qsys_0' in SOPC Builder design 'sys'
# SOPC Builder design path: ../../sys.sopcinfo
#
# Generated: Sun May 03 12:35:19 EEST 2015
# Generated: Sun Oct 16 12:18:06 EEST 2016
# DO NOT MODIFY THIS FILE
#
@ -50,4 +50,4 @@
memory 0x0 0x800000 cache
# onchip_memory2_0
memory 0x810000 0x819000 cache
memory 0x810000 0x81a000 cache

40
software/sys_controller_bsp/settings.bsp
View File

@ -2,9 +2,9 @@
<sch:Settings xmlns:sch="http://www.altera.com/embeddedsw/bsp/schema">
<BspType>hal</BspType>
<BspVersion>default</BspVersion>
<BspGeneratedTimeStamp>Sep 4, 2016 3:02:52 AM</BspGeneratedTimeStamp>
<BspGeneratedUnixTimeStamp>1472947372974</BspGeneratedUnixTimeStamp>
<BspGeneratedLocation>./</BspGeneratedLocation>
<BspGeneratedTimeStamp>Oct 16, 2016 12:18:06 PM</BspGeneratedTimeStamp>
<BspGeneratedUnixTimeStamp>1476609486611</BspGeneratedUnixTimeStamp>
<BspGeneratedLocation>/home/markus/Code/ossc/software/sys_controller_bsp</BspGeneratedLocation>
<BspSettingsFile>settings.bsp</BspSettingsFile>
<SopcDesignFile>../../sys.sopcinfo</SopcDesignFile>
<JdiFile>default</JdiFile>
@ -894,67 +894,73 @@
</MemoryMap>
<MemoryMap>
<slaveDescriptor>onchip_memory2_0</slaveDescriptor>
<addressRange>0x00810000 - 0x00818FFF</addressRange>
<addressSpan>36864</addressSpan>
<addressRange>0x00810000 - 0x00819FFF</addressRange>
<addressSpan>40960</addressSpan>
<attributes>memory</attributes>
</MemoryMap>
<MemoryMap>
<slaveDescriptor>Altera_UP_SD_Card_Avalon_Interface_0</slaveDescriptor>
<addressRange>0x00821000 - 0x008213FF</addressRange>
<addressSpan>1024</addressSpan>
<slaveDescriptor>spi_0</slaveDescriptor>
<addressRange>0x00821000 - 0x0082101F</addressRange>
<addressSpan>32</addressSpan>
<attributes/>
</MemoryMap>
<MemoryMap>
<slaveDescriptor>timer_0</slaveDescriptor>
<addressRange>0x00821020 - 0x0082103F</addressRange>
<addressSpan>32</addressSpan>
<attributes>timer</attributes>
</MemoryMap>
<MemoryMap>
<slaveDescriptor>epcq_controller_0_avl_csr</slaveDescriptor>
<addressRange>0x00821400 - 0x0082141F</addressRange>
<addressRange>0x00821040 - 0x0082105F</addressRange>
<addressSpan>32</addressSpan>
<attributes/>
</MemoryMap>
<MemoryMap>
<slaveDescriptor>i2c_opencores_0</slaveDescriptor>
<addressRange>0x00821420 - 0x0082143F</addressRange>
<addressRange>0x00821060 - 0x0082107F</addressRange>
<addressSpan>32</addressSpan>
<attributes/>
</MemoryMap>
<MemoryMap>
<slaveDescriptor>pio_5</slaveDescriptor>
<addressRange>0x00821440 - 0x0082144F</addressRange>
<addressRange>0x00821080 - 0x0082108F</addressRange>
<addressSpan>16</addressSpan>
<attributes/>
</MemoryMap>
<MemoryMap>
<slaveDescriptor>pio_4</slaveDescriptor>
<addressRange>0x00821450 - 0x0082145F</addressRange>
<addressRange>0x00821090 - 0x0082109F</addressRange>
<addressSpan>16</addressSpan>
<attributes/>
</MemoryMap>
<MemoryMap>
<slaveDescriptor>pio_3</slaveDescriptor>
<addressRange>0x00821460 - 0x0082146F</addressRange>
<addressRange>0x008210A0 - 0x008210AF</addressRange>
<addressSpan>16</addressSpan>
<attributes/>
</MemoryMap>
<MemoryMap>
<slaveDescriptor>pio_2</slaveDescriptor>
<addressRange>0x00821470 - 0x0082147F</addressRange>
<addressRange>0x008210B0 - 0x008210BF</addressRange>
<addressSpan>16</addressSpan>
<attributes/>
</MemoryMap>
<MemoryMap>
<slaveDescriptor>pio_1</slaveDescriptor>
<addressRange>0x00821480 - 0x0082148F</addressRange>
<addressRange>0x008210C0 - 0x008210CF</addressRange>
<addressSpan>16</addressSpan>
<attributes/>
</MemoryMap>
<MemoryMap>
<slaveDescriptor>pio_0</slaveDescriptor>
<addressRange>0x00821490 - 0x0082149F</addressRange>
<addressRange>0x008210D0 - 0x008210DF</addressRange>
<addressSpan>16</addressSpan>
<attributes/>
</MemoryMap>
<MemoryMap>
<slaveDescriptor>jtag_uart_0</slaveDescriptor>
<addressRange>0x008214A0 - 0x008214A7</addressRange>
<addressRange>0x008210E0 - 0x008210E7</addressRange>
<addressSpan>8</addressSpan>
<attributes>printable</attributes>
</MemoryMap>

110
software/sys_controller_bsp/system.h
View File

@ -4,7 +4,7 @@
* Machine generated for CPU 'nios2_qsys_0' in SOPC Builder design 'sys'
* SOPC Builder design path: ../../sys.sopcinfo
*
* Generated: Wed Dec 30 21:04:43 EET 2015
* Generated: Sun Oct 16 12:18:06 EEST 2016
*/
/*
@ -55,20 +55,6 @@
#include "linker.h"
/*
* Altera_UP_SD_Card_Avalon_Interface_0 configuration
*
*/
#define ALTERA_UP_SD_CARD_AVALON_INTERFACE_0_BASE 0x821000
#define ALTERA_UP_SD_CARD_AVALON_INTERFACE_0_IRQ -1
#define ALTERA_UP_SD_CARD_AVALON_INTERFACE_0_IRQ_INTERRUPT_CONTROLLER_ID -1
#define ALTERA_UP_SD_CARD_AVALON_INTERFACE_0_NAME "/dev/Altera_UP_SD_Card_Avalon_Interface_0"
#define ALTERA_UP_SD_CARD_AVALON_INTERFACE_0_SPAN 1024
#define ALTERA_UP_SD_CARD_AVALON_INTERFACE_0_TYPE "Altera_UP_SD_Card_Avalon_Interface_mod"
#define ALT_MODULE_CLASS_Altera_UP_SD_Card_Avalon_Interface_0 Altera_UP_SD_Card_Avalon_Interface_mod
/*
* CPU configuration
*
@ -164,11 +150,12 @@
#define __ALTERA_AVALON_JTAG_UART
#define __ALTERA_AVALON_ONCHIP_MEMORY2
#define __ALTERA_AVALON_PIO
#define __ALTERA_AVALON_SPI
#define __ALTERA_AVALON_TIMER
#define __ALTERA_EPCQ_CONTROLLER_MOD
#define __ALTERA_NIOS2_GEN2
#define __ALTERA_NIOS_CUSTOM_INSTR_BITSWAP
#define __ALTERA_NIOS_CUSTOM_INSTR_ENDIANCONVERTER
#define __ALTERA_UP_SD_CARD_AVALON_INTERFACE_MOD
#define __I2C_OPENCORES
#define __NIOS2_HW_CRC32
@ -189,19 +176,19 @@
#define ALT_NUM_INTERNAL_INTERRUPT_CONTROLLERS 1
#define ALT_NUM_INTERRUPT_CONTROLLERS 1
#define ALT_STDERR "/dev/jtag_uart_0"
#define ALT_STDERR_BASE 0x8214a0
#define ALT_STDERR_BASE 0x8210e0
#define ALT_STDERR_DEV jtag_uart_0
#define ALT_STDERR_IS_JTAG_UART
#define ALT_STDERR_PRESENT
#define ALT_STDERR_TYPE "altera_avalon_jtag_uart"
#define ALT_STDIN "/dev/jtag_uart_0"
#define ALT_STDIN_BASE 0x8214a0
#define ALT_STDIN_BASE 0x8210e0
#define ALT_STDIN_DEV jtag_uart_0
#define ALT_STDIN_IS_JTAG_UART
#define ALT_STDIN_PRESENT
#define ALT_STDIN_TYPE "altera_avalon_jtag_uart"
#define ALT_STDOUT "/dev/jtag_uart_0"
#define ALT_STDOUT_BASE 0x8214a0
#define ALT_STDOUT_BASE 0x8210e0
#define ALT_STDOUT_DEV jtag_uart_0
#define ALT_STDOUT_IS_JTAG_UART
#define ALT_STDOUT_PRESENT
@ -215,9 +202,9 @@
*/
#define ALT_MODULE_CLASS_epcq_controller_0_avl_csr altera_epcq_controller_mod
#define EPCQ_CONTROLLER_0_AVL_CSR_BASE 0x821400
#define EPCQ_CONTROLLER_0_AVL_CSR_BASE 0x821040
#define EPCQ_CONTROLLER_0_AVL_CSR_FLASH_TYPE "EPCS64"
#define EPCQ_CONTROLLER_0_AVL_CSR_IRQ 1
#define EPCQ_CONTROLLER_0_AVL_CSR_IRQ 2
#define EPCQ_CONTROLLER_0_AVL_CSR_IRQ_INTERRUPT_CONTROLLER_ID 0
#define EPCQ_CONTROLLER_0_AVL_CSR_IS_EPCS 1
#define EPCQ_CONTROLLER_0_AVL_CSR_NAME "/dev/epcq_controller_0_avl_csr"
@ -265,8 +252,8 @@
*/
#define ALT_MODULE_CLASS_i2c_opencores_0 i2c_opencores
#define I2C_OPENCORES_0_BASE 0x821420
#define I2C_OPENCORES_0_IRQ 0
#define I2C_OPENCORES_0_BASE 0x821060
#define I2C_OPENCORES_0_IRQ 3
#define I2C_OPENCORES_0_IRQ_INTERRUPT_CONTROLLER_ID 0
#define I2C_OPENCORES_0_NAME "/dev/i2c_opencores_0"
#define I2C_OPENCORES_0_SPAN 32
@ -279,8 +266,8 @@
*/
#define ALT_MODULE_CLASS_jtag_uart_0 altera_avalon_jtag_uart
#define JTAG_UART_0_BASE 0x8214a0
#define JTAG_UART_0_IRQ 2
#define JTAG_UART_0_BASE 0x8210e0
#define JTAG_UART_0_IRQ 1
#define JTAG_UART_0_IRQ_INTERRUPT_CONTROLLER_ID 0
#define JTAG_UART_0_NAME "/dev/jtag_uart_0"
#define JTAG_UART_0_READ_DEPTH 64
@ -314,8 +301,8 @@
#define ONCHIP_MEMORY2_0_READ_DURING_WRITE_MODE "DONT_CARE"
#define ONCHIP_MEMORY2_0_SINGLE_CLOCK_OP 0
#define ONCHIP_MEMORY2_0_SIZE_MULTIPLE 1
#define ONCHIP_MEMORY2_0_SIZE_VALUE 36864
#define ONCHIP_MEMORY2_0_SPAN 36864
#define ONCHIP_MEMORY2_0_SIZE_VALUE 40960
#define ONCHIP_MEMORY2_0_SPAN 40960
#define ONCHIP_MEMORY2_0_TYPE "altera_avalon_onchip_memory2"
#define ONCHIP_MEMORY2_0_WRITABLE 1
@ -326,7 +313,7 @@
*/
#define ALT_MODULE_CLASS_pio_0 altera_avalon_pio
#define PIO_0_BASE 0x821490
#define PIO_0_BASE 0x8210d0
#define PIO_0_BIT_CLEARING_EDGE_REGISTER 0
#define PIO_0_BIT_MODIFYING_OUTPUT_REGISTER 0
#define PIO_0_CAPTURE 0
@ -353,7 +340,7 @@
*/
#define ALT_MODULE_CLASS_pio_1 altera_avalon_pio
#define PIO_1_BASE 0x821480
#define PIO_1_BASE 0x8210c0
#define PIO_1_BIT_CLEARING_EDGE_REGISTER 0
#define PIO_1_BIT_MODIFYING_OUTPUT_REGISTER 0
#define PIO_1_CAPTURE 0
@ -380,7 +367,7 @@
*/
#define ALT_MODULE_CLASS_pio_2 altera_avalon_pio
#define PIO_2_BASE 0x821470
#define PIO_2_BASE 0x8210b0
#define PIO_2_BIT_CLEARING_EDGE_REGISTER 0
#define PIO_2_BIT_MODIFYING_OUTPUT_REGISTER 0
#define PIO_2_CAPTURE 0
@ -407,7 +394,7 @@
*/
#define ALT_MODULE_CLASS_pio_3 altera_avalon_pio
#define PIO_3_BASE 0x821460
#define PIO_3_BASE 0x8210a0
#define PIO_3_BIT_CLEARING_EDGE_REGISTER 0
#define PIO_3_BIT_MODIFYING_OUTPUT_REGISTER 0
#define PIO_3_CAPTURE 0
@ -434,7 +421,7 @@
*/
#define ALT_MODULE_CLASS_pio_4 altera_avalon_pio
#define PIO_4_BASE 0x821450
#define PIO_4_BASE 0x821090
#define PIO_4_BIT_CLEARING_EDGE_REGISTER 0
#define PIO_4_BIT_MODIFYING_OUTPUT_REGISTER 0
#define PIO_4_CAPTURE 0
@ -461,7 +448,7 @@
*/
#define ALT_MODULE_CLASS_pio_5 altera_avalon_pio
#define PIO_5_BASE 0x821440
#define PIO_5_BASE 0x821080
#define PIO_5_BIT_CLEARING_EDGE_REGISTER 0
#define PIO_5_BIT_MODIFYING_OUTPUT_REGISTER 0
#define PIO_5_CAPTURE 0
@ -481,4 +468,61 @@
#define PIO_5_SPAN 16
#define PIO_5_TYPE "altera_avalon_pio"
/*
* spi_0 configuration
*
*/
#define ALT_MODULE_CLASS_spi_0 altera_avalon_spi
#define SPI_0_BASE 0x821000
#define SPI_0_CLOCKMULT 1
#define SPI_0_CLOCKPHASE 0
#define SPI_0_CLOCKPOLARITY 0
#define SPI_0_CLOCKUNITS "Hz"
#define SPI_0_DATABITS 8
#define SPI_0_DATAWIDTH 16
#define SPI_0_DELAYMULT "1.0E-9"
#define SPI_0_DELAYUNITS "ns"
#define SPI_0_EXTRADELAY 0
#define SPI_0_INSERT_SYNC 0
#define SPI_0_IRQ 4
#define SPI_0_IRQ_INTERRUPT_CONTROLLER_ID 0
#define SPI_0_ISMASTER 1
#define SPI_0_LSBFIRST 0
#define SPI_0_NAME "/dev/spi_0"
#define SPI_0_NUMSLAVES 1
#define SPI_0_PREFIX "spi_"
#define SPI_0_SPAN 32
#define SPI_0_SYNC_REG_DEPTH 2
#define SPI_0_TARGETCLOCK 13500000u
#define SPI_0_TARGETSSDELAY "0.0"
#define SPI_0_TYPE "altera_avalon_spi"
/*
* timer_0 configuration
*
*/
#define ALT_MODULE_CLASS_timer_0 altera_avalon_timer
#define TIMER_0_ALWAYS_RUN 0
#define TIMER_0_BASE 0x821020
#define TIMER_0_COUNTER_SIZE 32
#define TIMER_0_FIXED_PERIOD 0
#define TIMER_0_FREQ 27000000
#define TIMER_0_IRQ 0
#define TIMER_0_IRQ_INTERRUPT_CONTROLLER_ID 0
#define TIMER_0_LOAD_VALUE 26
#define TIMER_0_MULT 1.0E-6
#define TIMER_0_NAME "/dev/timer_0"
#define TIMER_0_PERIOD 1
#define TIMER_0_PERIOD_UNITS "us"
#define TIMER_0_RESET_OUTPUT 0
#define TIMER_0_SNAPSHOT 1
#define TIMER_0_SPAN 32
#define TIMER_0_TICKS_PER_SEC 1000000
#define TIMER_0_TIMEOUT_PULSE_OUTPUT 0
#define TIMER_0_TYPE "altera_avalon_timer"
#endif /* __SYSTEM_H_ */

219
sys.qsys
View File

@ -9,22 +9,6 @@
categories="System" />
<parameter name="bonusData"><![CDATA[bonusData
{
element Altera_UP_SD_Card_Avalon_Interface_0
{
datum _sortIndex
{
value = "14";
type = "int";
}
}
element Altera_UP_SD_Card_Avalon_Interface_0.avalon_sdcard_slave
{
datum baseAddress
{
value = "8523776";
type = "String";
}
}
element clk_27
{
datum _sortIndex
@ -37,7 +21,7 @@
{
datum _sortIndex
{
value = "15";
value = "8";
type = "int";
}
}
@ -45,7 +29,7 @@
{
datum baseAddress
{
value = "8524800";
value = "8523840";
type = "String";
}
}
@ -61,7 +45,7 @@
{
datum _sortIndex
{
value = "7";
value = "9";
type = "int";
}
}
@ -69,7 +53,7 @@
{
datum baseAddress
{
value = "8524832";
value = "8523872";
type = "String";
}
}
@ -77,7 +61,7 @@
{
datum _sortIndex
{
value = "6";
value = "7";
type = "int";
}
}
@ -85,7 +69,7 @@
{
datum baseAddress
{
value = "8524960";
value = "8524000";
type = "String";
}
}
@ -149,7 +133,7 @@
{
datum _sortIndex
{
value = "8";
value = "11";
type = "int";
}
}
@ -157,7 +141,7 @@
{
datum baseAddress
{
value = "8524944";
value = "8523984";
type = "String";
}
}
@ -165,7 +149,7 @@
{
datum _sortIndex
{
value = "9";
value = "12";
type = "int";
}
}
@ -173,7 +157,7 @@
{
datum baseAddress
{
value = "8524928";
value = "8523968";
type = "String";
}
}
@ -181,7 +165,7 @@
{
datum _sortIndex
{
value = "10";
value = "13";
type = "int";
}
}
@ -189,7 +173,7 @@
{
datum baseAddress
{
value = "8524912";
value = "8523952";
type = "String";
}
}
@ -197,7 +181,7 @@
{
datum _sortIndex
{
value = "11";
value = "14";
type = "int";
}
}
@ -205,7 +189,7 @@
{
datum baseAddress
{
value = "8524896";
value = "8523936";
type = "String";
}
}
@ -213,7 +197,7 @@
{
datum _sortIndex
{
value = "12";
value = "15";
type = "int";
}
}
@ -221,7 +205,7 @@
{
datum baseAddress
{
value = "8524880";
value = "8523920";
type = "String";
}
}
@ -229,7 +213,7 @@
{
datum _sortIndex
{
value = "13";
value = "16";
type = "int";
}
}
@ -237,7 +221,39 @@
{
datum baseAddress
{
value = "8524864";
value = "8523904";
type = "String";
}
}
element spi_0
{
datum _sortIndex
{
value = "10";
type = "int";
}
}
element spi_0.spi_control_port
{
datum baseAddress
{
value = "8523776";
type = "String";
}
}
element timer_0
{
datum _sortIndex
{
value = "6";
type = "int";
}
}
element timer_0.s1
{
datum baseAddress
{
value = "8523808";
type = "String";
}
}
@ -300,18 +316,10 @@
dir="end" />
<interface name="reset" internal="clk_27.clk_in_reset" type="reset" dir="end" />
<interface
name="sdcard_0"
internal="Altera_UP_SD_Card_Avalon_Interface_0.conduit_end"
name="spi_0_external"
internal="spi_0.external"
type="conduit"
dir="end" />
<module
name="Altera_UP_SD_Card_Avalon_Interface_0"
kind="Altera_UP_SD_Card_Avalon_Interface_mod"
version="15.1"
enabled="1">
<parameter name="AUTO_CLK_CLOCK_RATE" value="27000000" />
<parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
</module>
<module name="clk_27" kind="clock_source" version="15.1" enabled="1">
<parameter name="clockFrequency" value="27000000" />
<parameter name="clockFrequencyKnown" value="true" />
@ -391,7 +399,7 @@
<parameter name="dataAddrWidth" value="24" />
<parameter name="dataMasterHighPerformanceAddrWidth" value="1" />
<parameter name="dataMasterHighPerformanceMapParam" value="" />
<parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='epcq_controller_0.avl_mem' start='0x0' end='0x800000' type='altera_epcq_controller_mod.avl_mem' /><slave name='onchip_memory2_0.s1' start='0x810000' end='0x819000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_qsys_0.debug_mem_slave' start='0x820800' end='0x821000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='Altera_UP_SD_Card_Avalon_Interface_0.avalon_sdcard_slave' start='0x821000' end='0x821400' type='Altera_UP_SD_Card_Avalon_Interface_mod.avalon_sdcard_slave' /><slave name='epcq_controller_0.avl_csr' start='0x821400' end='0x821420' type='altera_epcq_controller_mod.avl_csr' /><slave name='i2c_opencores_0.avalon_slave_0' start='0x821420' end='0x821440' type='i2c_opencores.avalon_slave_0' /><slave name='pio_5.s1' start='0x821440' end='0x821450' type='altera_avalon_pio.s1' /><slave name='pio_4.s1' start='0x821450' end='0x821460' type='altera_avalon_pio.s1' /><slave name='pio_3.s1' start='0x821460' end='0x821470' type='altera_avalon_pio.s1' /><slave name='pio_2.s1' start='0x821470' end='0x821480' type='altera_avalon_pio.s1' /><slave name='pio_1.s1' start='0x821480' end='0x821490' type='altera_avalon_pio.s1' /><slave name='pio_0.s1' start='0x821490' end='0x8214A0' type='altera_avalon_pio.s1' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x8214A0' end='0x8214A8' type='altera_avalon_jtag_uart.avalon_jtag_slave' /></address-map>]]></parameter>
<parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='epcq_controller_0.avl_mem' start='0x0' end='0x800000' type='altera_epcq_controller_mod.avl_mem' /><slave name='onchip_memory2_0.s1' start='0x810000' end='0x81A000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_qsys_0.debug_mem_slave' start='0x820800' end='0x821000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='spi_0.spi_control_port' start='0x821000' end='0x821020' type='altera_avalon_spi.spi_control_port' /><slave name='timer_0.s1' start='0x821020' end='0x821040' type='altera_avalon_timer.s1' /><slave name='epcq_controller_0.avl_csr' start='0x821040' end='0x821060' type='altera_epcq_controller_mod.avl_csr' /><slave name='i2c_opencores_0.avalon_slave_0' start='0x821060' end='0x821080' type='i2c_opencores.avalon_slave_0' /><slave name='pio_5.s1' start='0x821080' end='0x821090' type='altera_avalon_pio.s1' /><slave name='pio_4.s1' start='0x821090' end='0x8210A0' type='altera_avalon_pio.s1' /><slave name='pio_3.s1' start='0x8210A0' end='0x8210B0' type='altera_avalon_pio.s1' /><slave name='pio_2.s1' start='0x8210B0' end='0x8210C0' type='altera_avalon_pio.s1' /><slave name='pio_1.s1' start='0x8210C0' end='0x8210D0' type='altera_avalon_pio.s1' /><slave name='pio_0.s1' start='0x8210D0' end='0x8210E0' type='altera_avalon_pio.s1' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x8210E0' end='0x8210E8' type='altera_avalon_jtag_uart.avalon_jtag_slave' /></address-map>]]></parameter>
<parameter name="data_master_high_performance_paddr_base" value="0" />
<parameter name="data_master_high_performance_paddr_size" value="0" />
<parameter name="data_master_paddr_base" value="0" />
@ -430,14 +438,14 @@
<parameter name="icache_tagramBlockType" value="Automatic" />
<parameter name="impl" value="Tiny" />
<parameter name="instAddrWidth" value="24" />
<parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='onchip_memory2_0.s1' start='0x810000' end='0x819000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_qsys_0.debug_mem_slave' start='0x820800' end='0x821000' type='altera_nios2_gen2.debug_mem_slave' /></address-map>]]></parameter>
<parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='onchip_memory2_0.s1' start='0x810000' end='0x81A000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_qsys_0.debug_mem_slave' start='0x820800' end='0x821000' type='altera_nios2_gen2.debug_mem_slave' /></address-map>]]></parameter>
<parameter name="instructionMasterHighPerformanceAddrWidth" value="1" />
<parameter name="instructionMasterHighPerformanceMapParam" value="" />
<parameter name="instruction_master_high_performance_paddr_base" value="0" />
<parameter name="instruction_master_high_performance_paddr_size" value="0" />
<parameter name="instruction_master_paddr_base" value="0" />
<parameter name="instruction_master_paddr_size" value="0" />
<parameter name="internalIrqMaskSystemInfo" value="7" />
<parameter name="internalIrqMaskSystemInfo" value="31" />
<parameter name="io_regionbase" value="0" />
<parameter name="io_regionsize" value="0" />
<parameter name="master_addr_map" value="false" />
@ -578,7 +586,7 @@
<parameter name="initMemContent" value="true" />
<parameter name="initializationFileName" value="onchip_mem.hex" />
<parameter name="instanceID" value="NONE" />
<parameter name="memorySize" value="36864" />
<parameter name="memorySize" value="40960" />
<parameter name="readDuringWriteMode" value="DONT_CARE" />
<parameter name="resetrequest_enabled" value="true" />
<parameter name="simAllowMRAMContentsFile" value="false" />
@ -674,22 +682,41 @@
<parameter name="simDrivenValue" value="0" />
<parameter name="width" value="8" />
</module>
<module name="spi_0" kind="altera_avalon_spi" version="15.1" enabled="1">
<parameter name="avalonSpec" value="2.0" />
<parameter name="clockPhase" value="0" />
<parameter name="clockPolarity" value="0" />
<parameter name="dataWidth" value="8" />
<parameter name="disableAvalonFlowControl" value="false" />
<parameter name="inputClockRate" value="27000000" />
<parameter name="insertDelayBetweenSlaveSelectAndSClk" value="false" />
<parameter name="insertSync" value="false" />
<parameter name="lsbOrderedFirst" value="false" />
<parameter name="masterSPI" value="true" />
<parameter name="numberOfSlaves" value="1" />
<parameter name="syncRegDepth" value="2" />
<parameter name="targetClockRate" value="13500000" />
<parameter name="targetSlaveSelectToSClkDelay" value="0.0" />
</module>
<module name="timer_0" kind="altera_avalon_timer" version="15.1" enabled="1">
<parameter name="alwaysRun" value="false" />
<parameter name="counterSize" value="32" />
<parameter name="fixedPeriod" value="false" />
<parameter name="period" value="1" />
<parameter name="periodUnits" value="USEC" />
<parameter name="resetOutput" value="false" />
<parameter name="snapshot" value="true" />
<parameter name="systemFrequency" value="27000000" />
<parameter name="timeoutPulseOutput" value="false" />
<parameter name="watchdogPulse" value="2" />
</module>
<connection
kind="avalon"
version="15.1"
start="nios2_qsys_0.data_master"
end="jtag_uart_0.avalon_jtag_slave">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x008214a0" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
version="15.1"
start="nios2_qsys_0.data_master"
end="Altera_UP_SD_Card_Avalon_Interface_0.avalon_sdcard_slave">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x00821000" />
<parameter name="baseAddress" value="0x008210e0" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@ -698,7 +725,7 @@
start="nios2_qsys_0.data_master"
end="i2c_opencores_0.avalon_slave_0">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x00821420" />
<parameter name="baseAddress" value="0x00821060" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@ -707,7 +734,7 @@
start="nios2_qsys_0.data_master"
end="epcq_controller_0.avl_csr">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x00821400" />
<parameter name="baseAddress" value="0x00821040" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@ -743,7 +770,7 @@
start="nios2_qsys_0.data_master"
end="pio_0.s1">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x00821490" />
<parameter name="baseAddress" value="0x008210d0" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@ -752,7 +779,7 @@
start="nios2_qsys_0.data_master"
end="pio_1.s1">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x00821480" />
<parameter name="baseAddress" value="0x008210c0" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@ -761,7 +788,7 @@
start="nios2_qsys_0.data_master"
end="pio_2.s1">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x00821470" />
<parameter name="baseAddress" value="0x008210b0" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@ -770,7 +797,7 @@
start="nios2_qsys_0.data_master"
end="pio_3.s1">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x00821460" />
<parameter name="baseAddress" value="0x008210a0" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@ -779,7 +806,7 @@
start="nios2_qsys_0.data_master"
end="pio_4.s1">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x00821450" />
<parameter name="baseAddress" value="0x00821090" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@ -788,7 +815,25 @@
start="nios2_qsys_0.data_master"
end="pio_5.s1">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x00821440" />
<parameter name="baseAddress" value="0x00821080" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
version="15.1"
start="nios2_qsys_0.data_master"
end="timer_0.s1">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x00821020" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
version="15.1"
start="nios2_qsys_0.data_master"
end="spi_0.spi_control_port">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x00821000" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@ -816,12 +861,9 @@
<connection kind="clock" version="15.1" start="clk_27.clk" end="pio_2.clk" />
<connection kind="clock" version="15.1" start="clk_27.clk" end="pio_3.clk" />
<connection kind="clock" version="15.1" start="clk_27.clk" end="pio_4.clk" />
<connection
kind="clock"
version="15.1"
start="clk_27.clk"
end="Altera_UP_SD_Card_Avalon_Interface_0.clk" />
<connection kind="clock" version="15.1" start="clk_27.clk" end="pio_5.clk" />
<connection kind="clock" version="15.1" start="clk_27.clk" end="timer_0.clk" />
<connection kind="clock" version="15.1" start="clk_27.clk" end="spi_0.clk" />
<connection
kind="clock"
version="15.1"
@ -842,21 +884,35 @@
version="15.1"
start="nios2_qsys_0.irq"
end="i2c_opencores_0.interrupt_sender">
<parameter name="irqNumber" value="0" />
<parameter name="irqNumber" value="3" />
</connection>
<connection
kind="interrupt"
version="15.1"
start="nios2_qsys_0.irq"
end="epcq_controller_0.interrupt_sender">
<parameter name="irqNumber" value="1" />
<parameter name="irqNumber" value="2" />
</connection>
<connection
kind="interrupt"
version="15.1"
start="nios2_qsys_0.irq"
end="jtag_uart_0.irq">
<parameter name="irqNumber" value="2" />
<parameter name="irqNumber" value="1" />
</connection>
<connection
kind="interrupt"
version="15.1"
start="nios2_qsys_0.irq"
end="timer_0.irq">
<parameter name="irqNumber" value="0" />
</connection>
<connection
kind="interrupt"
version="15.1"
start="nios2_qsys_0.irq"
end="spi_0.irq">
<parameter name="irqNumber" value="4" />
</connection>
<connection
kind="nios_custom_instruction"
@ -925,11 +981,6 @@
version="15.1"
start="clk_27.clk_reset"
end="pio_4.reset" />
<connection
kind="reset"
version="15.1"
start="clk_27.clk_reset"
end="Altera_UP_SD_Card_Avalon_Interface_0.reset" />
<connection
kind="reset"
version="15.1"
@ -940,6 +991,16 @@
version="15.1"
start="clk_27.clk_reset"
end="pio_5.reset" />
<connection
kind="reset"
version="15.1"
start="clk_27.clk_reset"
end="timer_0.reset" />
<connection
kind="reset"
version="15.1"
start="clk_27.clk_reset"
end="spi_0.reset" />
<connection
kind="reset"
version="15.1"

2855
sys.sopcinfo
View File

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