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313 Commits 4 Branches 32 Tags 7.7 MiB
v1-series
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313 Commits

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Author SHA1 Message Date
marqs
10f1afd79c tweak activity detection to fix auto input 2024-06-11 23:08:00 +03:00
marqs
e49106b635 add support for Lumacode and VRR flag 2024-06-01 12:52:51 +03:00
marqs
b45e0fb517 tvp7002: optimize CP current adjustment 
Adjust charge pump current based on the number of pixels
ultimately extracted from a line which can be less than
sample rate. This seems to result in reduced jitter
on optimized modes.
 2024-06-01 12:39:08 +03:00
marqs
1ba1779632 it6613: add support for Freesync infoframe 2024-06-01 12:35:42 +03:00
marqs
46a4f4450f add passthru mode option 2024-05-25 11:16:16 +03:00
marqs
88026cafa2 fix potential jumping issue with HV sync 2024-05-25 11:15:02 +03:00
marqs
353437ab87 sync processing and preset improvements 
* increase accurary of vblank region calculation
* increase selectable PLL coast range
* fix GBI preset H multiplication factors
* enable 1250i/50 detection
 2024-01-07 23:00:16 +02:00
marqs
cb8e2b807c increase video mode name length to fit null terminator 2023-10-29 17:27:10 +02:00
marqs
080e2b2b91 fix upsample2x 2023-10-24 00:21:32 +03:00
marqs
83c33c41b9 restore original test pattern 2023-10-24 00:19:46 +03:00
marqs
8b35ba3339 fix locking issue with fractional sample rates 2023-10-19 18:51:32 +03:00
marqs
edb300e03a misc fixes 
* fix phase adjustment
* fix HDMI AVI infoframe checksum calculation
* reduce passthru OSD size
 2023-10-08 18:02:36 +03:00
marqs
c0dae3da36 add support for shadow masks (up to 4x4) 2023-09-22 22:34:35 +03:00
marqs
1ba02417d5 fix lockup issue due to counter reaching max value 2023-09-19 22:39:21 +03:00
marqs
6ae321a9ff optimize code size and add HDR flag setting 2023-08-27 10:55:45 +03:00
marqs
4bc98224e4 it6613: add support for HDR Infoframe 2023-08-26 23:25:46 +03:00
marqs
0ce2809183 add Line6x mode for 240p/288p 2023-08-23 21:34:40 +03:00
marqs
31851f372d restore hybrid scanlines and reverse LPF functions 2023-08-07 18:18:53 +03:00
marqs
b2998355c8 minor fixes related to hsync length 2023-08-05 22:42:55 +03:00
marqs
2e1fdab16b add support for v1.8 PCBs 2023-08-05 22:41:58 +03:00
marqs
a3a3304152 tvp7002: detect missing hsync only during vsync 2023-08-05 22:41:07 +03:00
marqs
d8f2b98489 bring back mask option 2023-05-29 22:10:46 +03:00
marqs
e3d055db27 fix occasional line synchronization issue 2023-05-29 21:43:29 +03:00
marqs
ab6bd9fc8a calculate hsync width on FPGA instead of reading TVP7002 2023-05-28 17:06:07 +03:00
marqs
de1b441167 fix SD profile import and use default 480p preset for TP 2023-04-18 23:14:30 +03:00
marqs
c5f7483410 fix H.backporch range 2023-03-30 00:55:16 +03:00
marqs
3a17642d5b update generated files for v1.01 2023-03-13 21:51:40 +02:00
marqs
d57a44131a update menu and avconfig structures 2023-03-13 21:49:24 +02:00
marqs
0839e118ad update video mode selection and processing 
Updated mode detection to be based on new TVP7002 frontend, and integrated Pure-LM functionality and processing from OSSC Pro.
 2023-03-11 12:45:19 +02:00
marqs
86c3f744ed update programming files / scripts 
* do not generate .map file for .jic
* wait for USB Blaster if needed when reprogramming SW
* set correct bit to halt pulpino core before writing image
 2023-03-11 12:36:18 +02:00
marqs
df643ec742 improve TVP7002 frontend sync detection 
Store csync leading edge position so that field change timing can be calculated accurately upon VSYNC detection
 2023-03-11 12:32:26 +02:00
marqs
a825bb048c pcm1862: add mono mode support 2023-02-28 19:41:11 +02:00
marqs
804642bd98 integrate RTL from ossc_pro project 2023-02-28 19:39:59 +02:00
marqs
94c0526265 update project configuration and IP files 2023-02-13 18:55:14 +02:00
marqs
a8a3142071 add sync activity detection on tvp7002 frontend 2023-02-13 18:53:20 +02:00
marqs
02b2495221 update tvp7002 driver for external sync processing 2023-02-13 18:51:39 +02:00
marqs
76da437125 integrate new tvp7002 frontend 2023-01-31 20:51:06 +02:00
marqs
aa4beec957 bump sys_ctrl register to 32bit 2023-01-31 20:50:33 +02:00
marqs
db1cf5922f tvp7002 related robustness improvements 
* bypass VSYNC processing
* enable raw SOG/HSYNC output
* add frontend RTL to read status from unprocessed signals
 2023-01-31 20:49:08 +02:00
marqs
fd37e4275b update to Quartus 21.1 2022-12-27 14:59:47 +02:00
marqs
e1fbd4ad36 more fixes to settings import/export 2022-02-20 11:38:49 +02:00
marqs
101a23bdb5 Export settings fixes and improvements 
* fix compatibility with Windows
* add RAW export option
 2022-01-08 15:26:08 +02:00
marqs
cbe2611471 fix OSD size in interlace passthru mode 2021-07-31 18:13:22 +03:00
marqs
20a5696977 rename "256x240 aspect" option values 2021-07-31 18:12:07 +03:00
marqs
dfedb850a3 pcm1862: support PCM1864/1865 as potential alternatives 2021-07-31 18:10:53 +03:00
marqs
8b7258fa9e update Codelite workspace config 2021-07-31 18:08:16 +03:00
marqs
f37f0e706e enable bitstream compression within .jic 2021-07-31 18:07:11 +03:00
marqs
73dd1963b9 update to Quartus 20.1.1 2021-07-31 18:06:21 +03:00
marqs
20ac572baf Merge branch 'megari-release_userdata_export_fat16' into release 2020-11-27 23:33:44 +02:00
marqs
1ab1636619 Merge branch 'release_userdata_export_fat16' of git://github.com/megari/ossc into megari-release_userdata_export_fat16 2020-11-27 23:09:46 +02:00