12 Commits

Author	SHA1	Message	Date
marqs	e8d5097ecb	replace nios crcCI with hw_crc32 qsys module	2018-10-07 23:38:26 +03:00
marqs	4676cbd2f0	integrate zero-riscy	2018-10-06 13:19:12 +03:00
marqs	e1d8446752	BSP and sw modifications	2018-09-26 00:19:24 +03:00
marqs	37650ca22b	misc improvements ... * add character LCD backlight timeout option * increase h.mask range * show accurate (fpga-calculated) timings on infoscreen	2018-03-28 20:09:40 +03:00
marqs	a24d6b0e3a	Update latency tester ... * Enable operation with all sources * Measure strobe length on low-persistence displays	2017-10-28 12:10:54 +03:00
marqs	1bf279b2a7	Initial latency tester implementation	2017-10-22 22:45:29 +03:00
marqs	4f36278cb7	Sync processing rewritten and some issues fixed ... * add 480i/576i line3x/4x * clean up RTL and SDC * update AVI infoframe properly * add HDMI IT content option	2017-05-18 23:36:37 +03:00
marqs	434186d64e	Improve lo-res mode processing features ... * workaround for phase shift issue on optimized modes * add hscale option for 256x240 opt Line3x mode * distribute video modes to groups and allow passthru for all modes	2017-01-23 00:56:17 +02:00
marqs	d77c293b70	* Clean up some FPGA code ... * Wrap sampling phase setting * Enable hal.enable_lightweight_device_driver_api to reduce CPU code size	2016-12-31 14:18:21 +02:00
marqs	f55e9a877e	SD SPI implementation finished	2016-10-21 01:19:53 +03:00
marqs	71d60144e8	Timer and SPI added.	2016-10-16 12:53:54 +03:00
marqs	388c464f63	Initial public release (FW 0.64)	2016-02-23 01:03:50 +02:00