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https://github.com/marqs85/ossc.git
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f502b2e46c
- Code cleanup - Some project files added - PAL linetriple added - FPGA PLL parameters optimized - Reduced jitter on low video clock sources
94 lines
1.8 KiB
C
94 lines
1.8 KiB
C
#include <stdio.h>
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#include <unistd.h>
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#include "system.h"
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#include "i2c_opencores.h"
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#include "hdmitx.h"
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#include "it6613.h"
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inline alt_u32 read_it2(alt_u32 regaddr)
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{
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I2C_start(I2CA_BASE, IT_BASE, 0);
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I2C_write(I2CA_BASE, regaddr, 0);
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I2C_start(I2CA_BASE, IT_BASE, 1);
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return I2C_read(I2CA_BASE,1);
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}
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inline void write_it2(alt_u32 regaddr, alt_u8 data)
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{
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I2C_start(I2CA_BASE, IT_BASE, 0);
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I2C_write(I2CA_BASE, regaddr, 0);
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I2C_write(I2CA_BASE, data, 1);
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}
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BYTE I2C_Read_Byte(BYTE Addr,BYTE RegAddr)
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{
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I2C_start(I2CA_BASE, Addr, 0);
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I2C_write(I2CA_BASE, RegAddr, 0);
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I2C_start(I2CA_BASE, Addr, 1);
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return I2C_read(I2CA_BASE,1);
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}
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SYS_STATUS I2C_Write_Byte(BYTE Addr,BYTE RegAddr,BYTE Data)
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{
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I2C_start(I2CA_BASE, Addr, 0);
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I2C_write(I2CA_BASE, RegAddr, 0);
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I2C_write(I2CA_BASE, Data, 1);
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return 0;
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}
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SYS_STATUS I2C_Read_ByteN(BYTE Addr,BYTE RegAddr,BYTE *pData,int N)
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{
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int i;
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for (i=0; i<N; i++)
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pData[i] = I2C_Read_Byte(Addr, RegAddr+i);
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return 0;
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}
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SYS_STATUS I2C_Write_ByteN(BYTE Addr,BYTE RegAddr,BYTE *pData,int N)
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{
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int i;
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for (i=0; i<N; i++)
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I2C_Write_Byte(Addr, RegAddr+i, pData[i]);
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return 0;
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}
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BYTE HDMITX_ReadI2C_Byte(BYTE RegAddr)
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{
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return read_it2(RegAddr);
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}
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SYS_STATUS HDMITX_WriteI2C_Byte(BYTE RegAddr,BYTE val)
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{
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write_it2(RegAddr, val);
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return 0;
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}
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SYS_STATUS HDMITX_ReadI2C_ByteN(BYTE RegAddr,BYTE *pData,int N)
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{
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int i;
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for (i=0; i<N; i++)
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pData[i] = HDMITX_ReadI2C_Byte(RegAddr+i);
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return 0;
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}
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SYS_STATUS HDMITX_WriteI2C_ByteN(BYTE RegAddr,BYTE *pData,int N)
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{
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int i;
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for (i=0; i<N; i++)
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HDMITX_WriteI2C_Byte(RegAddr+i, pData[i]);
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return 0;
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}
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void DelayMS(unsigned int ms)
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{
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usleep(1000*ms);
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}
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