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Added disassembler.
This commit is contained in:
Mike Naberezny
parent
fda4631664
commit
469a822a37
169
src/py65/disassembler.py
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169
src/py65/disassembler.py
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@ -0,0 +1,169 @@
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class Disassembler:
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_instructions = [
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['BRK','imp'], ['ORA','inx'], ['???','imp'], ['???','imp'],
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['???','imp'], ['ORA','zpg'], ['ASL','zpg'], ['???','imp'],
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['PHP','imp'], ['ORA','imm'], ['ASL','acc'], ['???','imp'],
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['???','imp'], ['ORA','abs'], ['ASL','abs'], ['???','imp'],
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['BPL','rel'], ['ORA','iny'], ['???','imp'], ['???','imp'],
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['???','imp'], ['ORA','zpx'], ['ASL','zpx'], ['???','imp'],
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['CLC','imp'], ['ORA','aby'], ['???','imp'], ['???','imp'],
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['???','imp'], ['ORA','abx'], ['ASL','abx'], ['???','imp'],
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['JSR','abs'], ['AND','inx'], ['???','imp'], ['???','imp'],
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['BIT','zpg'], ['AND','zpg'], ['ROL','zpg'], ['???','imp'],
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['PLP','imp'], ['AND','imm'], ['ROL','acc'], ['???','imp'],
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['BIT','abs'], ['AND','abs'], ['ROL','abs'], ['???','imp'],
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['BMI','rel'], ['AND','iny'], ['???','imp'], ['???','imp'],
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['???','imp'], ['AND','zpx'], ['ROL','zpx'], ['???','imp'],
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['SEC','imp'], ['AND','aby'], ['???','imp'], ['???','imp'],
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['???','imp'], ['AND','abx'], ['ROL','abx'], ['???','imp'],
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['RTI','imp'], ['EOR','inx'], ['???','imp'], ['???','imp'],
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['???','imp'], ['EOR','zpg'], ['LSR','zpg'], ['???','imp'],
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['PHA','imp'], ['EOR','imm'], ['LSR','acc'], ['???','imp'],
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['JMP','abs'], ['EOR','abs'], ['LSR','abs'], ['???','imp'],
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['BVC','rel'], ['EOR','iny'], ['???','imp'], ['???','imp'],
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['???','imp'], ['EOR','zpx'], ['LSR','zpx'], ['???','imp'],
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['CLI','imp'], ['EOR','aby'], ['???','imp'], ['???','imp'],
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['???','imp'], ['EOR','abx'], ['LSR','abx'], ['???','imp'],
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['RTS','imp'], ['ADC','inx'], ['???','imp'], ['???','imp'],
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['???','imp'], ['ADC','zpg'], ['ROR','zpg'], ['???','imp'],
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['PLA','imp'], ['ADC','imm'], ['ROR','acc'], ['???','imp'],
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['JMP','ind'], ['ADC','abs'], ['ROR','abs'], ['???','imp'],
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['BVS','rel'], ['ADC','iny'], ['???','imp'], ['???','imp'],
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['???','imp'], ['ADC','zpx'], ['ROR','zpx'], ['???','imp'],
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['SEI','imp'], ['ADC','aby'], ['???','imp'], ['???','imp'],
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['???','imp'], ['ADC','abx'], ['ROR','abx'], ['???','imp'],
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['???','imp'], ['STA','inx'], ['???','imp'], ['???','imp'],
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['STY','zpg'], ['STA','zpg'], ['STX','zpg'], ['???','imp'],
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['DEY','imp'], ['???','imp'], ['TXA','imp'], ['???','imp'],
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['STY','abs'], ['STA','abs'], ['STX','abs'], ['???','imp'],
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['BCC','rel'], ['STA','iny'], ['???','imp'], ['???','imp'],
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['STY','zpx'], ['STA','zpx'], ['STX','zpy'], ['???','imp'],
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['TYA','imp'], ['STA','aby'], ['TXS','imp'], ['???','imp'],
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['???','imp'], ['STA','abx'], ['???','imp'], ['???','imp'],
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['LDY','imm'], ['LDA','inx'], ['LDX','imm'], ['???','imp'],
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['LDY','zpg'], ['LDA','zpg'], ['LDX','zpg'], ['???','imp'],
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['TAY','imp'], ['LDA','imm'], ['TAX','imp'], ['???','imp'],
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['LDY','abs'], ['LDA','abs'], ['LDX','abs'], ['???','imp'],
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['BCS','rel'], ['LDA','iny'], ['???','imp'], ['???','imp'],
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['LDY','zpx'], ['LDA','zpx'], ['LDX','zpy'], ['???','imp'],
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['CLV','imp'], ['LDA','aby'], ['TSX','imp'], ['???','imp'],
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['LDY','abx'], ['LDA','abx'], ['LDX','aby'], ['???','imp'],
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['CPY','imm'], ['CMP','inx'], ['???','imp'], ['???','imp'],
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['CPY','zpg'], ['CMP','zpg'], ['DEC','zpg'], ['???','imp'],
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['INY','imp'], ['CMP','imm'], ['DEX','imp'], ['???','imp'],
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['CPY','abs'], ['CMP','abs'], ['DEC','abs'], ['???','imp'],
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['BNE','rel'], ['CMP','iny'], ['???','imp'], ['???','imp'],
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['???','imp'], ['CMP','zpx'], ['DEC','zpx'], ['???','imp'],
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['CLD','imp'], ['CMP','aby'], ['???','imp'], ['???','imp'],
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['???','imp'], ['CMP','abx'], ['DEC','abx'], ['???','imp'],
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['CPX','imm'], ['SBC','inx'], ['???','imp'], ['???','imp'],
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['CPX','zpg'], ['SBC','zpg'], ['INC','zpg'], ['???','imp'],
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['INX','imp'], ['SBC','imm'], ['NOP','imp'], ['???','imp'],
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['CPX','abs'], ['SBC','abs'], ['INC','abs'], ['???','imp'],
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['BEQ','rel'], ['SBC','iny'], ['???','imp'], ['???','imp'],
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['???','imp'], ['SBC','zpx'], ['INC','zpx'], ['???','imp'],
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['SED','imp'], ['SBC','aby'], ['???','imp'], ['???','imp'],
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['???','imp'], ['SBC','abx'], ['INC','abx'], ['???','imp']
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]
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def __init__(self, mpu, address_parser):
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self._mpu = mpu
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self._address_parser = address_parser
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def instruction_at(self, pc):
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""" Disassemble the instruction at PC and return a tuple
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containing (instruction byte count, human readable text)
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"""
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instruction = self._mpu.ByteAt(pc)
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disasm, addressing = self._instructions[instruction]
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if addressing == 'acc':
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disasm += ' A'
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elif addressing == 'abs':
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address = self._mpu.WordAt(pc + 1)
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address_or_label = self._address_parser.label_for(address,
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'$%04x' % address)
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disasm += ' ' + address_or_label
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length = 3
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elif addressing == 'abx':
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address = self._mpu.WordAt(pc + 1)
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address_or_label = self._address_parser.label_for(address,
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'$%04x' % address)
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disasm += ' %s,X' % address_or_label
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length = 3
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elif addressing == 'aby':
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address = self._mpu.WordAt(pc + 1)
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address_or_label = self._address_parser.label_for(address,
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'$%04x' % address)
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disasm += ' %s,Y' % address_or_label
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length = 3
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elif addressing == 'imm':
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byte = self._mpu.ByteAt(pc + 1)
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disasm += ' #$%02x' % byte
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length = 2
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elif addressing == 'imp':
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length = 1
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elif addressing == 'ind':
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address = self._mpu.WordAt(pc + 1)
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address_or_label = self._address_parser.label_for(address,
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'$%04x' % address)
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disasm += ' (%s)' % address_or_label
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length = 3
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elif addressing == 'iny':
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zp_address = self._mpu.ByteAt(pc + 1)
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address_or_label = self._address_parser.label_for(zp_address,
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'$%02x' % zp_address)
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disasm += ' (%s),Y' % address_or_label
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length = 2
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elif addressing == 'inx':
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zp_address = self._mpu.ByteAt(pc + 1)
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address_or_label = self._address_parser.label_for(zp_address,
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'$%02x' % zp_address)
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disasm += ' (%s,X)' % address_or_label
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length = 2
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elif addressing == 'rel':
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opv = self._mpu.ByteAt(pc + 1)
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targ = pc + 2
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if opv & 128:
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targ -= (opv ^ 255) + 1
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else:
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targ += opv
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targ &= 0xffff
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address_or_label = self._address_parser.label_for(targ,
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'$%04x' % targ)
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disasm += ' ' + address_or_label
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length = 2
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elif addressing == 'zpg':
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zp_address = self._mpu.ByteAt(pc + 1)
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address_or_label = self._address_parser.label_for(zp_address,
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'$%02x' % zp_address)
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disasm += ' %s' % address_or_label
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length = 2
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elif addressing == 'zpx':
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zp_address = self._mpu.ByteAt(pc + 1)
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address_or_label = self._address_parser.label_for(zp_address,
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'$%02x' % zp_address)
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disasm += ' %s,X' % address_or_label
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length = 2
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elif addressing == 'zpy':
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zp_address = self._mpu.ByteAt(pc + 1)
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address_or_label = self._address_parser.label_for(zp_address,
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'$%02x' % zp_address)
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disasm += ' %s,Y' % address_or_label
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length = 2
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return (length, disasm)
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@ -7,6 +7,7 @@ import shlex
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import asyncore
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import sys
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from py65.mpu6502 import MPU
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from py65.disassembler import Disassembler
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from py65.util import itoa, AddressParser, getch
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from py65.memory import ObservableMemory
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@ -18,6 +19,7 @@ class Monitor(cmd.Cmd):
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self._install_mpu_observers()
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self._update_prompt()
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self._address_parser = AddressParser()
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self._disassembler = Disassembler(self._mpu, self._address_parser)
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cmd.Cmd.__init__(self, completekey, stdin, stdout)
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def onecmd(self, line):
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@ -105,11 +107,34 @@ class Monitor(cmd.Cmd):
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def help_quit(self):
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return self.help_EOF()
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def do_disassemble(self, args):
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start, end = self._address_parser.range(args)
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if start == end:
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end += 1
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address = start
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while address < end:
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bytes, disasm = self._disassembler.instruction_at(address)
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mem = ''
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for byte in self._mpu.memory[address:address+bytes]:
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mem += '%02x ' % byte
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line = "$%04x %-10s%s" % (address, mem, disasm)
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self._output(line)
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address += bytes
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def help_disassemble(self):
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self._output("disassemble <address_range>")
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self._output("Disassemble instructions in the address range.")
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def help_step(self):
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self._output("Single-step through instructions.")
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def do_step(self, args):
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self._mpu.step()
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self.do_disassemble('%04x' % self._mpu.pc)
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def help_return(self):
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self._output("Continues execution and returns to the monitor just")
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@ -119,6 +144,10 @@ class Monitor(cmd.Cmd):
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returns = [0x60, 0x40] # RTS, RTI
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self._run(stopcodes=returns)
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def help_goto(self):
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self._output("goto <address>")
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self._output("Change the PC to address and continue execution.")
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def do_goto(self, args):
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self._mpu.pc = self._address_parser.number(args)
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brks = [0x00] # BRK
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@ -295,6 +324,10 @@ class Monitor(cmd.Cmd):
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out += "%02x " % byte
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self._output(out)
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def help_add_label(self):
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self._output("add_label <address> <label>")
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self._output("Map a given address to a label.")
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def do_add_label(self, args):
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split = shlex.split(args)
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if len(split) != 2:
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@ -306,6 +339,10 @@ class Monitor(cmd.Cmd):
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self._address_parser.labels[label] = address
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def help_show_labels(self):
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self._output("show_labels")
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self._output("Display current label mappings.")
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def do_show_labels(self, args):
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values = self._address_parser.labels.values()
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keys = self._address_parser.labels.keys()
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@ -315,6 +352,10 @@ class Monitor(cmd.Cmd):
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for address, label in byaddress:
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self._output("%04x: %s" % (address, label))
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def help_delete_label(self):
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self._output("delete_label <label>")
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self._output("Remove the specified label from the label tables.")
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def do_delete_label(self, args):
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try:
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del self._address_parser.labels[args]
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276
src/py65/tests/test_disassembler.py
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276
src/py65/tests/test_disassembler.py
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@ -0,0 +1,276 @@
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import unittest
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import sys
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from py65.mpu6502 import MPU
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from py65.disassembler import Disassembler
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from py65.util import AddressParser
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class DisassemblerTests(unittest.TestCase):
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def test_disassembles_00(self):
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length, disasm = self.disassemble([0x00])
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self.assertEqual(1, length)
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self.assertEqual('BRK', disasm)
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def test_disassembles_01(self):
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length, disasm = self.disassemble([0x01, 0x44])
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self.assertEqual(2, length)
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self.assertEqual('ORA ($44,X)', disasm)
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def test_disassembles_02(self):
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length, disasm = self.disassemble([0x02])
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self.assertEqual(1, length)
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self.assertEqual('???', disasm)
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def test_disassembles_03(self):
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length, disasm = self.disassemble([0x03])
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self.assertEqual(1, length)
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self.assertEqual('???', disasm)
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def test_disassembles_04(self):
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length, disasm = self.disassemble([0x04])
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self.assertEqual(1, length)
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self.assertEqual('???', disasm)
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def test_disassembles_05(self):
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length, disasm = self.disassemble([0x05, 0x44])
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self.assertEqual(2, length)
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self.assertEqual('ORA $44', disasm)
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def test_disassembles_06(self):
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length, disasm = self.disassemble([0x06, 0x44])
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self.assertEqual(2, length)
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self.assertEqual('ASL $44', disasm)
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def test_disassembles_07(self):
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length, disasm = self.disassemble([0x07])
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self.assertEqual(1, length)
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self.assertEqual('???', disasm)
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def test_disassembles_08(self):
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length, disasm = self.disassemble([0x08])
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self.assertEqual(1, length)
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self.assertEqual('PHP', disasm)
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def test_disassembles_09(self):
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length, disasm = self.disassemble([0x09, 0x44])
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self.assertEqual(2, length)
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self.assertEqual('ORA #$44', disasm)
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def test_disassembles_10(self):
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length, disasm = self.disassemble([0x10, 0x44])
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self.assertEqual(2, length)
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self.assertEqual('BPL $0046', disasm)
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def test_disassembles_11(self):
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length, disasm = self.disassemble([0x11, 0x44])
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self.assertEqual(2, length)
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self.assertEqual('ORA ($44),Y', disasm)
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def test_disassembles_12(self):
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length, disasm = self.disassemble([0x12])
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self.assertEqual(1, length)
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self.assertEqual('???', disasm)
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def test_disassembles_13(self):
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length, disasm = self.disassemble([0x13])
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self.assertEqual(1, length)
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self.assertEqual('???', disasm)
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def test_disassembles_14(self):
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length, disasm = self.disassemble([0x14])
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self.assertEqual(1, length)
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self.assertEqual('???', disasm)
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def test_disassembles_15(self):
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length, disasm = self.disassemble([0x15, 0x44])
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self.assertEqual(2, length)
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self.assertEqual('ORA $44,X', disasm)
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def test_disassembles_16(self):
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length, disasm = self.disassemble([0x16, 0x44])
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self.assertEqual(2, length)
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self.assertEqual('ASL $44,X', disasm)
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def test_disassembles_17(self):
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length, disasm = self.disassemble([0x17])
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self.assertEqual(1, length)
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self.assertEqual('???', disasm)
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def test_disassembles_18(self):
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length, disasm = self.disassemble([0x18])
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self.assertEqual(1, length)
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self.assertEqual('CLC', disasm)
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def test_disassembles_19(self):
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length, disasm = self.disassemble([0x19, 0x00, 0x44])
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self.assertEqual(3, length)
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self.assertEqual('ORA $4400,Y', disasm)
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def test_disassembles_20(self):
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length, disasm = self.disassemble([0x20, 0x97, 0x55])
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self.assertEqual(3, length)
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self.assertEqual('JSR $5597', disasm)
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def test_disassembles_21(self):
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length, disasm = self.disassemble([0x21, 0x44])
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self.assertEqual(2, length)
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self.assertEqual('AND ($44,X)', disasm)
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def test_disassembles_22(self):
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length, disasm = self.disassemble([0x22])
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self.assertEqual(1, length)
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self.assertEqual('???', disasm)
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def test_disassembles_23(self):
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length, disasm = self.disassemble([0x23])
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self.assertEqual(1, length)
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self.assertEqual('???', disasm)
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def test_disassembles_24(self):
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length, disasm = self.disassemble([0x24, 0x44])
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self.assertEqual(2, length)
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self.assertEqual('BIT $44', disasm)
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def test_disassembles_25(self):
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length, disasm = self.disassemble([0x25, 0x44])
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self.assertEqual(2, length)
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self.assertEqual('AND $44', disasm)
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def test_disassembles_26(self):
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length, disasm = self.disassemble([0x26, 0x44])
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self.assertEqual(2, length)
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self.assertEqual('ROL $44', disasm)
|
||||
|
||||
def test_disassembles_27(self):
|
||||
length, disasm = self.disassemble([0x27])
|
||||
self.assertEqual(1, length)
|
||||
self.assertEqual('???', disasm)
|
||||
|
||||
def test_disassembles_28(self):
|
||||
length, disasm = self.disassemble([0x28])
|
||||
self.assertEqual(1, length)
|
||||
self.assertEqual('PLP', disasm)
|
||||
|
||||
def test_disassembles_29(self):
|
||||
length, disasm = self.disassemble([0x29, 0x44])
|
||||
self.assertEqual(2, length)
|
||||
self.assertEqual('AND #$44', disasm)
|
||||
|
||||
def test_disassembles_30(self):
|
||||
length, disasm = self.disassemble([0x30, 0x44])
|
||||
self.assertEqual(2, length)
|
||||
self.assertEqual('BMI $0046', disasm)
|
||||
|
||||
def test_disassembles_31(self):
|
||||
length, disasm = self.disassemble([0x31, 0x44])
|
||||
self.assertEqual(2, length)
|
||||
self.assertEqual('AND ($44),Y', disasm)
|
||||
|
||||
def test_disassembles_32(self):
|
||||
length, disasm = self.disassemble([0x32])
|
||||
self.assertEqual(1, length)
|
||||
self.assertEqual('???', disasm)
|
||||
|
||||
def test_disassembles_33(self):
|
||||
length, disasm = self.disassemble([0x33])
|
||||
self.assertEqual(1, length)
|
||||
self.assertEqual('???', disasm)
|
||||
|
||||
def test_disassembles_34(self):
|
||||
length, disasm = self.disassemble([0x34])
|
||||
self.assertEqual(1, length)
|
||||
self.assertEqual('???', disasm)
|
||||
|
||||
def test_disassembles_35(self):
|
||||
length, disasm = self.disassemble([0x35, 0x44])
|
||||
self.assertEqual(2, length)
|
||||
self.assertEqual('AND $44,X', disasm)
|
||||
|
||||
def test_disassembles_36(self):
|
||||
length, disasm = self.disassemble([0x36, 0x44])
|
||||
self.assertEqual(2, length)
|
||||
self.assertEqual('ROL $44,X', disasm)
|
||||
|
||||
def test_disassembles_37(self):
|
||||
length, disasm = self.disassemble([0x37])
|
||||
self.assertEqual(1, length)
|
||||
self.assertEqual('???', disasm)
|
||||
|
||||
def test_disassembles_38(self):
|
||||
length, disasm = self.disassemble([0x38])
|
||||
self.assertEqual(1, length)
|
||||
self.assertEqual('SEC', disasm)
|
||||
|
||||
def test_disassembles_39(self):
|
||||
length, disasm = self.disassemble([0x39, 0x00, 0x44])
|
||||
self.assertEqual(3, length)
|
||||
self.assertEqual('AND $4400,Y', disasm)
|
||||
|
||||
def test_disassembles_40(self):
|
||||
length, disasm = self.disassemble([0x40])
|
||||
self.assertEqual(1, length)
|
||||
self.assertEqual('RTI', disasm)
|
||||
|
||||
def test_disassembles_41(self):
|
||||
length, disasm = self.disassemble([0x41, 0x44])
|
||||
self.assertEqual(2, length)
|
||||
self.assertEqual('EOR ($44,X)', disasm)
|
||||
|
||||
def test_disassembles_42(self):
|
||||
length, disasm = self.disassemble([0x42])
|
||||
self.assertEqual(1, length)
|
||||
self.assertEqual('???', disasm)
|
||||
|
||||
def test_disassembles_43(self):
|
||||
length, disasm = self.disassemble([0x43])
|
||||
self.assertEqual(1, length)
|
||||
self.assertEqual('???', disasm)
|
||||
|
||||
def test_disassembles_44(self):
|
||||
length, disasm = self.disassemble([0x44])
|
||||
self.assertEqual(1, length)
|
||||
self.assertEqual('???', disasm)
|
||||
|
||||
def test_disassembles_45(self):
|
||||
length, disasm = self.disassemble([0x45, 0x44])
|
||||
self.assertEqual(2, length)
|
||||
self.assertEqual('EOR $44', disasm)
|
||||
|
||||
def test_disassembles_46(self):
|
||||
length, disasm = self.disassemble([0x46, 0x44])
|
||||
self.assertEqual(2, length)
|
||||
self.assertEqual('LSR $44', disasm)
|
||||
|
||||
def test_disassembles_47(self):
|
||||
length, disasm = self.disassemble([0x47])
|
||||
self.assertEqual(1, length)
|
||||
self.assertEqual('???', disasm)
|
||||
|
||||
def test_disassembles_48(self):
|
||||
length, disasm = self.disassemble([0x48])
|
||||
self.assertEqual(1, length)
|
||||
self.assertEqual('PHA', disasm)
|
||||
|
||||
def test_disassembles_49(self):
|
||||
length, disasm = self.disassemble([0x49, 0x44])
|
||||
self.assertEqual(2, length)
|
||||
self.assertEqual('EOR #$44', disasm)
|
||||
|
||||
def test_disassembles_50(self):
|
||||
length, disasm = self.disassemble([0x50, 0x44])
|
||||
self.assertEqual(2, length)
|
||||
self.assertEqual('BVC $0046', disasm)
|
||||
|
||||
# Test Helpers
|
||||
|
||||
def disassemble(self, bytes):
|
||||
mpu = MPU()
|
||||
address_parser = AddressParser()
|
||||
disasm = Disassembler(mpu, address_parser)
|
||||
mpu.memory[0:len(bytes)-1] = bytes
|
||||
return disasm.instruction_at(0)
|
||||
|
||||
def test_suite():
|
||||
return unittest.findTestCases(sys.modules[__name__])
|
||||
|
||||
if __name__ == '__main__':
|
||||
unittest.main(defaultTest='test_suite')
|
||||
@ -16,6 +16,14 @@ class AddressParser:
|
||||
self.radix = radix
|
||||
self.labels = labels
|
||||
|
||||
def label_for(self, address, default=None):
|
||||
"""Given an address, return the corresponding label or a default.
|
||||
"""
|
||||
for label, label_address in self.labels.iteritems():
|
||||
if label_address == address:
|
||||
return label
|
||||
return default
|
||||
|
||||
def number(self, num):
|
||||
"""Parse a string containing a label or number into an address.
|
||||
"""
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user