From 9876bdb8fafbf4b6ac6213c79276599c855222a5 Mon Sep 17 00:00:00 2001
From: Mike Naberezny <mike@naberezny.com>
Date: Wed, 8 Apr 2009 19:04:05 -0700
Subject: [PATCH] Added 65C02 instruction STA (ZP).

---
 src/py65/devices/mpu65c02.py            | 37 ++++++++++++++-----------
 src/py65/tests/devices/test_mpu65c02.py | 30 ++++++++++++++++++++
 2 files changed, 51 insertions(+), 16 deletions(-)

diff --git a/src/py65/devices/mpu65c02.py b/src/py65/devices/mpu65c02.py
index d3db965..7927806 100644
--- a/src/py65/devices/mpu65c02.py
+++ b/src/py65/devices/mpu65c02.py
@@ -80,8 +80,13 @@ class MPU(NMOS6502):
 
     @instruction(name="PHY", mode="imp", cycles=4)
     def i7a(self):
-      self.y = self.stPop()
-      self.FlagsNZ(self.y)    
+        self.y = self.stPop()
+        self.FlagsNZ(self.y)    
+
+    @instruction(name="STA", mode="zpi", cycles=5)
+    def i92(self):
+        self.opSTA(self.ZeroPageIndirectAddr)
+        self.pc += 1
 
     @instruction(name="STZ", mode="abs", cycles=4)
     def i9c(self):
@@ -104,36 +109,36 @@ class MPU(NMOS6502):
 
     @instruction(name="PLX", mode="imp", cycles=4)
     def ifa(self):
-      self.x = self.stPop()
-      self.FlagsNZ(self.x)
+        self.x = self.stPop()
+        self.FlagsNZ(self.x)
 
     @instruction(name="TSB", mode="zpg", cycles=5)
     def i04(self):
-      self.opTSB(self.ZeroPageAddr)
-      self.pc += 1
+        self.opTSB(self.ZeroPageAddr)
+        self.pc += 1
 
     @instruction(name="TSB", mode="abs", cycles=6)
     def i0c(self):
-      self.opTSB(self.AbsoluteAddr)
-      self.pc += 2
+        self.opTSB(self.AbsoluteAddr)
+        self.pc += 2
 
     @instruction(name="TSB", mode="zpg", cycles=5)
     def i04(self):
-      self.opTSB(self.ZeroPageAddr)
-      self.pc += 1
+        self.opTSB(self.ZeroPageAddr)
+        self.pc += 1
 
     @instruction(name="TSB", mode="abs", cycles=6)
     def i0c(self):
-      self.opTSB(self.AbsoluteAddr)
-      self.pc += 2
+        self.opTSB(self.AbsoluteAddr)
+        self.pc += 2
 
     @instruction(name="TRB", mode="zpg", cycles=5)
     def i14(self):
-      self.opTRB(self.ZeroPageAddr)
-      self.pc += 1
+        self.opTRB(self.ZeroPageAddr)
+        self.pc += 1
 
     @instruction(name="TRB", mode="abs", cycles=6)
     def i1c(self):
-      self.opTRB(self.AbsoluteAddr)
-      self.pc += 2
+        self.opTRB(self.AbsoluteAddr)
+        self.pc += 2
 
diff --git a/src/py65/tests/devices/test_mpu65c02.py b/src/py65/tests/devices/test_mpu65c02.py
index ee5ce6d..9c894a7 100644
--- a/src/py65/tests/devices/test_mpu65c02.py
+++ b/src/py65/tests/devices/test_mpu65c02.py
@@ -250,6 +250,36 @@ class MPUTests(unittest.TestCase, Common6502Tests):
         self.assertEquals(0xAB,   mpu.y)
         self.assertEquals(0xFF,   mpu.sp)
         self.assertEquals(4, mpu.processorCycles) 
+
+    # STA Zero Page, Indirect
+    
+    def test_sta_zp_indirect_stores_a_leaves_a_and_n_flag_unchanged(self):
+        mpu = self._make_mpu()
+        mpu.flags = flags = 0xFF & ~(mpu.NEGATIVE)
+        mpu.a = 0xFF
+        self._write(mpu.memory, 0x0000, (0x92, 0x10)) #=> STA ($0010)
+        self._write(mpu.memory, 0x0010, (0xED, 0xFE)) #=> Vector to $FEED
+        mpu.memory[0xFEED] = 0x00
+        mpu.step()
+        self.assertEquals(0x0002, mpu.pc)
+        self.assertEquals(5, mpu.processorCycles)
+        self.assertEquals(0xFF, mpu.memory[0xFEED])
+        self.assertEquals(0xFF, mpu.a)
+        self.assertEquals(flags, mpu.flags)
+  
+    def test_sta_zp_indirect_stores_a_leaves_a_and_z_flag_unchanged(self):
+        mpu = self._make_mpu()
+        mpu.flags = flags = 0xFF & ~(mpu.ZERO)
+        mpu.a = 0x00
+        self._write(mpu.memory, 0x0000, (0x92, 0x10)) #=> STA ($0010)
+        self._write(mpu.memory, 0x0010, (0xED, 0xFE)) #=> Vector to $FEED
+        mpu.memory[0xFEED] = 0xFF
+        mpu.step()
+        self.assertEquals(0x0002, mpu.pc)
+        self.assertEquals(5, mpu.processorCycles)
+        self.assertEquals(0x00, mpu.memory[0xFEED])
+        self.assertEquals(0x00, mpu.a)
+        self.assertEquals(flags, mpu.flags)
         
     # STZ Zero Page