Experimental 65C02 machine code interpreter/emulator/disassembler.

Go to file

Radoslaw Kujawa a7b3f77f88 Remove tests for serial device.		2021-01-26 01:16:36 +01:00
examples	Add an example of 8-bit multiplication.	2019-01-10 10:27:44 +01:00
res	Add logo.	2018-03-26 16:28:38 +02:00
src	Update copyright year.	2021-01-25 01:09:01 +01:00
test	Remove tests for serial device.	2021-01-26 01:16:36 +01:00
.gitignore	Ignore .DS_Store	2017-01-23 13:47:22 +01:00
LICENSE	Change license to GNU GPL v3.	2019-09-23 15:20:35 +02:00
README.md	Improve wording.	2021-01-25 01:08:53 +01:00

README.md

rk65c02

65C02 code interpreter/emulator/disassembler.

This project provides a library implementing a farily complete emulator of WDC 65C02S CPU. It does not aim to be cycle-exact emulator, but otherwise it tries to mimic behaviour of 65C02S as close as possible. Currently, the following features are implemented:

Emulation of all opcodes, including WDC extensions and BCD mode.
16-bit address space.
Minimal support for interrupts.

The following notable features are missing:

Ability to execute callbacks in software utilizing this library.
Just-in-Time translation.

The only external dependencies (besides standard C library) are Boehm GC and uthash. On Fedora these can be installed with gc-devel and uthash-devel packages.

If you want to build tests, kyua quality assurance toolkit, atf testing framework and a recent snapshot (1.8f or newer) of vasm assembler (6502 with std syntax) are also necessary.