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mirror of https://github.com/rkujawa/rk65c02.git synced 2024-12-23 07:30:31 +00:00

Implement simpler to use assembly mode, straight to bus.

While here refactor existing assembly functions.
This commit is contained in:
Radosław Kujawa 2017-02-12 16:47:06 +01:00
parent 7dd511b7dd
commit 0bd7b85dea
4 changed files with 76 additions and 16 deletions

View File

@ -108,16 +108,44 @@ instruction_print(instruction_t *i)
}
}
bool
assemble_single_implied(uint8_t **buf, uint8_t *bsize, const char *mnemonic)
assembler_t
assemble_init(bus_t *b, uint16_t pc)
{
/* XXX: does brk needs special handling? */
return assemble_single(buf, bsize, mnemonic, IMPLIED, 0, 0);
assembler_t asmblr;
asmblr.bus = b;
asmblr.pc = pc;
return asmblr;
}
bool
assemble_single(assembler_t *a, const char *mnemonic, addressing_t mode, uint8_t op1, uint8_t op2)
{
uint8_t *asmbuf;
uint8_t bsize;
bool rv;
rv = assemble_single_buf(&asmbuf, &bsize, mnemonic, mode, op1, op2);
if (rv == false)
return rv;
rv = bus_load_buf(a->bus, a->pc, asmbuf, bsize);
free(asmbuf);
a->pc += bsize;
return rv;
}
bool
assemble_single_buf_implied(uint8_t **buf, uint8_t *bsize, const char *mnemonic)
{
return assemble_single_buf(buf, bsize, mnemonic, IMPLIED, 0, 0);
}
bool
assemble_single(uint8_t **buf, uint8_t *bsize, const char *mnemonic, addressing_t mode, uint8_t op1, uint8_t op2)
assemble_single_buf(uint8_t **buf, uint8_t *bsize, const char *mnemonic, addressing_t mode, uint8_t op1, uint8_t op2)
{
instrdef_t id;
uint8_t opcode;

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@ -41,6 +41,13 @@ struct instrdef {
typedef struct instrdef instrdef_t;
struct assembler {
bus_t *bus;
uint16_t pc;
};
typedef struct assembler assembler_t;
instruction_t instruction_fetch(bus_t *, uint16_t);
instrdef_t instruction_decode(uint8_t);
void instruction_print(instruction_t *);
@ -55,7 +62,9 @@ void program_counter_increment(rk65c02emu_t *, instrdef_t *);
bool instruction_modify_pc(instrdef_t *);
void program_counter_branch(rk65c02emu_t *, int8_t);
bool assemble_single_implied(uint8_t **, uint8_t *, const char *);
bool assemble_single(uint8_t **, uint8_t *, const char *, addressing_t, uint8_t, uint8_t);
bool assemble_single_buf_implied(uint8_t **, uint8_t *, const char *);
bool assemble_single_buf(uint8_t **, uint8_t *, const char *, addressing_t, uint8_t, uint8_t);
assembler_t assemble_init(bus_t *b, uint16_t pc);
#endif /* _INSTRUCTION_H_ */

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@ -10,8 +10,8 @@
#include "instruction.h"
#include "utils.h"
ATF_TC_WITHOUT_HEAD(asm_single);
ATF_TC_BODY(asm_single, tc)
ATF_TC_WITHOUT_HEAD(assemble_single_buf);
ATF_TC_BODY(assemble_single_buf, tc)
{
rk65c02emu_t e;
bus_t b;
@ -25,20 +25,20 @@ ATF_TC_BODY(asm_single, tc)
caddr = ROM_LOAD_ADDR;
e.regs.PC = ROM_LOAD_ADDR;
ATF_REQUIRE(assemble_single_implied(&asmbuf, &bsize, "nop"));
ATF_REQUIRE(assemble_single_buf_implied(&asmbuf, &bsize, "nop"));
ATF_CHECK(asmbuf[0] == 0xEA); /* check if nop really */
ATF_REQUIRE(bus_load_buf(&b, caddr, asmbuf, bsize));
free(asmbuf);
caddr += bsize;
ATF_REQUIRE(assemble_single(&asmbuf, &bsize, "lda", IMMEDIATE, 0xAA, 0));
ATF_REQUIRE(assemble_single_buf(&asmbuf, &bsize, "lda", IMMEDIATE, 0xAA, 0));
ATF_CHECK(asmbuf[0] == 0xA9); /* check if lda really */
ATF_CHECK(asmbuf[1] == 0xAA); /* check the operand */
ATF_REQUIRE(bus_load_buf(&b, caddr, asmbuf, bsize));
free(asmbuf);
caddr += bsize;
ATF_REQUIRE(assemble_single_implied(&asmbuf, &bsize, "stp"));
ATF_REQUIRE(assemble_single_buf_implied(&asmbuf, &bsize, "stp"));
ATF_CHECK(asmbuf[0] == 0xDB); /* check if stp really */
ATF_REQUIRE(bus_load_buf(&b, caddr, asmbuf, bsize));
free(asmbuf);
@ -47,9 +47,32 @@ ATF_TC_BODY(asm_single, tc)
rk65c02_start(&e);
}
ATF_TC_WITHOUT_HEAD(assemble_single);
ATF_TC_BODY(assemble_single, tc)
{
rk65c02emu_t e;
bus_t b;
assembler_t a;
b = bus_init();
a = assemble_init(&b, ROM_LOAD_ADDR);
e = rk65c02_init(&b);
e.regs.PC = ROM_LOAD_ADDR;
ATF_REQUIRE(assemble_single(&a, "nop", IMPLIED, 0, 0));
ATF_REQUIRE(assemble_single(&a, "stp", IMPLIED, 0, 0));
ATF_CHECK(bus_read_1(&b, ROM_LOAD_ADDR) == 0xEA);
ATF_CHECK(bus_read_1(&b, ROM_LOAD_ADDR + 1) == 0xDB);
rk65c02_start(&e);
}
ATF_TP_ADD_TCS(tp)
{
ATF_TP_ADD_TC(tp, asm_single);
ATF_TP_ADD_TC(tp, assemble_single_buf);
ATF_TP_ADD_TC(tp, assemble_single);
return (atf_no_error());
}

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@ -79,17 +79,17 @@ ATF_TC_BODY(intr_rti, tc)
israsmpc = ISR_ADDR;
ATF_REQUIRE(assemble_single_implied(&asmbuf, &bsize, "nop"));
ATF_REQUIRE(assemble_single_buf_implied(&asmbuf, &bsize, "nop"));
ATF_REQUIRE(bus_load_buf(&b, israsmpc, asmbuf, bsize));
free(asmbuf);
israsmpc += bsize;
ATF_REQUIRE(assemble_single_implied(&asmbuf, &bsize, "rti"));
ATF_REQUIRE(assemble_single_buf_implied(&asmbuf, &bsize, "rti"));
ATF_REQUIRE(bus_load_buf(&b, israsmpc, asmbuf, bsize));
free(asmbuf);
israsmpc += bsize;
ATF_REQUIRE(assemble_single_implied(&asmbuf, &bsize, "nop"));
ATF_REQUIRE(assemble_single_buf_implied(&asmbuf, &bsize, "nop"));
ATF_REQUIRE(bus_load_buf(&b, ROM_LOAD_ADDR, asmbuf, bsize));
free(asmbuf);