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rk65c02
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Implement CLC, SEC and test for them.

This commit is contained in:
Radosław Kujawa 2017-01-22 13:50:04 +01:00
parent 473e0e2636
commit 52247f0ce4
6 changed files with 44 additions and 2 deletions
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4
src/65c02isa.csv
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@ -23,7 +23,7 @@ OP_TRB_ZP,"trb",ZP,2,NULL
OP_ORA_ZPX,"ora",ZPX,2,NULL
OP_ASL_ZPX,"asl",ZPX,2,NULL
OP_RMB1_ZP,"rmb1",ZP,1,NULL
OP_CLC,"clc",IMPLIED,1,NULL
OP_CLC,"clc",IMPLIED,1,emul_clc
OP_ORA_ABSY,"ora",ABSOLUTEY,3,NULL
OP_INC,"inc",IMPLIED,1,NULL
OP_NOPI_1C,"nop",IMPLIED,1,NULL
@ -55,7 +55,7 @@ OP_BIT_ZPX,"bit",ZPX,2,NULL
OP_AND_ZPX,"and",ZPX,2,NULL
OP_ROL_ZPX,"rol",ZPX,2,NULL
OP_RMB3_ZP,"rmb3",ZP,2,NULL
OP_SEC,"sec",IMPLIED,1,NULL
OP_SEC,"sec",IMPLIED,1,emul_sec
OP_AND_ABSY,"and",ABSOLUTEY,3,NULL
OP_DEC,"dec",ACCUMULATOR,1,NULL
OP_NOPI_3C,"nop",IMPLIED,1,NULL

1 opcode_id mnemonic addressing size emulation
23 OP_ORA_ZPX ora ZPX 2 NULL
24 OP_ASL_ZPX asl ZPX 2 NULL
25 OP_RMB1_ZP rmb1 ZP 1 NULL
26 OP_CLC clc IMPLIED 1 NULL emul_clc
27 OP_ORA_ABSY ora ABSOLUTEY 3 NULL
28 OP_INC inc IMPLIED 1 NULL
29 OP_NOPI_1C nop IMPLIED 1 NULL
55 OP_AND_ZPX and ZPX 2 NULL
56 OP_ROL_ZPX rol ZPX 2 NULL
57 OP_RMB3_ZP rmb3 ZP 2 NULL
58 OP_SEC sec IMPLIED 1 NULL emul_sec
59 OP_AND_ABSY and ABSOLUTEY 3 NULL
60 OP_DEC dec ACCUMULATOR 1 NULL
61 OP_NOPI_3C nop IMPLIED 1 NULL

14
src/emulation.c
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@ -15,6 +15,13 @@ emul_and(rk65c02emu_t *e, void *id, instruction_t *i)
instruction_status_adjust_negative(e, e->regs.A);
}
/* CLC - clear carry flag */
void
emul_clc(rk65c02emu_t *e, void *id, instruction_t *i)
{
e->regs.P &= ~P_CARRY;
}
/* INX - increment X */
void
emul_inx(rk65c02emu_t *e, void *id, instruction_t *i)
@ -68,6 +75,13 @@ emul_pla(rk65c02emu_t *e, void *id, instruction_t *i)
instruction_status_adjust_negative(e, e->regs.A);
}
/* SEC - set the carry flag */
void
emul_sec(rk65c02emu_t *e, void *id, instruction_t *i)
{
e->regs.P |= P_CARRY;
}
/* STP - stop the processor */
void
emul_stp(rk65c02emu_t *e, void *id, instruction_t *i)

1
test/Makefile
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@ -6,6 +6,7 @@ VASMFLAGS=-Fbin -c02
TESTS=test_bus test_emulation
TESTROMS=test_emulation_and_imm.rom \
test_emulation_clc.rom test_emulation_sec.rom \
test_emulation_inx.rom test_emulation_iny.rom \
test_emulation_pha.rom test_emulation_pla.rom \
test_emulation_nop.rom \

21
test/test_emulation.c
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@ -92,6 +92,26 @@ ATF_TC_BODY(emul_stz, tc)
bus_finish(&b);
}
ATF_TC_WITHOUT_HEAD(emul_clc_sec);
ATF_TC_BODY(emul_clc_sec, tc)
{
rk65c02emu_t e;
bus_t b;
b = bus_init();
e = rk65c02_init(&b);
/* SEC */
e.regs.P &= ~P_CARRY;
ATF_REQUIRE(rom_start(&e, "test_emulation_sec.rom"));
ATF_CHECK(e.regs.P & P_CARRY);
/* CLC */
ATF_REQUIRE(rom_start(&e, "test_emulation_clc.rom"));
ATF_CHECK(e.regs.P ^ P_CARRY);
bus_finish(&b);
}
ATF_TC_WITHOUT_HEAD(emul_and);
ATF_TC_BODY(emul_and, tc)
{
@ -179,6 +199,7 @@ ATF_TC_BODY(emul_stack, tc)
ATF_TP_ADD_TCS(tp)
{
ATF_TP_ADD_TC(tp, emul_and);
ATF_TP_ADD_TC(tp, emul_clc_sec);
ATF_TP_ADD_TC(tp, emul_inx_iny);
ATF_TP_ADD_TC(tp, emul_lda);
ATF_TP_ADD_TC(tp, emul_nop);

3
test/test_emulation_clc.s Normal file
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@ -0,0 +1,3 @@
start: clc
stp

3
test/test_emulation_sec.s Normal file
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@ -0,0 +1,3 @@
start: sec
stp