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https://github.com/rkujawa/rk65c02.git
synced 2024-11-15 16:06:38 +00:00
Implement CLC, SEC and test for them.
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parent
473e0e2636
commit
52247f0ce4
@ -23,7 +23,7 @@ OP_TRB_ZP,"trb",ZP,2,NULL
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OP_ORA_ZPX,"ora",ZPX,2,NULL
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OP_ASL_ZPX,"asl",ZPX,2,NULL
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OP_RMB1_ZP,"rmb1",ZP,1,NULL
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OP_CLC,"clc",IMPLIED,1,NULL
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OP_CLC,"clc",IMPLIED,1,emul_clc
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OP_ORA_ABSY,"ora",ABSOLUTEY,3,NULL
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OP_INC,"inc",IMPLIED,1,NULL
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OP_NOPI_1C,"nop",IMPLIED,1,NULL
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@ -55,7 +55,7 @@ OP_BIT_ZPX,"bit",ZPX,2,NULL
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OP_AND_ZPX,"and",ZPX,2,NULL
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OP_ROL_ZPX,"rol",ZPX,2,NULL
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OP_RMB3_ZP,"rmb3",ZP,2,NULL
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OP_SEC,"sec",IMPLIED,1,NULL
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OP_SEC,"sec",IMPLIED,1,emul_sec
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OP_AND_ABSY,"and",ABSOLUTEY,3,NULL
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OP_DEC,"dec",ACCUMULATOR,1,NULL
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OP_NOPI_3C,"nop",IMPLIED,1,NULL
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@ -15,6 +15,13 @@ emul_and(rk65c02emu_t *e, void *id, instruction_t *i)
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instruction_status_adjust_negative(e, e->regs.A);
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}
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/* CLC - clear carry flag */
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void
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emul_clc(rk65c02emu_t *e, void *id, instruction_t *i)
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{
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e->regs.P &= ~P_CARRY;
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}
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/* INX - increment X */
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void
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emul_inx(rk65c02emu_t *e, void *id, instruction_t *i)
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@ -68,6 +75,13 @@ emul_pla(rk65c02emu_t *e, void *id, instruction_t *i)
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instruction_status_adjust_negative(e, e->regs.A);
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}
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/* SEC - set the carry flag */
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void
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emul_sec(rk65c02emu_t *e, void *id, instruction_t *i)
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{
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e->regs.P |= P_CARRY;
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}
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/* STP - stop the processor */
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void
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emul_stp(rk65c02emu_t *e, void *id, instruction_t *i)
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@ -6,6 +6,7 @@ VASMFLAGS=-Fbin -c02
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TESTS=test_bus test_emulation
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TESTROMS=test_emulation_and_imm.rom \
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test_emulation_clc.rom test_emulation_sec.rom \
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test_emulation_inx.rom test_emulation_iny.rom \
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test_emulation_pha.rom test_emulation_pla.rom \
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test_emulation_nop.rom \
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@ -92,6 +92,26 @@ ATF_TC_BODY(emul_stz, tc)
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bus_finish(&b);
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}
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ATF_TC_WITHOUT_HEAD(emul_clc_sec);
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ATF_TC_BODY(emul_clc_sec, tc)
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{
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rk65c02emu_t e;
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bus_t b;
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b = bus_init();
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e = rk65c02_init(&b);
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/* SEC */
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e.regs.P &= ~P_CARRY;
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ATF_REQUIRE(rom_start(&e, "test_emulation_sec.rom"));
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ATF_CHECK(e.regs.P & P_CARRY);
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/* CLC */
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ATF_REQUIRE(rom_start(&e, "test_emulation_clc.rom"));
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ATF_CHECK(e.regs.P ^ P_CARRY);
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bus_finish(&b);
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}
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ATF_TC_WITHOUT_HEAD(emul_and);
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ATF_TC_BODY(emul_and, tc)
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{
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@ -179,6 +199,7 @@ ATF_TC_BODY(emul_stack, tc)
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ATF_TP_ADD_TCS(tp)
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{
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ATF_TP_ADD_TC(tp, emul_and);
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ATF_TP_ADD_TC(tp, emul_clc_sec);
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ATF_TP_ADD_TC(tp, emul_inx_iny);
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ATF_TP_ADD_TC(tp, emul_lda);
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ATF_TP_ADD_TC(tp, emul_nop);
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3
test/test_emulation_clc.s
Normal file
3
test/test_emulation_clc.s
Normal file
@ -0,0 +1,3 @@
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start: clc
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stp
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3
test/test_emulation_sec.s
Normal file
3
test/test_emulation_sec.s
Normal file
@ -0,0 +1,3 @@
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start: sec
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stp
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