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Author SHA1 Message Date
Radosław Kujawa
5eede9333b Add emulation of PHP, PLP instructions and test cases for them. 2017-01-22 23:01:24 +01:00
Radosław Kujawa
074ecdccc3 No-operand INC has accumulator addressing mode, not implied. 2017-01-22 22:44:08 +01:00
Radosław Kujawa
1460817230 Correct mnemonic for LDX with Zero Page,Y addressing. 2017-01-22 22:40:32 +01:00
Radosław Kujawa
fb7d4b28e7 Add DEX, DEY emulation and test cases for them. 2017-01-22 22:35:50 +01:00
Radosław Kujawa
52247f0ce4 Implement CLC, SEC and test for them. 2017-01-22 13:50:04 +01:00
Radosław Kujawa
473e0e2636 Add INX, INY emulation and test cases. 
Some comments while here.
 2017-01-22 13:07:21 +01:00
Radosław Kujawa
e763ca0d3a Avoid getting instruction definition again when emulating. 
While here try to make program counter incrementation more universal
and flexible.
 2017-01-22 11:07:19 +01:00
Radosław Kujawa
c7633feb87 Add STZ emulation. 2017-01-21 21:46:35 +01:00
Radosław Kujawa
86c9c6414c Add function to write data onto bus according to choosen addressing mode. 2017-01-21 21:43:31 +01:00
Radosław Kujawa
8abbb88d0d Fix dependencies for static lib building. 2017-01-21 21:41:19 +01:00
Radosław Kujawa
2c7e67d69d Ignore headers generated during build and ROMs. 2017-01-21 16:03:31 +01:00
Radosław Kujawa
b6ed8892bb Add generation of emulation.h to Makefile. 2017-01-21 14:58:00 +01:00
Radosław Kujawa
1802bfbd1d Add missing includes, fix typo. 2017-01-21 14:57:49 +01:00
Radosław Kujawa
e3abea91ef Add awk script to automatically generate emulation.h from CSV. 2017-01-21 14:52:38 +01:00
Radosław Kujawa
0d5916eb7d Gotta generate header for emulation functions from CSV. 2017-01-21 12:08:00 +01:00
Radosław Kujawa
5ca671aecb Print value of PC register when unimplemented opcode encountered. 2017-01-21 09:13:43 +01:00
Radosław Kujawa
1820418c62 Adjust C header generation to take CSV header into account. 2017-01-20 23:23:25 +01:00
Radosław Kujawa
d2dc51cbd3 Add a header. Now looks nicer on GitHub! 2017-01-20 23:23:04 +01:00
Radosław Kujawa
07e1a008d9 Add preliminary stack tests, test ROMs for PLA, PHA. 2017-01-20 23:18:25 +01:00
Radosław Kujawa
51de051e19 Stop on unimplemented instruction. 2017-01-20 23:18:00 +01:00
Radosław Kujawa
2adf864f4f Debugging symbols by default. 2017-01-20 23:17:35 +01:00
Radosław Kujawa
c083114c12 Increment stack pointer before poping. 2017-01-20 23:16:02 +01:00
Radosław Kujawa
86e00e651d Make this actually compile. 2017-01-20 22:38:46 +01:00
Radosław Kujawa
0dc7dac6a3 Add PLA, PHA emulation. 2017-01-20 22:26:13 +01:00
Radosław Kujawa
657fb0cad2 Use rom_start() for NOP test. 2017-01-20 22:24:08 +01:00
Radosław Kujawa
172b2e3f6f Add test case for immediate AND. 2017-01-20 22:04:33 +01:00
Radosław Kujawa
7862703c88 Add functions to pop/push emulated CPU stack. 2017-01-20 22:03:03 +01:00
Radosław Kujawa
a50da41388 Implement AND emulation and test. 2017-01-20 10:41:56 +01:00
Radosław Kujawa
3bcc7bb096 Introduce instruction-independent status adjustment functions. 
For now only for negative and zero. Also use them in LDA emulation.
 2017-01-20 10:25:19 +01:00
Radosław Kujawa
5201cfdc87 Print operand hex vals during disassembly. 2017-01-20 09:46:33 +01:00
Radosław Kujawa
14233cf3ca Implement status flags for LDA emulation. 2017-01-20 09:11:34 +01:00
Radosław Kujawa
bcedb50e48 Clean up. 2017-01-20 09:11:22 +01:00
Radosław Kujawa
b498da3ac8 Add CLI skeleton. 2017-01-19 23:49:27 +01:00
Radosław Kujawa
f42f88c148 Add status register bits. 2017-01-19 14:06:19 +01:00
Radosław Kujawa
8d3f7266fb LDA emulation tests. 2017-01-19 11:50:11 +01:00
Radosław Kujawa
6b7ddbf865 LDA zero page emulation and test for it. 2017-01-19 11:49:05 +01:00
Radosław Kujawa
49b70f0e1f Make instruction data read more flexible and split from emulation of particular instruction. 2017-01-19 10:59:35 +01:00
Radosław Kujawa
87cafb607f Support loading ROMs from files, adjust nop test case. 2017-01-19 00:57:09 +01:00
Radosław Kujawa
abc209df99 Add emulation tests. 2017-01-19 00:21:00 +01:00
Radosław Kujawa
e7380477a9 Remove debug printfs. 2017-01-19 00:20:53 +01:00
Radosław Kujawa
73e4be2acc Add support for building test case ROMs with vasm. 
While here add first such ROM, for nop instruction test.
 2017-01-18 23:47:55 +01:00
Radosław Kujawa
92914d4aa0 Experiment with emulating opcode requring operands. 
Immediate lda now works.
 2017-01-18 22:37:00 +01:00
Radosław Kujawa
e7e30292d5 Fix incorrect instruction sizes. 2017-01-18 22:11:13 +01:00
Radosław Kujawa
380b524a51 Assign a separate identifier for all invalid nops. 2017-01-18 22:05:50 +01:00
Radosław Kujawa
52ce9bff8c Preliminary support for emulation of instructions. 
Some refactoring while here.
 2017-01-18 17:18:19 +01:00
Radosław Kujawa
f106e227cd Prepare structures for adding emulation of instructions. 2017-01-18 15:45:28 +01:00
Radosław Kujawa
d6876b38a1 Write down all 65C02 instructions. 2017-01-18 14:37:44 +01:00
Radosław Kujawa
3032baeac4 Temporarily disable assert checking if instr was implemented. 2017-01-18 14:37:24 +01:00
Radosław Kujawa
bd0eeea144 Adjust build process and instruction-related funcs. 
Due to new dynamically build 65c02isa.h header.
 2017-01-18 12:09:14 +01:00
Radosław Kujawa
611f51201f Generate instruction set from CSV file and awk script. 2017-01-18 12:08:55 +01:00