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Author SHA1 Message Date
Radosław Kujawa
05cedfb1f5 Also print program counter when dumping regs. 2017-01-27 22:28:09 +01:00
Radosław Kujawa
9da9f61f5a There's one more field in that generated header. Adjust. 2017-01-27 22:27:30 +01:00
Radosław Kujawa
2430cfd722 Branch and jump instrucitons need special PC treatment. 2017-01-27 20:43:08 +01:00
Radosław Kujawa
9294891a23 Remove unused variable. 2017-01-27 20:43:02 +01:00
Radosław Kujawa
28a5d54510 Add ASL and LSR emulation. 2017-01-27 17:14:56 +01:00
Radosław Kujawa
f63c00b192 Add RMB emulation. 2017-01-27 13:18:02 +01:00
Radosław Kujawa
9122615df4 Split function determining full path to ROM. 
Adjust bus tests to this change.
 2017-01-27 12:32:12 +01:00
Radosław Kujawa
ca291b0336 IRQ disable flag is present by default after CPU boot. 2017-01-27 12:31:20 +01:00
Radosław Kujawa
c1a63b011f Use srcdir config variable to obtain location of ROM files. 
This fixes "kyua test".
 2017-01-27 12:12:00 +01:00
Radosław Kujawa
1f3b61bec8 Implement test cases for DEC instruction. 2017-01-27 11:43:15 +01:00
Radosław Kujawa
db75a9becc Add test cases for INC instruction. 2017-01-27 11:29:17 +01:00
Radosław Kujawa
1f581d3fd3 Add function to dump registers state onto stdout. 2017-01-27 11:27:14 +01:00
Radosław Kujawa
646c7d1905 Some opcodes also write data to accumulator. 2017-01-27 11:03:50 +01:00
Radosław Kujawa
8d5482ad09 Remove x bit from the awk program, it is never started directly. 2017-01-27 10:14:32 +01:00
Radosław Kujawa
0c63342ad7 Add comments explaing what these functions do. 2017-01-27 10:13:32 +01:00
Radosław Kujawa
b7f1b8095b Add emulation of INC and DEC. 2017-01-27 00:04:47 +01:00
Radosław Kujawa
699d791023 Fix wrong object name. 2017-01-26 23:28:04 +01:00
Radosław Kujawa
ea95e3d02c Fix pointer mess. 2017-01-26 23:27:54 +01:00
Radosław Kujawa
8ede93fb0e Merge branch 'master' of github.com:rkujawa/rk65c02 2017-01-26 23:22:56 +01:00
Radosław Kujawa
bfb042cd1a Add test for stepping mode. 2017-01-26 23:22:40 +01:00
Radosław Kujawa
0e784db076 Don't forget to link with utils. 2017-01-26 21:37:54 +01:00
Radosław Kujawa
1da576c821 Merge branch 'master' of github.com:rkujawa/rk65c02 2017-01-26 17:27:22 +01:00
Radosław Kujawa
2ec6cb67ae Split ROM starting function into separate file. 
It will also be used for other test programs than test_emulation.
 2017-01-26 13:11:37 +01:00
Radosław Kujawa
80b6848108 Preliminary support for stepping. 2017-01-26 13:11:00 +01:00
Radosław Kujawa
941e89173a Add struct with info about reason for stopping emulation. 2017-01-26 12:52:40 +01:00
Radosław Kujawa
285d2ee828 Initial state of the CPU has IRQ disable bit set. 2017-01-25 21:17:18 +01:00
Radosław Kujawa
13ef3e2d08 Add PHX, PLX, PHY, PLY emulation and test cases. 2017-01-25 13:14:00 +01:00
Radosław Kujawa
acc0fad32e Add emulation of BIT instruction and test cases for it. 2017-01-25 10:10:00 +01:00
Radosław Kujawa
7915657355 Add bit testing macro. 2017-01-25 10:09:50 +01:00
Radosław Kujawa
95db0b7dd2 Add commented out debug message. 2017-01-25 10:09:38 +01:00
Radosław Kujawa
a570afb007 Add STA test cases for all addressing modes. 2017-01-24 22:18:52 +01:00
Radosław Kujawa
47028b0e26 Add commented out debug message. 2017-01-24 22:18:21 +01:00
Radosław Kujawa
90b6c06e32 Fix missing breaks in indirect zero page handling switch. 2017-01-24 22:18:02 +01:00
Radosław Kujawa
3a4a0a06d3 Add ORA tests, for all addressing modes. 2017-01-24 16:37:55 +01:00
Radosław Kujawa
39aaca5034 Correct indirect zero page Y behaviour. 2017-01-24 16:37:10 +01:00
Radosław Kujawa
20a39a8d6c Correct wrong ORA indirect zero page X size. 2017-01-24 16:36:39 +01:00
Radosław Kujawa
b047c4ff81 Add test cases for TAX, TAY, TXA, TYA. 2017-01-24 12:55:46 +01:00
Radosław Kujawa
cddba4c56b Don't hardcode ROM names in Makefile. 
There's too many of them now, so the names are constructed from the
list of assembly files, automatically.
 2017-01-24 12:36:27 +01:00
Radosław Kujawa
09f0a828e3 Add test cases for LDA addressing modes absolute X, absolute Y. 2017-01-23 16:33:03 +01:00
Radosław Kujawa
342a188314 Fix wrong mnemonic for absolute ORA. 2017-01-23 15:39:10 +01:00
Radosław Kujawa
6c3a203cdc Support all AND addressing modes. 2017-01-23 15:28:14 +01:00
Radosław Kujawa
0dd63f2bf0 Add ROL and ROR emulation. Too old to ror and to rol! 2017-01-23 15:25:32 +01:00
Radosław Kujawa
f9708ca049 Add STA, STY, STX emulation. 2017-01-23 15:02:21 +01:00
Radosław Kujawa
ee8a16a5ba Add ORA and EOR emulation. 2017-01-23 14:53:05 +01:00
Radosław Kujawa
6b7298cf8d Avoid intermediate variable in AND emulation. 2017-01-23 14:45:46 +01:00
Radosław Kujawa
aee947ad1f Don't forget to add LDY to CSV... 2017-01-23 14:44:55 +01:00
Radosław Kujawa
552fad8a7e LDY emulation. 2017-01-23 14:43:54 +01:00
Radosław Kujawa
5c38e5f05a Add emulation of LDX, TXA, TYA, TXS, TAX, TAY, TSX. 2017-01-23 14:38:50 +01:00
Radosław Kujawa
3b2080403b Ignore .DS_Store 2017-01-23 13:47:22 +01:00
Radosław Kujawa
ce492e6cd3 Support all addressing variants of STZ. 2017-01-23 13:46:17 +01:00