Radoslaw Kujawa
6ccb94ac46
Update copyright year.
2021-01-25 01:09:01 +01:00
Radosław Kujawa
b3e49fdb24
Add preambles with license information.
2019-09-23 15:28:05 +02:00
Radosław Kujawa
2cc9d86c64
Simplify error handling if malloc fails.
...
There's no way to reliable handle out of memory situation in an
emulator. So just bail out by raising assertion.
2018-08-05 23:45:44 +02:00
Radosław Kujawa
dc1e2bf829
Refactoring to support (future) string asm.
2018-06-25 14:05:47 +02:00
Radosław Kujawa
1ec075518c
Split assembler-related things into separate file.
2018-04-27 14:07:42 +02:00
Radosław Kujawa
b7986df553
Split address calculation into separate function.
...
This removes some code duplication for instruction_data_read/write
functions. Also this way implementing watchpoints will be far easier.
2018-04-27 10:34:48 +02:00
Radosław Kujawa
4ff3f390db
Fix assembling opcode 0xFF (BBS7).
2018-04-16 12:26:52 +02:00
Radosław Kujawa
7cf3f263e3
Simplify handling ciritcal emulation errors.
2018-04-01 21:40:49 +02:00
Radosław Kujawa
3c684fbf2c
Fix zero page wrap for indexed indirect mode.
2018-03-31 15:03:22 +02:00
Radosław Kujawa
7c4d6cea3f
Fix indirect indexed with Y addressing.
...
Also fix test case for this. Problem wasn't detected, because test case
was broken too.
2018-03-31 12:38:45 +02:00
Radosław Kujawa
4f299a6f36
Also fix zero page wrap for bus reads.
2018-03-28 14:18:50 +02:00
Radosław Kujawa
260ac09c01
Emulate zero page wrap for zp,x addressing.
2018-03-28 13:46:06 +02:00
Radosław Kujawa
ae3e782b74
Use boehm gc to manage memory.
...
I'm less likely to fuck this up now.
2018-03-26 12:36:47 +02:00
Radosław Kujawa
5fddf2c5dc
More refactoring and improvements to logging!
2018-03-23 13:37:07 +01:00
Radosław Kujawa
5cb6f3488e
Further improvements and refactoring to logging.
2018-03-22 15:08:51 +01:00
Radosław Kujawa
8de5574aab
Handle accessing bus in zero page relative mode just as in zero page.
...
It should make things less awkward and still work fine, as the only
instructions using this mode are BBS and BBR. These only use first
operand as the address in zero page to read data from.
2017-02-13 18:37:14 +01:00
Radosław Kujawa
0cbbce4eeb
Fix operands fetching for zero page relative addressing.
2017-02-13 09:37:11 +01:00
Radosław Kujawa
8f4900a877
Add simplified assemble_single_implied for implied addressing mode.
2017-02-12 21:54:07 +01:00
Radosław Kujawa
0bd7b85dea
Implement simpler to use assembly mode, straight to bus.
...
While here refactor existing assembly functions.
2017-02-12 16:47:06 +01:00
Radosław Kujawa
1f8db85688
Fix pointer precedence. Should resolve #1 .
2017-02-02 20:58:30 +01:00
Radosław Kujawa
77ce27e4fc
Try to support assembling multi byte instructions.
2017-02-02 15:41:29 +01:00
Radosław Kujawa
9eff6d535b
Add functions to assemble mnemonics into machine code (into buffer).
2017-02-02 14:45:06 +01:00
Radosław Kujawa
249509fad0
Clean up unused function.
2017-02-02 11:00:32 +01:00
Radosław Kujawa
1c72bd23a8
More meaningful comments.
2017-01-30 21:24:45 +01:00
Radosław Kujawa
e0fa334e3e
Fix relative address pritning in disassembly.
2017-01-29 13:55:53 +01:00
Radosław Kujawa
f5a4f45127
Add function setting the PC for branches.
2017-01-29 13:29:17 +01:00
Radosław Kujawa
762f140efd
Better operand formatting in disassembly.
2017-01-29 13:08:32 +01:00
Radosław Kujawa
3640a162a3
Add CMP emulation and test cases.
2017-01-28 13:26:51 +01:00
Radosław Kujawa
2430cfd722
Branch and jump instrucitons need special PC treatment.
2017-01-27 20:43:08 +01:00
Radosław Kujawa
646c7d1905
Some opcodes also write data to accumulator.
2017-01-27 11:03:50 +01:00
Radosław Kujawa
90b6c06e32
Fix missing breaks in indirect zero page handling switch.
2017-01-24 22:18:02 +01:00
Radosław Kujawa
39aaca5034
Correct indirect zero page Y behaviour.
2017-01-24 16:37:10 +01:00
Radosław Kujawa
9c88afae2a
BBRx and BBSx instructions have zero page relative addressing.
...
Add zero page relative as a separate addressing type and adjust
opcode definitions for these two type of opcodes.
2017-01-23 12:17:06 +01:00
Radosław Kujawa
ee16c64310
Implement absolute X, absolute Y addressing.
2017-01-23 10:48:37 +01:00
Radosław Kujawa
452e4b3806
Implement indirect zero page with X and indirect zero page with Y addressing.
2017-01-23 10:29:19 +01:00
Radosław Kujawa
87c424557e
Implement aboslute addressing mode.
2017-01-23 00:00:45 +01:00
Radosław Kujawa
e763ca0d3a
Avoid getting instruction definition again when emulating.
...
While here try to make program counter incrementation more universal
and flexible.
2017-01-22 11:07:19 +01:00
Radosław Kujawa
86c9c6414c
Add function to write data onto bus according to choosen addressing mode.
2017-01-21 21:43:31 +01:00
Radosław Kujawa
c083114c12
Increment stack pointer before poping.
2017-01-20 23:16:02 +01:00
Radosław Kujawa
7862703c88
Add functions to pop/push emulated CPU stack.
2017-01-20 22:03:03 +01:00
Radosław Kujawa
3bcc7bb096
Introduce instruction-independent status adjustment functions.
...
For now only for negative and zero. Also use them in LDA emulation.
2017-01-20 10:25:19 +01:00
Radosław Kujawa
5201cfdc87
Print operand hex vals during disassembly.
2017-01-20 09:46:33 +01:00
Radosław Kujawa
6b7ddbf865
LDA zero page emulation and test for it.
2017-01-19 11:49:05 +01:00
Radosław Kujawa
49b70f0e1f
Make instruction data read more flexible and split from emulation of particular instruction.
2017-01-19 10:59:35 +01:00
Radosław Kujawa
52ce9bff8c
Preliminary support for emulation of instructions.
...
Some refactoring while here.
2017-01-18 17:18:19 +01:00
Radosław Kujawa
3032baeac4
Temporarily disable assert checking if instr was implemented.
2017-01-18 14:37:24 +01:00
Radosław Kujawa
bd0eeea144
Adjust build process and instruction-related funcs.
...
Due to new dynamically build 65c02isa.h header.
2017-01-18 12:09:14 +01:00
Radosław Kujawa
e36a9c34fb
Add accumulator addressing mode handling.
2017-01-18 11:12:37 +01:00
Radosław Kujawa
23802b176f
Instruction set definition is now private to 65c02isa.c, has API.
...
Minor refactoring while here, splitting stuff.
2017-01-17 14:29:20 +01:00
