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274 Commits 4 Branches 0 Tags 462 KiB
a2fdb78d2b
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56 Commits

Author SHA1 Message Date
Radosław Kujawa
a2fdb78d2b BBR and BBS instructions have 2 operands. 2018-04-16 12:14:31 +02:00
Radosław Kujawa
d0728c8ade Emulate invalid instructions. 
Treat them as NOPs of different length just as real 65C02.
 2018-04-10 13:56:37 +02:00
Radosław Kujawa
7db9b2f7c6 RMB1 instruction is 2 byte long (opcode + one operand). 2017-02-13 21:54:10 +01:00
Radosław Kujawa
630daee702 Premilinary support for decimal mode. 
While here add SED emulation. Implement BCD support for ADC instruction.
 2017-02-10 22:23:06 +01:00
Radosław Kujawa
4c7a15f524 Add emulation of WAI instruction. 2017-02-09 21:53:45 +01:00
Radosław Kujawa
5cca703020 Add RTI emulation and test case. 2017-02-08 15:55:39 +01:00
Radosław Kujawa
eb7179f89a Fix emulation function for nop. 
Problem introduced by s/'ing mindlessly.
 2017-02-02 11:51:32 +01:00
Radosław Kujawa
4e3721ef85 Mark invalid instructions as invalid, not as nops. 2017-02-02 11:23:30 +01:00
Radosław Kujawa
92418b0f1f Add SBC emulation. 
Of dubious quality.
 2017-02-01 14:35:50 +01:00
Radosław Kujawa
faa824e306 Implement emulation of ADC, plug the overflow test. 
While here fix numerous test cases, lol.
 2017-01-31 23:08:23 +01:00
Radosław Kujawa
44f723b016 Attempt to emulate the BRK instruction. 2017-01-31 00:31:28 +01:00
Radosław Kujawa
bc137b9390 Add emulation of BBR0-7 and BBS0-7 instructions. 2017-01-30 21:25:45 +01:00
Radosław Kujawa
5554de9411 Add TSB and TRB emulation. 2017-01-29 22:54:06 +01:00
Radosław Kujawa
923a9db649 Add emulation of SMB0-SMB7 instructions. 2017-01-29 21:34:58 +01:00
Radosław Kujawa
3c5162b0b9 Add emulation of branch instructions. 2017-01-29 13:57:51 +01:00
Radosław Kujawa
bb3f77ec7f Add JSR and RTS emulation and tests. 2017-01-29 11:47:34 +01:00
Radosław Kujawa
4a8fbfbaeb Add CPX and CPY emulation and test cases. 2017-01-28 14:04:20 +01:00
Radosław Kujawa
3640a162a3 Add CMP emulation and test cases. 2017-01-28 13:26:51 +01:00
Radosław Kujawa
f3205e7272 Add CLI and SEI emulation and test case. 2017-01-28 11:19:34 +01:00
Radosław Kujawa
ee66f9c78c Add emulation and test for CLV instruction. 2017-01-28 11:12:25 +01:00
Radosław Kujawa
8d2d694158 Implement (partial) JMP emulation and basic test for it. 2017-01-27 22:28:33 +01:00
Radosław Kujawa
2430cfd722 Branch and jump instrucitons need special PC treatment. 2017-01-27 20:43:08 +01:00
Radosław Kujawa
28a5d54510 Add ASL and LSR emulation. 2017-01-27 17:14:56 +01:00
Radosław Kujawa
f63c00b192 Add RMB emulation. 2017-01-27 13:18:02 +01:00
Radosław Kujawa
b7f1b8095b Add emulation of INC and DEC. 2017-01-27 00:04:47 +01:00
Radosław Kujawa
13ef3e2d08 Add PHX, PLX, PHY, PLY emulation and test cases. 2017-01-25 13:14:00 +01:00
Radosław Kujawa
acc0fad32e Add emulation of BIT instruction and test cases for it. 2017-01-25 10:10:00 +01:00
Radosław Kujawa
20a39a8d6c Correct wrong ORA indirect zero page X size. 2017-01-24 16:36:39 +01:00
Radosław Kujawa
342a188314 Fix wrong mnemonic for absolute ORA. 2017-01-23 15:39:10 +01:00
Radosław Kujawa
6c3a203cdc Support all AND addressing modes. 2017-01-23 15:28:14 +01:00
Radosław Kujawa
0dd63f2bf0 Add ROL and ROR emulation. Too old to ror and to rol! 2017-01-23 15:25:32 +01:00
Radosław Kujawa
f9708ca049 Add STA, STY, STX emulation. 2017-01-23 15:02:21 +01:00
Radosław Kujawa
ee8a16a5ba Add ORA and EOR emulation. 2017-01-23 14:53:05 +01:00
Radosław Kujawa
aee947ad1f Don't forget to add LDY to CSV... 2017-01-23 14:44:55 +01:00
Radosław Kujawa
5c38e5f05a Add emulation of LDX, TXA, TYA, TXS, TAX, TAY, TSX. 2017-01-23 14:38:50 +01:00
Radosław Kujawa
ce492e6cd3 Support all addressing variants of STZ. 2017-01-23 13:46:17 +01:00
Radosław Kujawa
9c88afae2a BBRx and BBSx instructions have zero page relative addressing. 
Add zero page relative as a separate addressing type and adjust
opcode definitions for these two type of opcodes.
 2017-01-23 12:17:06 +01:00
Radosław Kujawa
9e32c3e493 Try to emulate all variants of LDA. 
But some addressing modes are still unimplemented...
 2017-01-23 10:27:51 +01:00
Radosław Kujawa
5eede9333b Add emulation of PHP, PLP instructions and test cases for them. 2017-01-22 23:01:24 +01:00
Radosław Kujawa
074ecdccc3 No-operand INC has accumulator addressing mode, not implied. 2017-01-22 22:44:08 +01:00
Radosław Kujawa
1460817230 Correct mnemonic for LDX with Zero Page,Y addressing. 2017-01-22 22:40:32 +01:00
Radosław Kujawa
fb7d4b28e7 Add DEX, DEY emulation and test cases for them. 2017-01-22 22:35:50 +01:00
Radosław Kujawa
52247f0ce4 Implement CLC, SEC and test for them. 2017-01-22 13:50:04 +01:00
Radosław Kujawa
473e0e2636 Add INX, INY emulation and test cases. 
Some comments while here.
 2017-01-22 13:07:21 +01:00
Radosław Kujawa
c7633feb87 Add STZ emulation. 2017-01-21 21:46:35 +01:00
Radosław Kujawa
d2dc51cbd3 Add a header. Now looks nicer on GitHub! 2017-01-20 23:23:04 +01:00
Radosław Kujawa
0dc7dac6a3 Add PLA, PHA emulation. 2017-01-20 22:26:13 +01:00
Radosław Kujawa
a50da41388 Implement AND emulation and test. 2017-01-20 10:41:56 +01:00
Radosław Kujawa
6b7ddbf865 LDA zero page emulation and test for it. 2017-01-19 11:49:05 +01:00
Radosław Kujawa
92914d4aa0 Experiment with emulating opcode requring operands. 
Immediate lda now works.
 2017-01-18 22:37:00 +01:00