Radosław Kujawa
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e0fa334e3e
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Fix relative address pritning in disassembly.
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2017-01-29 13:55:53 +01:00 |
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Radosław Kujawa
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f5a4f45127
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Add function setting the PC for branches.
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2017-01-29 13:29:17 +01:00 |
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Radosław Kujawa
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762f140efd
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Better operand formatting in disassembly.
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2017-01-29 13:08:32 +01:00 |
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Radosław Kujawa
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3640a162a3
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Add CMP emulation and test cases.
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2017-01-28 13:26:51 +01:00 |
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Radosław Kujawa
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2430cfd722
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Branch and jump instrucitons need special PC treatment.
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2017-01-27 20:43:08 +01:00 |
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Radosław Kujawa
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646c7d1905
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Some opcodes also write data to accumulator.
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2017-01-27 11:03:50 +01:00 |
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Radosław Kujawa
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90b6c06e32
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Fix missing breaks in indirect zero page handling switch.
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2017-01-24 22:18:02 +01:00 |
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Radosław Kujawa
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39aaca5034
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Correct indirect zero page Y behaviour.
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2017-01-24 16:37:10 +01:00 |
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Radosław Kujawa
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9c88afae2a
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BBRx and BBSx instructions have zero page relative addressing.
Add zero page relative as a separate addressing type and adjust
opcode definitions for these two type of opcodes.
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2017-01-23 12:17:06 +01:00 |
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Radosław Kujawa
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ee16c64310
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Implement absolute X, absolute Y addressing.
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2017-01-23 10:48:37 +01:00 |
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Radosław Kujawa
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452e4b3806
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Implement indirect zero page with X and indirect zero page with Y addressing.
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2017-01-23 10:29:19 +01:00 |
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Radosław Kujawa
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87c424557e
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Implement aboslute addressing mode.
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2017-01-23 00:00:45 +01:00 |
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Radosław Kujawa
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e763ca0d3a
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Avoid getting instruction definition again when emulating.
While here try to make program counter incrementation more universal
and flexible.
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2017-01-22 11:07:19 +01:00 |
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Radosław Kujawa
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86c9c6414c
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Add function to write data onto bus according to choosen addressing mode.
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2017-01-21 21:43:31 +01:00 |
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Radosław Kujawa
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c083114c12
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Increment stack pointer before poping.
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2017-01-20 23:16:02 +01:00 |
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Radosław Kujawa
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7862703c88
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Add functions to pop/push emulated CPU stack.
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2017-01-20 22:03:03 +01:00 |
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Radosław Kujawa
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3bcc7bb096
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Introduce instruction-independent status adjustment functions.
For now only for negative and zero. Also use them in LDA emulation.
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2017-01-20 10:25:19 +01:00 |
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Radosław Kujawa
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5201cfdc87
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Print operand hex vals during disassembly.
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2017-01-20 09:46:33 +01:00 |
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Radosław Kujawa
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6b7ddbf865
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LDA zero page emulation and test for it.
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2017-01-19 11:49:05 +01:00 |
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Radosław Kujawa
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49b70f0e1f
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Make instruction data read more flexible and split from emulation of particular instruction.
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2017-01-19 10:59:35 +01:00 |
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Radosław Kujawa
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52ce9bff8c
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Preliminary support for emulation of instructions.
Some refactoring while here.
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2017-01-18 17:18:19 +01:00 |
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Radosław Kujawa
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3032baeac4
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Temporarily disable assert checking if instr was implemented.
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2017-01-18 14:37:24 +01:00 |
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Radosław Kujawa
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bd0eeea144
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Adjust build process and instruction-related funcs.
Due to new dynamically build 65c02isa.h header.
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2017-01-18 12:09:14 +01:00 |
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Radosław Kujawa
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e36a9c34fb
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Add accumulator addressing mode handling.
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2017-01-18 11:12:37 +01:00 |
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Radosław Kujawa
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23802b176f
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Instruction set definition is now private to 65c02isa.c, has API.
Minor refactoring while here, splitting stuff.
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2017-01-17 14:29:20 +01:00 |
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