mirror of https://github.com/rkujawa/rk65c02.git
348 lines
7.3 KiB
C
348 lines
7.3 KiB
C
/*
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* SPDX-License-Identifier: GPL-3.0-only
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*
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* rk65c02
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* Copyright (C) 2017-2021 Radoslaw Kujawa
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, version 3 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <stdbool.h>
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#include <errno.h>
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#include <assert.h>
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#include <string.h>
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#include <gc/gc.h>
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#include "bus.h"
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#include "rk65c02.h"
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#include "65c02isa.h"
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#include "log.h"
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#include "instruction.h"
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instruction_t
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instruction_fetch(bus_t *b, uint16_t addr)
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{
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instruction_t i;
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instrdef_t id;
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i.opcode = bus_read_1(b, addr);
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id = instruction_decode(i.opcode);
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//assert(i.def.opcode != OP_UNIMPL);
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/* handle operands */
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switch (id.mode) {
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case IMMEDIATE:
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case ZP:
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case ZPX:
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case ZPY:
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case IZP:
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case IZPX:
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case IZPY:
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case RELATIVE:
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i.op1 = bus_read_1(b, addr+1);
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break;
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case ABSOLUTE:
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case ABSOLUTEX:
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case ABSOLUTEY:
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case IABSOLUTE:
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case IABSOLUTEX:
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case ZPR:
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i.op1 = bus_read_1(b, addr+1);
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i.op2 = bus_read_1(b, addr+2);
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break;
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case IMPLIED:
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default:
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break;
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}
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return i;
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}
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void
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instruction_print(instruction_t *i)
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{
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char *str;
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str = instruction_string_get(i);
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printf("%s", str);
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}
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char *
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instruction_string_get(instruction_t *i)
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{
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#define INSTR_STR_LEN 16
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instrdef_t id;
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char *str;
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str = GC_MALLOC(INSTR_STR_LEN);
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assert(str != NULL);
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memset(str, 0, INSTR_STR_LEN);
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id = instruction_decode(i->opcode);
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switch (id.mode) {
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case IMPLIED:
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snprintf(str, INSTR_STR_LEN, "%s", id.mnemonic);
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break;
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case ACCUMULATOR:
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snprintf(str, INSTR_STR_LEN, "%s A", id.mnemonic);
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break;
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case IMMEDIATE:
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snprintf(str, INSTR_STR_LEN, "%s #%#02x", id.mnemonic, i->op1);
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break;
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case ZP:
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snprintf(str, INSTR_STR_LEN, "%s %#02x", id.mnemonic, i->op1);
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break;
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case ZPX:
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snprintf(str, INSTR_STR_LEN, "%s %#02x,X", id.mnemonic, i->op1);
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break;
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case ZPY:
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snprintf(str, INSTR_STR_LEN, "%s %#02x,Y", id.mnemonic, i->op1);
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break;
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case IZP:
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snprintf(str, INSTR_STR_LEN, "%s (%#02x)", id.mnemonic, i->op1);
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break;
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case IZPX:
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snprintf(str, INSTR_STR_LEN, "%s (%#02x,X)", id.mnemonic, i->op1);
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break;
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case IZPY:
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snprintf(str, INSTR_STR_LEN, "%s (%#02x),Y", id.mnemonic, i->op1);
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break;
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case ZPR:
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snprintf(str, INSTR_STR_LEN, "%s %#02x,%#02x", id.mnemonic, i->op1, i->op2);
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break;
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case ABSOLUTE:
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snprintf(str, INSTR_STR_LEN, "%s %#02x%02x", id.mnemonic, i->op2, i->op1);
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break;
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case ABSOLUTEX:
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snprintf(str, INSTR_STR_LEN, "%s %#02x%02x,X", id.mnemonic, i->op2, i->op1);
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break;
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case ABSOLUTEY:
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snprintf(str, INSTR_STR_LEN, "%s %#02x%02x,Y", id.mnemonic, i->op2, i->op1);
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break;
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case IABSOLUTE:
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snprintf(str, INSTR_STR_LEN, "%s (%#02x%02x)", id.mnemonic, i->op2, i->op1);
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break;
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case IABSOLUTEX:
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snprintf(str, INSTR_STR_LEN, "%s (%#02x%02x,X)", id.mnemonic, i->op2, i->op1);
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break;
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case RELATIVE:
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snprintf(str, INSTR_STR_LEN, "%s %#02x", id.mnemonic, i->op1);
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break;
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}
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return str;
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}
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void
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disassemble(bus_t *b, uint16_t addr)
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{
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instruction_t i;
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instrdef_t id;
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i = instruction_fetch(b, addr);
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id = instruction_decode(i.opcode);
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printf("%X:\t", addr);
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instruction_print(&i);
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printf("\t\t// ");
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if (id.size == 1)
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printf("%X", id.opcode);
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else if (id.size == 2)
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printf("%X %X", id.opcode, i.op1);
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else if (id.size == 3)
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printf("%X %X %X", id.opcode, i.op1, i.op2);
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printf("\n");
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}
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instrdef_t
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instruction_decode(uint8_t opcode)
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{
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instrdef_t id;
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id = instrs[opcode];
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return id;
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}
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void
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instruction_status_adjust_zero(rk65c02emu_t *e, uint8_t regval)
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{
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if (regval == 0)
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e->regs.P |= P_ZERO;
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else
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e->regs.P &= ~P_ZERO;
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}
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void
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instruction_status_adjust_negative(rk65c02emu_t *e, uint8_t regval)
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{
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if (regval & NEGATIVE)
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e->regs.P |= P_NEGATIVE;
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else
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e->regs.P &= ~P_NEGATIVE;
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}
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void
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instruction_data_write_1(rk65c02emu_t *e, instrdef_t *id, instruction_t *i, uint8_t val)
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{
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if (id->mode == ACCUMULATOR) {
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e->regs.A = val;
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return;
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}
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if (id->mode == IMMEDIATE) {
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rk65c02_panic(e,
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"invalid IMMEDIATE addressing mode for opcode %x\n",
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i->opcode);
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return;
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}
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bus_write_1(e->bus, instruction_data_address(e, id, i), val);
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}
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uint8_t
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instruction_data_read_1(rk65c02emu_t *e, instrdef_t *id, instruction_t *i)
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{
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if (id->mode == ACCUMULATOR)
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return e->regs.A;
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else if (id->mode == IMMEDIATE)
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return i->op1;
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return bus_read_1(e->bus, instruction_data_address(e, id, i));
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}
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uint16_t
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instruction_data_address(rk65c02emu_t *e, instrdef_t *id, instruction_t *i)
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{
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uint16_t addr;
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addr = 0;
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switch (id->mode) {
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case ZP:
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case ZPR:
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addr = i->op1;
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break;
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case ZPX:
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addr = ((uint8_t) (i->op1 + e->regs.X));
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break;
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case ZPY:
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addr = i->op1 + e->regs.Y;
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break;
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case IZP:
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addr = bus_read_1(e->bus, i->op1);
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addr |= (bus_read_1(e->bus, i->op1 + 1) << 8);
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break;
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case IZPX: /* Zero Page Indexed Indirect with X */
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addr = bus_read_1(e->bus, (uint8_t) (i->op1 + e->regs.X));
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addr |= (bus_read_1(e->bus, (uint8_t) (i->op1 + e->regs.X + 1)) << 8);
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break;
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case IZPY: /* Zero Page Indirect Indexed with Y */
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addr = bus_read_1(e->bus, i->op1);
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addr |= (bus_read_1(e->bus, i->op1 + 1) << 8);
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addr += e->regs.Y;
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break;
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case ABSOLUTE:
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addr = i->op1 + (i->op2 << 8);
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break;
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case ABSOLUTEX:
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addr = i->op1 + (i->op2 << 8) + e->regs.X;
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break;
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case ABSOLUTEY:
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addr = i->op1 + (i->op2 << 8) + e->regs.Y;
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break;
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case IABSOLUTE:
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case IABSOLUTEX:
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case RELATIVE:
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/*
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* IABSOLUTE, IABSOLUTEX, RELATIVE are only for branches
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* and jumps. They do not read or write anything, only modify
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* PC which is handled within emulation of a given opcode.
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*/
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default:
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rk65c02_panic(e, "unhandled addressing mode for opcode %x\n",
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i->opcode);
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break;
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}
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return addr;
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}
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/* put value onto the stack */
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void
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stack_push(rk65c02emu_t *e, uint8_t val)
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{
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bus_write_1(e->bus, STACK_START+e->regs.SP, val);
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e->regs.SP--;
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}
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/* pull/pop value from the stack */
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uint8_t
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stack_pop(rk65c02emu_t *e)
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{
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uint8_t val;
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e->regs.SP++;
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val = bus_read_1(e->bus, STACK_START+e->regs.SP);
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return val;
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}
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/* increment program counter based on instruction size (opcode + operands) */
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void
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program_counter_increment(rk65c02emu_t *e, instrdef_t *id)
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{
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e->regs.PC += id->size;
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}
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void
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program_counter_branch(rk65c02emu_t *e, int8_t boffset)
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{
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e->regs.PC += boffset + 2;
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}
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/* check whether given instruction modify program counter */
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bool
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instruction_modify_pc(instrdef_t *id)
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{
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return id->modify_pc;
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}
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/* find instr definition (and opcode) searching by mnemonic and addr mode */
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bool
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instruction_opcode_by_mnemonic(char *mnemonic, addressing_t mode, uint8_t *opcode, instrdef_t *id)
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{
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bool found;
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found = false;
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while ((*opcode) <= 0xFF) { /* this is stupid */
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*id = instruction_decode(*opcode);
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if ((strcmp(mnemonic, id->mnemonic) == 0) && (id->mode == mode)) {
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found = true;
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break;
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}
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(*opcode)++;
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}
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return found;
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}
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