mirror of https://github.com/rkujawa/rk65c02.git
106 lines
3.3 KiB
ArmAsm
106 lines
3.3 KiB
ArmAsm
; stolen from: http://www.6502.org/tutorials/vflag.html
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; adapted to vasm and std syntax by rkujawa
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;
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; Demonstrate that the V flag works as described
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;
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; Returns with ERROR = 0 if the test passes, ERROR = 1 if the test fails
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;
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; Five (additional) memory locations are used: ERROR, S1, S2, U1, and U2
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; which can be located anywhere convenient in RAM
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;
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.org 0xC000
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.set S1, 0x10
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.set S2, 0x11
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.set U1, 0x12
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.set U2, 0x13
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.set ERROR, 0x20
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TEST: cld ; Clear decimal mode (just in case) for test
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lda #1
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sta ERROR ; Store 1 in ERROR until test passes
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lda #0x80
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sta S1 ; Initalize S1 and S2 to -128 ($80)
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sta S2
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lda #0
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sta U1 ; Initialize U1 and U2 to 0
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sta U2
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ldy #1 ; Initialize Y (used to set and clear the carry flag) to 1
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LOOP: jsr ADD ; Test ADC
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cpx #1
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beq DONE ; End if V and unsigned result do not agree (X = 1)
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jsr SUB ; Test SBC
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cpx #1
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beq DONE ; End if V and unsigned result do not agree (X = 1)
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inc S1
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inc U1
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bne LOOP ; Loop until all 256 possibilities of S1 and U1 are tested
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inc S2
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inc U2
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bne LOOP ; Loop until all 256 possibilities of S2 and U2 are tested
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dey
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bpl LOOP ; Loop until both possiblities of the carry flag are tested
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lda #0
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sta ERROR ; All tests pass, so store 0 in ERROR
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DONE: stp
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;
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; Test ADC
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;
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; X is initialized to 0
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; X is incremented when V = 1
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; X is incremented when the unsigned result predicts an overflow
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; Therefore, if the V flag and the unsigned result agree, X will be
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; incremented zero or two times (returning X = 0 or X = 2), and if they do
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; not agree X will be incremented once (returning X = 1)
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;
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ADD: cpy #1 ; Set carry when Y = 1, clear carry when Y = 0
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lda S1 ; Test twos complement addition
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adc S2
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ldx #0 ; Initialize X to 0
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bvc ADD1
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inx ; Increment X if V = 1
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ADD1: cpy #1 ; Set carry when Y = 1, clear carry when Y = 0
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lda U1 ; Test unsigned addition
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adc U2
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bcs ADD3 ; Carry is set if U1 + U2 >= 256
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bmi ADD2 ; U1 + U2 < 256, A >= 128 if U1 + U2 >= 128
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inx ; Increment X if U1 + U2 < 128
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ADD2: rts
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ADD3: bpl ADD4 ; U1 + U2 >= 256, A <= 127 if U1 + U2 <= 383 ($17F)
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inx ; Increment X if U1 + U2 > 383
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ADD4: rts
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;
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; Test SBC
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;
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; X is initialized to 0
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; X is incremented when V = 1
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; X is incremented when the unsigned result predicts an overflow
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; Therefore, if the V flag and the unsigned result agree, X will be
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; incremented zero or two times (returning X = 0 or X = 2), and if they do
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; not agree X will be incremented once (returning X = 1)
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;
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SUB: cpy #0x1 ; Set carry when Y = 1, clear carry when Y = 0
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lda S1 ; Test twos complement subtraction
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sbc S2
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ldx #0x0 ; Initialize X to 0
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bvc SUB1
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inx ; Increment X if V = 1
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SUB1: cpy #0x1 ; Set carry when Y = 1, clear carry when Y = 0
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lda U1 ; Test unsigned subtraction
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sbc U2
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pha ; Save the low byte of result on the stack
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lda #0xFF
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sbc #0 ; result = (65280 + U1) - U2, 65280 = $FF00
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cmp #0xFE
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bne SUB4 ; Branch if result >= 65280 ($FF00) or result < 65024 ($FE00)
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pla ; Get the low byte of result
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bmi SUB3 ; result < 65280 ($FF00), A >= 128 if result >= 65152 ($FE80)
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SUB2: inx ; Increment X if result < 65152 ($FE80)
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SUB3: rts
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SUB4: pla ; Get the low byte of result (does not affect the carry flag)
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bcc SUB2 ; The carry flag is clear if result < 65024 ($FE00)
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bpl SUB5 ; result >= 65280 ($FF00), A <= 127 if result <= 65407 ($FF7F)
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inx ; Increment X if result > 65407 ($FF7F)
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SUB5: rts
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