From 8b1771d2c9d94a70fde7516e9ab40299d7735881 Mon Sep 17 00:00:00 2001 From: Aearnus Date: Thu, 31 May 2018 00:51:34 -0700 Subject: [PATCH] Made functions complete, no more partial functions --- src/DSL/SixtyFiveOhTwo.hs | 319 ++++++++++++++++++++------------ src/DSL/SixtyFiveOhTwo/Types.hs | 2 +- 2 files changed, 204 insertions(+), 117 deletions(-) diff --git a/src/DSL/SixtyFiveOhTwo.hs b/src/DSL/SixtyFiveOhTwo.hs index b6d37da..0939ccf 100644 --- a/src/DSL/SixtyFiveOhTwo.hs +++ b/src/DSL/SixtyFiveOhTwo.hs @@ -1,7 +1,12 @@ +{-# LANGUAGE TypeFamilies, TypeOperators, GADTs, DataKinds, KindSignatures #-} {-# LANGUAGE TemplateHaskell #-} -module DSL.SixtyFiveOhTwo where +module DSL.SixtyFiveOhTwo + (module DSL.SixtyFiveOhTwo, + module DSL.SixtyFiveOhTwo.Types) + where +import DSL.SixtyFiveOhTwo.Types import Control.Monad.State import qualified Data.ByteString as B import qualified Data.Map.Strict as M @@ -26,23 +31,6 @@ type Instruction = State InstructionState () runInstructions :: Instruction -> B.ByteString runInstructions ins = (execState ins emptyState) ^. bytestring --- Remember, it's little endian -data AddressingMode = - Implied | - Accumulator | - Immediate Word8 | - Relative Int8 | -- Signed - ZeroPageRelative Int8 | -- Signed - Absolute Word16 | - AbsoluteX Word16 | - AbsoluteY Word16 | - ZeroPage Word8 | - ZeroPageX Word8 | - ZeroPageY Word8 | - ZeroPageIndirect Word8 | - Indirect Word16 | - IndirectX Word8 | - IndirectY Word8 splitW16 :: Word16 -> (Word8, Word8) splitW16 w = (lo, hi) -- Little endian @@ -111,7 +99,9 @@ call name = do -- THE FOLLOWING WAS GENERATED BY -- https://github.com/aearnus/assemblicom -- for the 65C02 instruction set -adc :: AddressingMode -> Instruction + +adc :: IsElem a '[ImmediateKind, ZeroPageKind, ZeroPageXKind, AbsoluteKind, AbsoluteXKind, AbsoluteYKind, ZeroPageIndirectKind, IndirectXKind, IndirectYKind] ~ 'True + => AddressingMode a -> Instruction adc (Immediate b) = genericOp 105 b adc (ZeroPage b) = genericOp 101 b adc (ZeroPageX b) = genericOp 117 b @@ -122,7 +112,8 @@ adc (ZeroPageIndirect b) = genericOp 114 b adc (IndirectX b) = genericOp 97 b adc (IndirectY b) = genericOp 113 b -and :: AddressingMode -> Instruction +and :: IsElem a '[ImmediateKind, ZeroPageKind, ZeroPageXKind, AbsoluteKind, AbsoluteXKind, AbsoluteYKind, ZeroPageIndirectKind, IndirectXKind, IndirectYKind] ~ 'True + => AddressingMode a -> Instruction and (Immediate b) = genericOp 41 b and (ZeroPage b) = genericOp 37 b and (ZeroPageX b) = genericOp 53 b @@ -133,111 +124,144 @@ and (ZeroPageIndirect b) = genericOp 50 b and (IndirectX b) = genericOp 33 b and (IndirectY b) = genericOp 49 b -asl :: AddressingMode -> Instruction +asl :: IsElem a '[AccumulatorKind, ZeroPageKind, ZeroPageXKind, AbsoluteKind, AbsoluteXKind] ~ 'True + => AddressingMode a -> Instruction asl (Accumulator) = genericNoByteOp 10 asl (ZeroPage b) = genericOp 6 b asl (ZeroPageX b) = genericOp 22 b asl (Absolute b) = genericTwoByteOp 14 b asl (AbsoluteX b) = genericTwoByteOp 30 b -bbr0 :: AddressingMode -> Instruction +bbr0 :: IsElem a '[ZeroPageRelativeKind] ~ 'True + => AddressingMode a -> Instruction bbr0 (ZeroPageRelative b) = genericOp 15 b -bbr1 :: AddressingMode -> Instruction +bbr1 :: IsElem a '[ZeroPageRelativeKind] ~ 'True + => AddressingMode a -> Instruction bbr1 (ZeroPageRelative b) = genericOp 31 b -bbr2 :: AddressingMode -> Instruction +bbr2 :: IsElem a '[ZeroPageRelativeKind] ~ 'True + => AddressingMode a -> Instruction bbr2 (ZeroPageRelative b) = genericOp 47 b -bbr3 :: AddressingMode -> Instruction +bbr3 :: IsElem a '[ZeroPageRelativeKind] ~ 'True + => AddressingMode a -> Instruction bbr3 (ZeroPageRelative b) = genericOp 63 b -bbr4 :: AddressingMode -> Instruction +bbr4 :: IsElem a '[ZeroPageRelativeKind] ~ 'True + => AddressingMode a -> Instruction bbr4 (ZeroPageRelative b) = genericOp 79 b -bbr5 :: AddressingMode -> Instruction +bbr5 :: IsElem a '[ZeroPageRelativeKind] ~ 'True + => AddressingMode a -> Instruction bbr5 (ZeroPageRelative b) = genericOp 95 b -bbr6 :: AddressingMode -> Instruction +bbr6 :: IsElem a '[ZeroPageRelativeKind] ~ 'True + => AddressingMode a -> Instruction bbr6 (ZeroPageRelative b) = genericOp 111 b -bbr7 :: AddressingMode -> Instruction +bbr7 :: IsElem a '[ZeroPageRelativeKind] ~ 'True + => AddressingMode a -> Instruction bbr7 (ZeroPageRelative b) = genericOp 127 b -bbs0 :: AddressingMode -> Instruction +bbs0 :: IsElem a '[ZeroPageRelativeKind] ~ 'True + => AddressingMode a -> Instruction bbs0 (ZeroPageRelative b) = genericOp 143 b -bbs1 :: AddressingMode -> Instruction +bbs1 :: IsElem a '[ZeroPageRelativeKind] ~ 'True + => AddressingMode a -> Instruction bbs1 (ZeroPageRelative b) = genericOp 159 b -bbs2 :: AddressingMode -> Instruction +bbs2 :: IsElem a '[ZeroPageRelativeKind] ~ 'True + => AddressingMode a -> Instruction bbs2 (ZeroPageRelative b) = genericOp 175 b -bbs3 :: AddressingMode -> Instruction +bbs3 :: IsElem a '[ZeroPageRelativeKind] ~ 'True + => AddressingMode a -> Instruction bbs3 (ZeroPageRelative b) = genericOp 191 b -bbs4 :: AddressingMode -> Instruction +bbs4 :: IsElem a '[ZeroPageRelativeKind] ~ 'True + => AddressingMode a -> Instruction bbs4 (ZeroPageRelative b) = genericOp 207 b -bbs5 :: AddressingMode -> Instruction +bbs5 :: IsElem a '[ZeroPageRelativeKind] ~ 'True + => AddressingMode a -> Instruction bbs5 (ZeroPageRelative b) = genericOp 223 b -bbs6 :: AddressingMode -> Instruction +bbs6 :: IsElem a '[ZeroPageRelativeKind] ~ 'True + => AddressingMode a -> Instruction bbs6 (ZeroPageRelative b) = genericOp 239 b -bbs7 :: AddressingMode -> Instruction +bbs7 :: IsElem a '[ZeroPageRelativeKind] ~ 'True + => AddressingMode a -> Instruction bbs7 (ZeroPageRelative b) = genericOp 255 b -bcc :: AddressingMode -> Instruction +bcc :: IsElem a '[RelativeKind] ~ 'True + => AddressingMode a -> Instruction bcc (Relative b) = genericOp 144 b -bcs :: AddressingMode -> Instruction +bcs :: IsElem a '[RelativeKind] ~ 'True + => AddressingMode a -> Instruction bcs (Relative b) = genericOp 176 b -beq :: AddressingMode -> Instruction +beq :: IsElem a '[RelativeKind] ~ 'True + => AddressingMode a -> Instruction beq (Relative b) = genericOp 240 b -bit :: AddressingMode -> Instruction +bit :: IsElem a '[ImmediateKind, ZeroPageKind, ZeroPageXKind, AbsoluteKind, AbsoluteXKind] ~ 'True + => AddressingMode a -> Instruction bit (Immediate b) = genericOp 137 b bit (ZeroPage b) = genericOp 36 b bit (ZeroPageX b) = genericOp 52 b bit (Absolute b) = genericTwoByteOp 44 b bit (AbsoluteX b) = genericTwoByteOp 60 b -bmi :: AddressingMode -> Instruction +bmi :: IsElem a '[RelativeKind] ~ 'True + => AddressingMode a -> Instruction bmi (Relative b) = genericOp 48 b -bne :: AddressingMode -> Instruction +bne :: IsElem a '[RelativeKind] ~ 'True + => AddressingMode a -> Instruction bne (Relative b) = genericOp 208 b -bpl :: AddressingMode -> Instruction +bpl :: IsElem a '[RelativeKind] ~ 'True + => AddressingMode a -> Instruction bpl (Relative b) = genericOp 16 b -bra :: AddressingMode -> Instruction +bra :: IsElem a '[RelativeKind] ~ 'True + => AddressingMode a -> Instruction bra (Relative b) = genericOp 128 b -brk :: AddressingMode -> Instruction +brk :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction brk (Implied) = genericNoByteOp 0 -bvc :: AddressingMode -> Instruction +bvc :: IsElem a '[RelativeKind] ~ 'True + => AddressingMode a -> Instruction bvc (Relative b) = genericOp 80 b -bvs :: AddressingMode -> Instruction +bvs :: IsElem a '[RelativeKind] ~ 'True + => AddressingMode a -> Instruction bvs (Relative b) = genericOp 112 b -clc :: AddressingMode -> Instruction +clc :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction clc (Implied) = genericNoByteOp 24 -cld :: AddressingMode -> Instruction +cld :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction cld (Implied) = genericNoByteOp 216 -cli :: AddressingMode -> Instruction +cli :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction cli (Implied) = genericNoByteOp 88 -clv :: AddressingMode -> Instruction +clv :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction clv (Implied) = genericNoByteOp 184 -cmp :: AddressingMode -> Instruction +cmp :: IsElem a '[ImmediateKind, ZeroPageKind, ZeroPageXKind, AbsoluteKind, AbsoluteXKind, AbsoluteYKind, ZeroPageIndirectKind, IndirectXKind, IndirectYKind] ~ 'True + => AddressingMode a -> Instruction cmp (Immediate b) = genericOp 201 b cmp (ZeroPage b) = genericOp 197 b cmp (ZeroPageX b) = genericOp 213 b @@ -248,30 +272,36 @@ cmp (ZeroPageIndirect b) = genericOp 210 b cmp (IndirectX b) = genericOp 193 b cmp (IndirectY b) = genericOp 209 b -cpx :: AddressingMode -> Instruction +cpx :: IsElem a '[ImmediateKind, ZeroPageKind, AbsoluteKind] ~ 'True + => AddressingMode a -> Instruction cpx (Immediate b) = genericOp 224 b cpx (ZeroPage b) = genericOp 228 b cpx (Absolute b) = genericTwoByteOp 236 b -cpy :: AddressingMode -> Instruction +cpy :: IsElem a '[ImmediateKind, ZeroPageKind, AbsoluteKind] ~ 'True + => AddressingMode a -> Instruction cpy (Immediate b) = genericOp 192 b cpy (ZeroPage b) = genericOp 196 b cpy (Absolute b) = genericTwoByteOp 204 b -dec :: AddressingMode -> Instruction +dec :: IsElem a '[AccumulatorKind, ZeroPageKind, ZeroPageXKind, AbsoluteKind, AbsoluteXKind] ~ 'True + => AddressingMode a -> Instruction dec (Accumulator) = genericNoByteOp 58 dec (ZeroPage b) = genericOp 198 b dec (ZeroPageX b) = genericOp 214 b dec (Absolute b) = genericTwoByteOp 206 b dec (AbsoluteX b) = genericTwoByteOp 222 b -dex :: AddressingMode -> Instruction +dex :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction dex (Implied) = genericNoByteOp 202 -dey :: AddressingMode -> Instruction +dey :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction dey (Implied) = genericNoByteOp 136 -eor :: AddressingMode -> Instruction +eor :: IsElem a '[ImmediateKind, ZeroPageKind, ZeroPageXKind, AbsoluteKind, AbsoluteXKind, AbsoluteYKind, ZeroPageIndirectKind, IndirectXKind, IndirectYKind] ~ 'True + => AddressingMode a -> Instruction eor (Immediate b) = genericOp 73 b eor (ZeroPage b) = genericOp 69 b eor (ZeroPageX b) = genericOp 85 b @@ -282,28 +312,34 @@ eor (ZeroPageIndirect b) = genericOp 82 b eor (IndirectX b) = genericOp 65 b eor (IndirectY b) = genericOp 81 b -inc :: AddressingMode -> Instruction +inc :: IsElem a '[AccumulatorKind, ZeroPageKind, ZeroPageXKind, AbsoluteKind, AbsoluteXKind] ~ 'True + => AddressingMode a -> Instruction inc (Accumulator) = genericNoByteOp 26 inc (ZeroPage b) = genericOp 230 b inc (ZeroPageX b) = genericOp 246 b inc (Absolute b) = genericTwoByteOp 238 b inc (AbsoluteX b) = genericTwoByteOp 254 b -inx :: AddressingMode -> Instruction +inx :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction inx (Implied) = genericNoByteOp 232 -iny :: AddressingMode -> Instruction +iny :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction iny (Implied) = genericNoByteOp 200 -jmp :: AddressingMode -> Instruction +jmp :: IsElem a '[AbsoluteKind, IndirectKind, AbsoluteXKind] ~ 'True + => AddressingMode a -> Instruction jmp (Absolute b) = genericTwoByteOp 76 b jmp (Indirect b) = genericTwoByteOp 108 b jmp (AbsoluteX b) = genericTwoByteOp 124 b -jsr :: AddressingMode -> Instruction +jsr :: IsElem a '[AbsoluteKind] ~ 'True + => AddressingMode a -> Instruction jsr (Absolute b) = genericTwoByteOp 32 b -lda :: AddressingMode -> Instruction +lda :: IsElem a '[ImmediateKind, ZeroPageKind, ZeroPageXKind, AbsoluteKind, AbsoluteXKind, AbsoluteYKind, ZeroPageIndirectKind, IndirectXKind, IndirectYKind] ~ 'True + => AddressingMode a -> Instruction lda (Immediate b) = genericOp 169 b lda (ZeroPage b) = genericOp 165 b lda (ZeroPageX b) = genericOp 181 b @@ -314,31 +350,36 @@ lda (ZeroPageIndirect b) = genericOp 178 b lda (IndirectX b) = genericOp 161 b lda (IndirectY b) = genericOp 177 b -ldx :: AddressingMode -> Instruction +ldx :: IsElem a '[ImmediateKind, ZeroPageKind, ZeroPageYKind, AbsoluteKind, AbsoluteYKind] ~ 'True + => AddressingMode a -> Instruction ldx (Immediate b) = genericOp 162 b ldx (ZeroPage b) = genericOp 166 b ldx (ZeroPageY b) = genericOp 182 b ldx (Absolute b) = genericTwoByteOp 174 b ldx (AbsoluteY b) = genericTwoByteOp 190 b -ldy :: AddressingMode -> Instruction +ldy :: IsElem a '[ImmediateKind, ZeroPageKind, ZeroPageXKind, AbsoluteKind, AbsoluteXKind] ~ 'True + => AddressingMode a -> Instruction ldy (Immediate b) = genericOp 160 b ldy (ZeroPage b) = genericOp 164 b ldy (ZeroPageX b) = genericOp 180 b ldy (Absolute b) = genericTwoByteOp 172 b ldy (AbsoluteX b) = genericTwoByteOp 188 b -lsr :: AddressingMode -> Instruction +lsr :: IsElem a '[AccumulatorKind, ZeroPageKind, ZeroPageXKind, AbsoluteKind, AbsoluteXKind] ~ 'True + => AddressingMode a -> Instruction lsr (Accumulator) = genericNoByteOp 74 lsr (ZeroPage b) = genericOp 70 b lsr (ZeroPageX b) = genericOp 86 b lsr (Absolute b) = genericTwoByteOp 78 b lsr (AbsoluteX b) = genericTwoByteOp 94 b -nop :: AddressingMode -> Instruction +nop :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction nop (Implied) = genericNoByteOp 234 -ora :: AddressingMode -> Instruction +ora :: IsElem a '[ImmediateKind, ZeroPageKind, ZeroPageXKind, AbsoluteKind, AbsoluteXKind, AbsoluteYKind, ZeroPageIndirectKind, IndirectXKind, IndirectYKind] ~ 'True + => AddressingMode a -> Instruction ora (Immediate b) = genericOp 9 b ora (ZeroPage b) = genericOp 5 b ora (ZeroPageX b) = genericOp 21 b @@ -349,75 +390,96 @@ ora (ZeroPageIndirect b) = genericOp 18 b ora (IndirectX b) = genericOp 1 b ora (IndirectY b) = genericOp 17 b -pha :: AddressingMode -> Instruction +pha :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction pha (Implied) = genericNoByteOp 72 -php :: AddressingMode -> Instruction +php :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction php (Implied) = genericNoByteOp 8 -phx :: AddressingMode -> Instruction +phx :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction phx (Implied) = genericNoByteOp 218 -phy :: AddressingMode -> Instruction +phy :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction phy (Implied) = genericNoByteOp 90 -pla :: AddressingMode -> Instruction +pla :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction pla (Implied) = genericNoByteOp 104 -plp :: AddressingMode -> Instruction +plp :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction plp (Implied) = genericNoByteOp 40 -plx :: AddressingMode -> Instruction +plx :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction plx (Implied) = genericNoByteOp 250 -ply :: AddressingMode -> Instruction +ply :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction ply (Implied) = genericNoByteOp 122 -rmb0 :: AddressingMode -> Instruction +rmb0 :: IsElem a '[ZeroPageKind] ~ 'True + => AddressingMode a -> Instruction rmb0 (ZeroPage b) = genericOp 7 b -rmb1 :: AddressingMode -> Instruction +rmb1 :: IsElem a '[ZeroPageKind] ~ 'True + => AddressingMode a -> Instruction rmb1 (ZeroPage b) = genericOp 23 b -rmb2 :: AddressingMode -> Instruction +rmb2 :: IsElem a '[ZeroPageKind] ~ 'True + => AddressingMode a -> Instruction rmb2 (ZeroPage b) = genericOp 39 b -rmb3 :: AddressingMode -> Instruction +rmb3 :: IsElem a '[ZeroPageKind] ~ 'True + => AddressingMode a -> Instruction rmb3 (ZeroPage b) = genericOp 55 b -rmb4 :: AddressingMode -> Instruction +rmb4 :: IsElem a '[ZeroPageKind] ~ 'True + => AddressingMode a -> Instruction rmb4 (ZeroPage b) = genericOp 71 b -rmb5 :: AddressingMode -> Instruction +rmb5 :: IsElem a '[ZeroPageKind] ~ 'True + => AddressingMode a -> Instruction rmb5 (ZeroPage b) = genericOp 87 b -rmb6 :: AddressingMode -> Instruction +rmb6 :: IsElem a '[ZeroPageKind] ~ 'True + => AddressingMode a -> Instruction rmb6 (ZeroPage b) = genericOp 103 b -rmb7 :: AddressingMode -> Instruction +rmb7 :: IsElem a '[ZeroPageKind] ~ 'True + => AddressingMode a -> Instruction rmb7 (ZeroPage b) = genericOp 119 b -rol :: AddressingMode -> Instruction +rol :: IsElem a '[AccumulatorKind, ZeroPageKind, ZeroPageXKind, AbsoluteKind, AbsoluteXKind] ~ 'True + => AddressingMode a -> Instruction rol (Accumulator) = genericNoByteOp 42 rol (ZeroPage b) = genericOp 38 b rol (ZeroPageX b) = genericOp 54 b rol (Absolute b) = genericTwoByteOp 46 b rol (AbsoluteX b) = genericTwoByteOp 62 b -ror :: AddressingMode -> Instruction +ror :: IsElem a '[AccumulatorKind, ZeroPageKind, ZeroPageXKind, AbsoluteKind, AbsoluteXKind] ~ 'True + => AddressingMode a -> Instruction ror (Accumulator) = genericNoByteOp 106 ror (ZeroPage b) = genericOp 102 b ror (ZeroPageX b) = genericOp 118 b ror (Absolute b) = genericTwoByteOp 110 b ror (AbsoluteX b) = genericTwoByteOp 126 b -rti :: AddressingMode -> Instruction +rti :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction rti (Implied) = genericNoByteOp 64 -rts :: AddressingMode -> Instruction +rts :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction rts (Implied) = genericNoByteOp 96 -sbc :: AddressingMode -> Instruction +sbc :: IsElem a '[ImmediateKind, ZeroPageKind, ZeroPageXKind, AbsoluteKind, AbsoluteXKind, AbsoluteYKind, ZeroPageIndirectKind, IndirectXKind, IndirectYKind] ~ 'True + => AddressingMode a -> Instruction sbc (Immediate b) = genericOp 233 b sbc (ZeroPage b) = genericOp 229 b sbc (ZeroPageX b) = genericOp 245 b @@ -428,40 +490,52 @@ sbc (ZeroPageIndirect b) = genericOp 242 b sbc (IndirectX b) = genericOp 225 b sbc (IndirectY b) = genericOp 241 b -sec :: AddressingMode -> Instruction +sec :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction sec (Implied) = genericNoByteOp 56 -sed :: AddressingMode -> Instruction +sed :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction sed (Implied) = genericNoByteOp 248 -sei :: AddressingMode -> Instruction +sei :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction sei (Implied) = genericNoByteOp 120 -smb0 :: AddressingMode -> Instruction +smb0 :: IsElem a '[ZeroPageKind] ~ 'True + => AddressingMode a -> Instruction smb0 (ZeroPage b) = genericOp 135 b -smb1 :: AddressingMode -> Instruction +smb1 :: IsElem a '[ZeroPageKind] ~ 'True + => AddressingMode a -> Instruction smb1 (ZeroPage b) = genericOp 151 b -smb2 :: AddressingMode -> Instruction +smb2 :: IsElem a '[ZeroPageKind] ~ 'True + => AddressingMode a -> Instruction smb2 (ZeroPage b) = genericOp 167 b -smb3 :: AddressingMode -> Instruction +smb3 :: IsElem a '[ZeroPageKind] ~ 'True + => AddressingMode a -> Instruction smb3 (ZeroPage b) = genericOp 183 b -smb4 :: AddressingMode -> Instruction +smb4 :: IsElem a '[ZeroPageKind] ~ 'True + => AddressingMode a -> Instruction smb4 (ZeroPage b) = genericOp 199 b -smb5 :: AddressingMode -> Instruction +smb5 :: IsElem a '[ZeroPageKind] ~ 'True + => AddressingMode a -> Instruction smb5 (ZeroPage b) = genericOp 215 b -smb6 :: AddressingMode -> Instruction +smb6 :: IsElem a '[ZeroPageKind] ~ 'True + => AddressingMode a -> Instruction smb6 (ZeroPage b) = genericOp 231 b -smb7 :: AddressingMode -> Instruction +smb7 :: IsElem a '[ZeroPageKind] ~ 'True + => AddressingMode a -> Instruction smb7 (ZeroPage b) = genericOp 247 b -sta :: AddressingMode -> Instruction +sta :: IsElem a '[ZeroPageKind, ZeroPageXKind, AbsoluteKind, AbsoluteXKind, AbsoluteYKind, ZeroPageIndirectKind, IndirectXKind, IndirectYKind] ~ 'True + => AddressingMode a -> Instruction sta (ZeroPage b) = genericOp 133 b sta (ZeroPageX b) = genericOp 149 b sta (Absolute b) = genericTwoByteOp 141 b @@ -471,50 +545,63 @@ sta (ZeroPageIndirect b) = genericOp 146 b sta (IndirectX b) = genericOp 129 b sta (IndirectY b) = genericOp 145 b -stp :: AddressingMode -> Instruction +stp :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction stp (Implied) = genericNoByteOp 219 -stx :: AddressingMode -> Instruction +stx :: IsElem a '[ZeroPageKind, ZeroPageYKind, AbsoluteKind] ~ 'True + => AddressingMode a -> Instruction stx (ZeroPage b) = genericOp 134 b stx (ZeroPageY b) = genericOp 150 b stx (Absolute b) = genericTwoByteOp 142 b -sty :: AddressingMode -> Instruction +sty :: IsElem a '[ZeroPageKind, ZeroPageXKind, AbsoluteKind] ~ 'True + => AddressingMode a -> Instruction sty (ZeroPage b) = genericOp 132 b sty (ZeroPageX b) = genericOp 148 b sty (Absolute b) = genericTwoByteOp 140 b -stz :: AddressingMode -> Instruction +stz :: IsElem a '[ZeroPageKind, ZeroPageXKind, AbsoluteKind, AbsoluteXKind] ~ 'True + => AddressingMode a -> Instruction stz (ZeroPage b) = genericOp 100 b stz (ZeroPageX b) = genericOp 116 b stz (Absolute b) = genericTwoByteOp 156 b stz (AbsoluteX b) = genericTwoByteOp 158 b -tax :: AddressingMode -> Instruction +tax :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction tax (Implied) = genericNoByteOp 170 -tay :: AddressingMode -> Instruction +tay :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction tay (Implied) = genericNoByteOp 168 -trb :: AddressingMode -> Instruction +trb :: IsElem a '[ZeroPageKind, AbsoluteKind] ~ 'True + => AddressingMode a -> Instruction trb (ZeroPage b) = genericOp 20 b trb (Absolute b) = genericTwoByteOp 28 b -tsb :: AddressingMode -> Instruction +tsb :: IsElem a '[ZeroPageKind, AbsoluteKind] ~ 'True + => AddressingMode a -> Instruction tsb (ZeroPage b) = genericOp 4 b tsb (Absolute b) = genericTwoByteOp 12 b -tsx :: AddressingMode -> Instruction +tsx :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction tsx (Implied) = genericNoByteOp 186 -txa :: AddressingMode -> Instruction +txa :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction txa (Implied) = genericNoByteOp 138 -txs :: AddressingMode -> Instruction +txs :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction txs (Implied) = genericNoByteOp 154 -tya :: AddressingMode -> Instruction +tya :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction tya (Implied) = genericNoByteOp 152 -wai :: AddressingMode -> Instruction +wai :: IsElem a '[ImpliedKind] ~ 'True + => AddressingMode a -> Instruction wai (Implied) = genericNoByteOp 203 diff --git a/src/DSL/SixtyFiveOhTwo/Types.hs b/src/DSL/SixtyFiveOhTwo/Types.hs index 1cd1e09..7d0dd29 100644 --- a/src/DSL/SixtyFiveOhTwo/Types.hs +++ b/src/DSL/SixtyFiveOhTwo/Types.hs @@ -29,7 +29,7 @@ data AddressingMode (k :: AddressingKind) where Accumulator :: AddressingMode 'AccumulatorKind Immediate :: Word8 -> AddressingMode 'ImmediateKind Relative :: Int8 -> AddressingMode 'RelativeKind -- Signed - ZeroPageRelative :: Int8 -> AddressingMode 'ZeroPageKind -- Signed + ZeroPageRelative :: Int8 -> AddressingMode 'ZeroPageRelativeKind -- Signed Absolute :: Word16 -> AddressingMode 'AbsoluteKind AbsoluteX :: Word16 -> AddressingMode 'AbsoluteXKind AbsoluteY :: Word16 -> AddressingMode 'AbsoluteYKind