mirror of
https://github.com/sethm/symon.git
synced 2025-08-09 11:25:13 +00:00
Fixed 6850 behaviour
+ Fixed interrupt bit reset behaviour
This commit is contained in:
@@ -56,6 +56,9 @@ public class Acia6850 extends Acia {
|
||||
public int read(int address, boolean cpuAccess) throws MemoryAccessException {
|
||||
switch (address) {
|
||||
case RX_REG:
|
||||
if (cpuAccess) {
|
||||
interrupt = false;
|
||||
}
|
||||
return rxRead(cpuAccess);
|
||||
case STAT_REG:
|
||||
return statusReg(cpuAccess);
|
||||
@@ -69,6 +72,9 @@ public class Acia6850 extends Acia {
|
||||
public void write(int address, int data) throws MemoryAccessException {
|
||||
switch (address) {
|
||||
case TX_REG:
|
||||
if (cpuAccess) {
|
||||
interrupt = false;
|
||||
}
|
||||
txWrite(data);
|
||||
break;
|
||||
case CTRL_REG:
|
||||
@@ -113,10 +119,6 @@ public class Acia6850 extends Acia {
|
||||
stat |= 0x80;
|
||||
}
|
||||
|
||||
if (cpuAccess) {
|
||||
interrupt = false;
|
||||
}
|
||||
|
||||
return stat;
|
||||
}
|
||||
|
||||
|
Reference in New Issue
Block a user