Commit Graph

283 Commits

Author SHA1 Message Date
Seth Morabito ecd4bbbd9a README formatting fix 2023-11-18 10:50:07 -08:00
Seth Morabito a537328852 Minor README update 2023-11-18 10:46:55 -08:00
Seth Morabito 4975fca506 Missed a README update for v1.4.0 2023-11-11 08:20:49 -08:00
Seth Morabito 199d96c025 Prepare release 1.4.0 2023-11-11 08:15:35 -08:00
Seth Morabito 0c026e38dd By default, do not halt on BRK (#14)
This change introduces a new command line flag, '-b', that cause the
simulator to halt on the `BRK` instruction. By default, however, the
simulator will no longer halt on `BRK`.

As before, this behavior can be toggled in the preferences at run-time.
2023-11-10 09:11:24 -08:00
Seth Morabito 5e56627f32 #13: Move cursor backward on ASCII Backspace 2023-10-31 08:28:26 -07:00
Chelsea Wilkinson 67f5e17f78 Added BenEaterMachine 2023-10-31 07:44:55 -07:00
Seth Morabito 5a25750f46 Clarify how to load ROMs in README files 2023-07-23 10:16:36 -07:00
Tim Allen 4a8a803472 Document the quirks of Symon's ACIA emulation.
Fixes #7.
2023-06-11 08:21:37 -07:00
Tim Allen 4423623816 Writing 0 to the 6551 ACIA's control register is not a program reset.
So far as I can tell, ever since the first version of the ACIA emulation in
Symon, writing 0x00 to the control register has been interpreted as a request
to reset, rather than to actually set the control register to 0x00. This is
strange for a number of reasons:

- All-zeros is actually a very sensible value for the control register, and
  is in fact the hardware-reset default.
- I can't find any description of such behaviour in the 6551, W65C51S, or
  W65C51N data sheets.
- The 6551 already has a way to trigger "program reset" by writing to the
  status register.

So I've removed that quirk, and writing to the control register now just
writes to the control register and nothing else.
2023-06-11 08:21:37 -07:00
Tim Allen 5df775bbb0 Make the emulated 6551's soft ("program") reset state match the MOS datasheet.
The only description of the effects of "program reset" in the original MOS
datasheet is in the section for each register. The W65C51S and W65C51N
datasheets have a heading "PROGRAM RESET OPERATION", but it amounts to:

- internal registers are modified as described in the section for each register
- changes to the DTR, DCD, and DSR pins which Symon does not emulate
- the overrun flag is cleared

...which is what this new implementation does.

It would make *sense* for the reset to do things like "cancel transmission or
reception in progress" and stop asserting an interrupt, as the old code did,
but I can't find any evidence of such behaviour in the datasheets.
2023-06-11 08:21:37 -07:00
Tim Allen d076046f57 Make the emulated 6551's hardware reset state match the MOS datasheet. 2023-06-11 08:21:37 -07:00
Tim Allen b725fb5fdd Fix comment: The 6551 baud rate is in the lower *four* bits.
The code is correct, the comment is wrong.
2023-06-10 10:19:24 -07:00
Tim Allen 9351d785ae Fix comment: The 6551 ACIA *does* support interrupts. 2023-06-10 10:19:24 -07:00
Tim Allen 66a92f4196 Use ACIA register names where we can. 2023-06-10 10:19:24 -07:00
Seth Morabito cda9a218af
Merge pull request #6 from Screwtapello/irq-disabled-at-reset
Make the Processor Status register match a real 6502 at power-on.
2023-02-03 16:38:06 -08:00
Tim Allen b5a470d3ba Make the Processor Status register match a real 6502 at power-on.
When describing the CPU's reset pin, the W65C02S data sheet says:

> All Registers are initialized by software except the Decimal and Interrupt
> disable mode select bits of the Processor Status Register (P) are initialized
> by hardware.

It then has a diagram of the power-on state of the processor status register:

>     7 6 5 4 3 2 1 0
>     * * 1 1 0 1 * *
>     N V - B D I Z C
> * = software initialized

Confusingly the text indicates that only the D and I flags are initialised by
hardware, while the diagram indicates that the B flag is initialised too.

Meanwhile, says that
the power-on state of the NES CPU is $34 (exactly matching the diagram above)
but says that the B flag
does not physically exist within P register, it's only relevant in the copy
of P that gets pushed to the stack by BRK (set), PHP (set), or an interrupt
signal (cleared).

As a result, the most sensible power-on state for the processor status register
is with the "interrupt disable" flag set and everything else cleared.
2023-02-03 18:16:57 +11:00
Seth Morabito e210a40639 Use correct Mockito package 2023-01-12 16:56:28 -08:00
Seth Morabito 0bad9912ce Repaint Video window at 30fps
A bug caused the video window to repaint only when the cursor was
blinking. This meant that if the cursor was disabled, the window would
never update!

This change removes the repaint logic from the cursor blinking timer,
and instead puts it into its own periodic timer callback that runs
independently of cursor blink.
2023-01-11 13:31:22 -08:00
Seth Morabito b36b442b14 Cleanup some IntelliJ IDEA warnings
Cleaning up some warnings for the first time in many eons.
2022-12-15 09:44:53 -08:00
Seth Morabito 5f8f743f7d Update for 1.3.2 2022-03-08 14:36:59 -08:00
Seth Morabito 4ce8bc86de Update pom.xml
- Switched from maven-assembly-plugin to maven-shade-plugin
  for final packaging
- Updated maven-jar-plugin to 3.2.0
2021-09-25 10:46:36 -07:00
Seth Morabito 4644fe9b55 Update junit and mockito
- JUnit has been bumped to 4.13.2.
- Mockito has gone from 1.10.19 to 3.12.4, and now compiles correctly
  on OpenJDK 16 using Maven 3.8.
2021-09-24 09:39:00 -07:00
Seth Morabito 655bbb3ab0
Merge pull request #26 from sethm/dependabot/maven/junit-junit-4.13.1
Bump junit from 4.12 to 4.13.1
2020-10-13 14:45:47 -07:00
dependabot[bot] e2d31fd39c
Bump junit from 4.12 to 4.13.1
Bumps [junit]( from 4.12 to 4.13.1.
- [Release notes](
- [Changelog](
- [Commits](

Signed-off-by: dependabot[bot] <>
2020-10-13 09:09:28 +00:00
Seth Morabito 087ba28b82 Force metal look-and-feel
* On Linux GTK+, the small text fields in the Status Panel displayed a
  large inner margin, cutting off text. This change forces Java to use the
  Metal look-and-feel for these fields, which forces no default inner
2020-09-01 10:48:17 -07:00
Seth Morabito 8edca5d595 Update link in README 2020-05-21 15:01:34 -07:00
Seth Morabito 105a09067f Fix README for 1.3.1 2019-10-12 14:58:16 -07:00
Seth Morabito 08efd81be3 Merge branch 'master' into 1.3.branch 2019-10-12 14:55:43 -07:00
Seth Morabito 0aeb97bb56 Add new options -cpu and -rom 2019-10-12 14:54:05 -07:00
Seth Morabito d466a21b3e Fix README screenshots (again) 2018-07-09 14:00:32 -07:00
Seth Morabito 31d1f7c5e1 Update screenshots 2018-03-01 19:21:56 -08:00
Seth Morabito 247f2ba2fc Update screenshots 2018-03-01 19:21:21 -08:00
Seth Morabito 922810b34b Update POM for 1.3.0 2018-02-25 11:46:02 -08:00
Seth Morabito 9d6791330d Update README 2018-02-25 11:45:16 -08:00
Seth Morabito 73c474d606 POM cleanup 2018-02-04 11:49:26 -08:00
Chris Cureau 71905fdb19 Merge pull request #23 from ccureau/master
Integrate jterminal
2017-09-12 18:23:55 -05:00
ccureau cb918c9906 Remove unnecessary package-info files 2017-08-30 10:40:45 -05:00
ccureau be72c2ff09 implement jterminal in source 2017-08-30 10:34:50 -05:00
ccureau 18ce120984 Add jterminal to source 2017-08-30 09:23:59 -05:00
Seth Morabito 8ffb130300 Merge pull request #21 from LIV2/master
Fix PHY/PLY Addressing mode
2017-08-23 10:47:12 -07:00
Matt Harlum 441f7349a0 Fix PHY/PLY Addressing mode 2017-06-19 11:49:46 +10:00
Seth Morabito 4f27e78940 Merge pull request #20 from LIV2/master
Add cycle counts for illegal NMOS opcodes
2017-06-06 19:47:24 -07:00
Matt Harlum 11f61f50a9 Add cycle counts for illegal NMOS opcodes 2017-06-07 12:20:21 +10:00
Seth Morabito 59f8ff1bc4 Merge pull request #19 from LIV2/master
Adds support for all 65C02 Opcodes
2017-06-06 07:10:02 -07:00
Matt Harlum a9c6d5964f * Add Support for All 65C02 Opcodes and all Rockwell/WDC opcodes except WAI/STP
* Add 65C02 Opcode tests
* All tests pass, Klaus' 6502_functional_tests pass & Klaus' 65C02_extended_opcodes_test also all pass
2017-06-06 19:59:01 +10:00
Matt Harlum faf5d22660 * Add ACIA Interrupt tests.
* Fix ACIA6850 Interrupt behavior, Interrupt should be cleared on status register read.
* Remove unneeded cpuAccess if statement from Acia6850 write that was preventing build completion
* Fix ACIA6850 Tests so they run.
2017-06-06 12:55:35 +10:00
Seth Morabito 3c3aee30a7 Merge pull request #18 from izuannazrin/master
Interrupt bit support for ACIA
2017-06-04 18:53:44 -07:00
Izuan Nazrin 92f8fe3dd9 Fixed 6850 behaviour
+ Fixed interrupt bit reset behaviour
2017-05-30 01:33:12 +08:00
Izuan Nazrin 356822df71 Fixed typo
+ Fixed typo in statusReg declaration
2017-05-30 01:14:50 +08:00