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Commit Graph

21 Commits

Author SHA1 Message Date
Seth Morabito
e2a1144c7c Update copyright, prep for 1.1.0 2014-08-11 14:16:41 -07:00
Maik Merten
004087a742 invoke setBus() on devices added to the bus 2014-07-28 18:19:52 +02:00
Maik Merten
dc7dfc4b4d code simplification 2014-07-25 21:44:43 +02:00
Maik Merten
2217f3831d slight JavaDoc fix regarding what Exception can be thrown 2014-07-25 21:27:40 +02:00
Maik Merten
52f4e9a00f enforce that the address range of devices falls within the address range of the bus. Turned out that the CPU tests instantiate memory with the last parameter as memory size, not end address (fixed now). Also make sure that the address lookup array takes the offset caused by non-zero starting addresses into account. 2014-07-25 21:24:16 +02:00
Maik Merten
d7f8045b61 rework bus. Don't throw an Exception any more with overlapping device addresses - this is normal for some machines. Introduce the concept of priorities to ensure that device overlap in the correct order. 2014-07-25 19:32:00 +02:00
Maik Merten
44151f3a9c have the Bus support devices with overlapping memory regions 2014-07-17 21:43:46 +02:00
Seth Morabito
b6cc480919 Add NMI flag to CPU 2014-01-25 20:02:17 -08:00
Seth Morabito
0c5035fc56 Add interrupt flag to CPU 2014-01-25 19:53:53 -08:00
Seth Morabito
4a510b635e README updates, CRTC tests.
- Added more CRTC information to the README file.
- Added unit tests for the CRTC.
- Implemented register read for cursor position in the CRTC.
- Bundling a new version of jterminal that has correct backspace
  behavior.
2013-12-29 18:18:48 -08:00
Max840
bc6b93e3fe Optimization of Bus.isComplete() 2013-12-26 17:25:52 -05:00
Seth Morabito
da8250778e Bug Fixes and Copyright Date Change
The simulator now passes Klaus Dormann's 6502 Functional Test suite for
the first time.

Bug Fixes:

- PHP was not correctly setting the Break bit on the stack copy of the
  processor status, so subsequent PLA's would not set the Break status
  flag.

- The CPU had swapped NMI and IRQ reset vectors, so RTI was failing.

- BRK was pushing PC + 2 onto the stack, instead of PC + 1

- (Zero Page,X) addressing mode did not correctly wrap on zero page
  boundaries.

- The instruction table used for disassembly had addressing modes
  of LDA $B9 and $BD reversed. This did not affect behavior, only
  disassembly of these instructions.

Other:

- Updated copyright date for 2013.

- Started migrating old JUnit 3 style tests to JUnit 4 annotations.
2013-01-01 17:03:16 -08:00
Seth Morabito
933b09827a Cleanup and Javadoc 2012-12-30 11:27:10 -08:00
Seth Morabito
2ebdd254b3 Work In Progress: CPU behavior, UI changes
This is something of a "Work in Progress" checkpoint of several features
that are all half baked:

1. Allow loading of 16KB ROM files at address $C000 at run-time, not
   just at startup. See the "Load ROM..." File menu item.

2. Introduces the notion of "CPU Behaviors", so the core 6502 CPU
   implementation can match the behavior of either an early NMOS 6502, late
   NMOS 6502, or CMOS 65C02. Very little of this is actually implemented so
   far.

3. Adds a completely bogus implementation of the 6522 VIA (it
   does absolutely nothing right now).

4. Changes the address of the ACIA in the simulated system to match a
   real hardware implementation I put together.
2012-11-25 22:49:21 -08:00
Seth Morabito
795ccfde5d CPU bug fixes and Simulator enhancements.
Bug Fixes:

- Fixed several bugs in the CPU that caused processor status flags to
  be set incorrectly.  Instructions affected were: STA, STX, STY, CMP,
  CPX, CPY, BIT.

- Made some internal-use-only methods on the CPU class private.

- Fixed incorrect disassembly of (Indirect,X) and (Indirect),Y
  instructions. Although this didn't affect behavior, it certainly
  caused me some confusion in debugging.

- Added missing "BCS" instruction to instruction table.

Enhancements:

- Now includes a full version of Lee Davison's Enhanced 6502 BASIC
  bundled as source code and a ROM image. Get that REAL COMPUTER
  EXPERIENCE!(tm)

- If a file named "rom.bin" exists in the same directory where the
  simulator is executed, it will be loaded at addresses $d000-$ffff.

- Gave the CPU an idle loop to make simulated timing a little more
  realistic (but this is still an area needing major improvement)

- Changed the CPU's toString() method to give better debugging output.

- Added a small typeahead buffer to the Console.

- Better exception messaging.

Misc:

- Bumped version to 0.5, updated README.
2012-10-21 20:05:05 -07:00
Seth Morabito
a1d07bf223 First work toward moving to a Swing UI for the simulator. 2012-04-22 20:49:18 -07:00
Seth Morabito
e157f4a972 More cleanup of the monitor. Added binary file load command. 2010-01-16 21:17:37 -08:00
Seth J. Morabito
ac88786df7 - Continued refactoring of address decoding.
- Device read and write may now throw MemoryAccessException, and appropriate
  throws clauses have been added throughout the code.
2010-01-09 16:53:04 -08:00
Seth J. Morabito
8bcd8a4a75 Whitespace and indentation canonicalization. That's what I get for using two editors. 2008-12-27 21:09:47 -08:00
Seth J. Morabito
1bd59b048b Some API changes, lots of test changes. 2008-12-14 23:43:04 -08:00
Seth Morabito
3f74489757 Renamed project to "Symon". 2008-12-13 14:59:22 -08:00