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https://github.com/sethm/symon.git
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faf5d22660
* Fix ACIA6850 Interrupt behavior, Interrupt should be cleared on status register read. * Remove unneeded cpuAccess if statement from Acia6850 write that was preventing build completion * Fix ACIA6850 Tests so they run.
254 lines
6.2 KiB
Java
254 lines
6.2 KiB
Java
package com.loomcom.symon;
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import com.loomcom.symon.devices.Acia;
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import com.loomcom.symon.devices.Acia6850;
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import org.junit.Test;
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import static org.junit.Assert.assertEquals;
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import static org.mockito.Mockito.*;
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public class Acia6850Test {
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private final static int CMD_STAT_REG = 0;
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private final static int DATA_REG = 1;
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private Acia newAcia() throws Exception {
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Acia acia = new Acia6850(0x0000);
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// by default rate is limited, have it unlimited for testing
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acia.setBaudRate(0);
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return acia;
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}
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@Test
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public void shouldTriggerInterruptOnRxFullIfRxIrqEnabled() throws Exception {
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Bus mockBus = mock(Bus.class);
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Acia acia = newAcia();
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acia.setBus(mockBus);
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// Disable TX IRQ, Enable RX IRQ
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acia.write(CMD_STAT_REG, 0x80);
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acia.rxWrite('a');
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verify(mockBus, atLeastOnce()).assertIrq();
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}
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@Test
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public void shouldNotTriggerInterruptOnRxFullIfRxIrqNotEnabled() throws Exception {
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Bus mockBus = mock(Bus.class);
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Acia acia = newAcia();
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acia.setBus(mockBus);
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// Disable TX IRQ, Disable RX IRQ
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acia.write(CMD_STAT_REG, 0x00);
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acia.rxWrite('a');
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verify(mockBus, never()).assertIrq();
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}
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@Test
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public void shouldTriggerInterruptOnTxEmptyIfTxIrqEnabled() throws Exception {
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Bus mockBus = mock(Bus.class);
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Acia acia = newAcia();
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acia.setBus(mockBus);
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// Enable TX IRQ, Disable RX IRQ
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acia.write(CMD_STAT_REG, 0x20);
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// Write data
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acia.write(1, 'a');
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verify(mockBus, never()).assertIrq();
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// Transmission should cause IRQ
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acia.txRead(true);
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verify(mockBus, atLeastOnce()).assertIrq();
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}
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@Test
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public void shouldNotTriggerInterruptOnTxEmptyIfTxIrqNotEnabled() throws Exception {
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Bus mockBus = mock(Bus.class);
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Acia acia = newAcia();
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acia.setBus(mockBus);
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// Disable TX IRQ, Disable RX IRQ
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acia.write(CMD_STAT_REG, 0x02);
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// Write data
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acia.write(DATA_REG, 'a');
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// Transmission should cause IRQ
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acia.txRead(true);
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verify(mockBus, never()).assertIrq();
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}
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@Test
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public void shouldTriggerInterruptFlagOnRxFullIfRxIrqEnabled() throws Exception {
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Bus mockBus = mock(Bus.class);
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Acia acia = newAcia();
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acia.setBus(mockBus);
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// Disable TX IRQ, Enable RX IRQ
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acia.write(CMD_STAT_REG, 0x80);
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acia.rxWrite('a');
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// Receive should cause IRQ flag to be set
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assertEquals(0x80, acia.read(0x0000, true) & 0x80);
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}
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@Test
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public void shouldNotTriggerInterruptFlagOnRxFullIfRxIrqNotEnabled() throws Exception {
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Bus mockBus = mock(Bus.class);
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Acia acia = newAcia();
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acia.setBus(mockBus);
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// Disable TX IRQ, Disable RX IRQ
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acia.write(CMD_STAT_REG, 0x00);
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acia.rxWrite('a');
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// Receive should not cause IRQ flag to be set
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assertEquals(0x00, acia.read(0x0000, true) & 0x80);
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}
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@Test
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public void shouldTriggerInterruptFlagOnTxEmptyIfTxIrqEnabled() throws Exception {
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Bus mockBus = mock(Bus.class);
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Acia acia = newAcia();
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acia.setBus(mockBus);
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// Enable TX IRQ, Disable RX IRQ
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acia.write(CMD_STAT_REG, 0x20);
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// Write data
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acia.write(1, 'a');
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verify(mockBus, never()).assertIrq();
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// Transmission should cause IRQ flag to be set
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acia.txRead(true);
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assertEquals(0x80, acia.read(0x0000, true) & 0x80);
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}
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@Test
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public void shouldNotTriggerInterruptFlagOnTxEmptyIfTxIrqNotEnabled() throws Exception {
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Bus mockBus = mock(Bus.class);
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Acia acia = newAcia();
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acia.setBus(mockBus);
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// Disable TX IRQ, Disable RX IRQ
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acia.write(CMD_STAT_REG, 0x02);
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// Write data
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acia.write(DATA_REG, 'a');
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// Transmission should not cause IRQ flag to be set
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acia.txRead(true);
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assertEquals(0x00, acia.read(0x0000, true) & 0x80);
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}
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@Test
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public void newAciaShouldHaveTxEmptyStatus() throws Exception {
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Acia acia = newAcia();
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assertEquals(0x02, acia.read(CMD_STAT_REG, true) & 0x02);
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}
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@Test
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public void aciaShouldHaveTxEmptyStatusOffIfTxHasData() throws Exception {
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Acia acia = newAcia();
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acia.txWrite('a');
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assertEquals(0x00, acia.read(CMD_STAT_REG, true) & 0x02);
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}
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@Test
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public void aciaShouldHaveRxFullStatusOnIfRxHasData() throws Exception {
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Acia acia = newAcia();
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acia.rxWrite('a');
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assertEquals(0x01, acia.read(CMD_STAT_REG, true) & 0x01);
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}
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@Test
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public void aciaShouldHaveTxEmptyAndRxFullStatusOffIfRxAndTxHaveData()
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throws Exception {
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Acia acia = newAcia();
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acia.rxWrite('a');
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acia.txWrite('b');
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assertEquals(0x01, acia.read(CMD_STAT_REG, true) & 0x03);
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}
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@Test
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public void aciaShouldOverrunAndReadShouldReset()
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throws Exception {
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Acia acia = newAcia();
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// overrun ACIA
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acia.rxWrite('a');
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acia.rxWrite('b');
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assertEquals(0x20, acia.read(CMD_STAT_REG, true) & 0x20);
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// read should reset
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acia.rxRead(true);
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assertEquals(0x00, acia.read(CMD_STAT_REG, true) & 0x20);
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}
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@Test
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public void aciaShouldOverrunAndMemoryWindowReadShouldNotReset()
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throws Exception {
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Acia acia = newAcia();
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// overrun ACIA
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acia.rxWrite('a');
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acia.rxWrite('b');
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assertEquals(0x20, acia.read(CMD_STAT_REG, true) & 0x20);
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// memory window read should not reset
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acia.rxRead(false);
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assertEquals(0x20, acia.read(CMD_STAT_REG, true) & 0x20);
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}
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@Test
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public void readingBuffersShouldResetStatus()
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throws Exception {
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Acia acia = newAcia();
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assertEquals(0x00, acia.read(CMD_STAT_REG, true) & 0x01);
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acia.rxWrite('a');
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assertEquals(0x01, acia.read(CMD_STAT_REG, true) & 0x01);
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acia.rxRead(true);
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assertEquals(0x00, acia.read(CMD_STAT_REG, true) & 0x01);
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}
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}
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