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Fixed for Z80.
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Jeff Tranter
parent
f41e99dfa7
commit
c5302b630a
2
8051.py
2
8051.py
@ -168,7 +168,7 @@ opcodeTable = {
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0x20 : [ 3, "jb", "bit,offset" ],
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0x21 : [ 2, "ajmp", "addr11" ],
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0x22 : [ 1, "ret", "" ],
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0x22 : [ 1, "ret", "" ],
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0x23 : [ 1, "rl", "a" ],
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0x24 : [ 2, "add", "a,immed" ],
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0x25 : [ 2, "add", "a,direct" ],
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124
z80.py
124
z80.py
@ -217,7 +217,7 @@ addressModeTable = {
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"indhl,e" : "(hl),e",
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"indhl,h" : "(hl),h",
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"indhl,l" : "(hl),l",
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"indhl,n" : "(hl),(${0:02X})",
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"indhl,n" : "(hl),${0:02X}",
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"indix+d" : "(ix+${0:02X})",
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"indix+d,a" : "(ix+${0:02X}),a",
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"indiy+d,a" : "(iy+${0:02X}),a",
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@ -512,69 +512,69 @@ opcodeTable = {
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0xbe : [ 1, "cp", "indhl" ],
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0xbf : [ 1, "cp", "a" ],
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0xc0 : [ 1, "ret", "nz" ],
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0xc1 : [ 1, "pop", "bc" ],
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0xc2 : [ 3, "jp", "nz,nn" ],
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0xc3 : [ 3, "jp", "nn" ],
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0xc4 : [ 3, "call","nz,nn" ],
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0xc5 : [ 1, "push","bc" ],
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0xc6 : [ 2, "ada", "a,n" ],
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0xc7 : [ 1, "rst", "00" ],
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0xc8 : [ 1, "ret", "z" ],
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0xc9 : [ 1, "ret", "implied" ],
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0xca : [ 3, "jp", "z,nn" ],
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0xcc : [ 3, "call","z,nn" ],
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0xcd : [ 3, "call", "nn" ],
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0xce : [ 2, "adc", "a,n" ],
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0xcf : [ 1, "rst", "08" ],
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0xc0 : [ 1, "ret", "nz" ],
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0xc1 : [ 1, "pop", "bc" ],
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0xc2 : [ 3, "jp", "nz,nn" ],
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0xc3 : [ 3, "jp", "nn" ],
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0xc4 : [ 3, "call","nz,nn" ],
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0xc5 : [ 1, "push","bc" ],
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0xc6 : [ 2, "add", "a,n" ],
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0xc7 : [ 1, "rst", "00" ],
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0xc8 : [ 1, "ret", "z" ],
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0xc9 : [ 1, "ret", "implied" ],
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0xca : [ 3, "jp", "z,nn" ],
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0xcc : [ 3, "call","z,nn" ],
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0xcd : [ 3, "call", "nn" ],
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0xce : [ 2, "adc", "a,n" ],
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0xcf : [ 1, "rst", "08" ],
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0xd0 : [ 1, "ret", "nc" ],
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0xd1 : [ 1, "pop", "de" ],
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0xd2 : [ 3, "jp", "nc,nn" ],
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0xd0 : [ 1, "ret", "nc" ],
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0xd1 : [ 1, "pop", "de" ],
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0xd2 : [ 3, "jp", "nc,nn" ],
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0xd3 : [ 2, "out", "indn,a" ],
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0xd4 : [ 3, "call", "nc,nn" ],
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0xd5 : [ 1, "push", "de" ],
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0xd6 : [ 2, "sub", "n" ],
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0xd7 : [ 1, "rst", "10" ],
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0xd8 : [ 1, "ret", "c" ],
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0xd9 : [ 1, "exx", "implied" ],
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0xda : [ 3, "jp", "c,nn" ],
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0xd4 : [ 3, "call", "nc,nn" ],
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0xd5 : [ 1, "push", "de" ],
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0xd6 : [ 2, "sub", "n" ],
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0xd7 : [ 1, "rst", "10" ],
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0xd8 : [ 1, "ret", "c" ],
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0xd9 : [ 1, "exx", "implied" ],
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0xda : [ 3, "jp", "c,nn" ],
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0xdb : [ 2, "in", "a,indn" ],
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0xdc : [ 3, "call", "c,nn" ],
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0xde : [ 2, "sbc", "a,n" ],
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0xdf : [ 1, "rst", "18" ],
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0xdc : [ 3, "call", "c,nn" ],
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0xde : [ 2, "sbc", "a,n" ],
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0xdf : [ 1, "rst", "18" ],
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0xe0 : [ 1, "ret", "po" ],
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0xe1 : [ 1, "pop", "hl" ],
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0xe2 : [ 3, "jp", "po,nn" ],
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0xe3 : [ 1, "ex", "indsp,hl" ],
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0xe4 : [ 3, "call", "po,nn" ],
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0xe5 : [ 1, "push", "hl" ],
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0xe6 : [ 2, "and", "n" ],
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0xe7 : [ 1, "rst", "20" ],
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0xe8 : [ 1, "ret", "pe" ],
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0xe9 : [ 1, "jp", "indhl" ],
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0xea : [ 3, "jp", "pe,nn" ],
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0xeb : [ 1, "ex", "de,hl" ],
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0xec : [ 3, "call", "pe,nn" ],
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0xee : [ 2, "xor", "n" ],
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0xef : [ 1, "rst", "28" ],
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0xe0 : [ 1, "ret", "po" ],
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0xe1 : [ 1, "pop", "hl" ],
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0xe2 : [ 3, "jp", "po,nn" ],
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0xe3 : [ 1, "ex", "indsp,hl" ],
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0xe4 : [ 3, "call", "po,nn" ],
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0xe5 : [ 1, "push", "hl" ],
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0xe6 : [ 2, "and", "n" ],
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0xe7 : [ 1, "rst", "20" ],
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0xe8 : [ 1, "ret", "pe" ],
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0xe9 : [ 1, "jp", "indhl" ],
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0xea : [ 3, "jp", "pe,nn" ],
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0xeb : [ 1, "ex", "de,hl" ],
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0xec : [ 3, "call", "pe,nn" ],
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0xee : [ 2, "xor", "n" ],
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0xef : [ 1, "rst", "28" ],
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0xf0 : [ 1, "ret", "p" ],
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0xf1 : [ 1, "pop", "af" ],
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0xf2 : [ 3, "jp", "p,nn" ],
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0xf3 : [ 1, "di", "implied" ],
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0xf4 : [ 3, "call", "p,nn" ],
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0xf5 : [ 1, "push", "af" ],
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0xf6 : [ 2, "or", "n" ],
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0xf7 : [ 1, "rst", "30" ],
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0xf8 : [ 1, "ret", "m" ],
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0xf9 : [ 1, "ld", "sp,hl" ],
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0xfa : [ 3, "jp", "m,nn" ],
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0xfb : [ 1, "ei", "implied" ],
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0xfc : [ 3, "call", "m,nn" ],
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0xfe : [ 2, "cp", "n" ],
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0xff : [ 1, "rst", "38" ],
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0xf0 : [ 1, "ret", "p" ],
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0xf1 : [ 1, "pop", "af" ],
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0xf2 : [ 3, "jp", "p,nn" ],
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0xf3 : [ 1, "di", "implied" ],
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0xf4 : [ 3, "call", "p,nn" ],
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0xf5 : [ 1, "push", "af" ],
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0xf6 : [ 2, "or", "n" ],
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0xf7 : [ 1, "rst", "30" ],
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0xf8 : [ 1, "ret", "m" ],
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0xf9 : [ 1, "ld", "sp,hl" ],
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0xfa : [ 3, "jp", "m,nn" ],
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0xfb : [ 1, "ei", "implied" ],
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0xfc : [ 3, "call", "m,nn" ],
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0xfe : [ 2, "cp", "n" ],
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0xff : [ 1, "rst", "38" ],
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# Multibyte instructions
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@ -755,7 +755,7 @@ opcodeTable = {
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0xcbac : [ 2, "res", "5,h" ],
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0xcbad : [ 2, "res", "5,l" ],
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0xcbae : [ 2, "res", "5,indhl" ],
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0xcbaf : [ 2, "res", "a,b" ],
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0xcbaf : [ 2, "res", "5,a" ],
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0xcbb0 : [ 2, "res", "6,b" ],
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0xcbb1 : [ 2, "res", "6,c" ],
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@ -998,10 +998,10 @@ def extra_opcodes(addr_table, op_table):
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# groups of 8, expand to full 256
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mnemonics_8 = ['rlc', 'rrc', 'rl', 'rr', 'sla', 'sra', 'sll', 'sr1'] + ['bit'] * 8 + ['res'] * 8 + ['set'] * 8
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mnemonics = [m for mnemonic in mnemonics_8 for m in [mnemonic]*8]
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# create all 256 addressing modes, in groups of 64
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addrmodes = ['indi%s+d' + a for a in [',b', ',c', ',d', ',e', ',h', ',l', '', ',a']] * 8 + [f % d for d in range(8) for f in ['%d,indi%%s+d'] * 8] + [f % d for d in range(8) for f in ['%d,indi%%s+d' + a for a in [',b', ',c', ',d', ',e', ',h', ',l', '', ',a']]] * 2
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for fourth_byte, (instruction, addrmode) in enumerate(zip(mnemonics, addrmodes)):
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opcode = (first_byte << 24) + (0xcb << 16) + fourth_byte
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op_table[opcode] = [ 4, instruction, addrmode % x_or_y, z80bit ]
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