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v6502cpp
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remove old index-based code

This commit is contained in:
Christopher Mosher 2013-12-13 23:15:55 -05:00
parent 70d040a3aa
commit fd7bd7a4a2
5 changed files with 1 additions and 930 deletions
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2
Makefile
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@ -1,6 +1,6 @@
CXXFLAGS=-g -std=c++11
SRCS = v6502.cpp cpu.cpp nodes.cpp trans.cpp SegmentCache.cpp TransNetwork.cpp Trace.cpp Circuit.cpp StateCalculator.cpp Cpu6502.cpp
SRCS = v6502.cpp trans.cpp SegmentCache.cpp TransNetwork.cpp Trace.cpp Circuit.cpp StateCalculator.cpp Cpu6502.cpp
OBJS = $(SRCS:.cpp=.o)
DEPS = $(SRCS:.cpp=.d)

616
cpu.cpp
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#include "cpu.h"
#include <algorithm>
#include <utility>
#include <iterator>
#include <string>
#include <vector>
#include <set>
#include <map>
#include <stdlib.h>
#include <iostream>
#include <iomanip>
#include <fstream>
#include "nodes.h"
#include "addressbus.h"
#include "SegmentCache.h"
#define TRACEREG 1
//#define TRACESEG 1
//#define TRACEMEM 1
#ifdef TRACEREG
#define dumpRegs() dumpRegisters()
#else
#define dumpRegs()
#endif
#ifdef TRACESEG
#define dumpSegs() dumpSegments()
#else
#define dumpSegs()
#endif
static void pHex(const unsigned char x) {
std::cout << std::setw(2) << std::setfill('0') << std::hex << (unsigned long) x << std::dec;
}
static void pHexw(const unsigned short x) {
std::cout << std::setw(4) << std::setfill('0') << std::hex << (unsigned long) x << std::dec;
}
static nodes* n;
static std::map<int,std::string> map_i_seg;
static int get_i_seg(const std::string& seg, std::map<std::string,int>& map_seg_i) {
static int i_segin(0);
int i_seg = -1;
if (map_seg_i.find(seg) == map_seg_i.end()) {
i_seg = i_segin++;
map_seg_i[seg] = i_seg;
map_i_seg[i_seg] = seg;
} else {
i_seg = map_seg_i[seg];
}
return i_seg;
}
CPU::CPU(AddressBus& addressBus) :
addressBus(addressBus) {
std::cout << "reading transistors";
std::ifstream if_trans("transistors");
if (!if_trans.is_open()) {
std::cerr << "error opening file: transistors" << std::endl;
exit(EXIT_FAILURE);
}
std::string seg_c1, seg_gate, seg_c2;
if_trans >> seg_c1 >> seg_gate >> seg_c2;
while (if_trans.good()) {
std::cout << ".";
trn t;
t.on = false;
t.c1 = get_i_seg(seg_c1,map_seg_i);
t.gate = get_i_seg(seg_gate,map_seg_i);
t.c2 = get_i_seg(seg_c2,map_seg_i);
trns.push_back(t);
if_trans >> seg_c1 >> seg_gate >> seg_c2;
}
std::cout << std::endl << "read " << map_seg_i.size() << " segments, " << trns.size() << " transistors" << std::endl;
for (int i_seg = 0; i_seg < map_seg_i.size(); ++i_seg)
{
const std::string id_seg = map_i_seg[i_seg];
seg s;
s.id = id_seg;
s.pullup = id_seg[0] == '+';
s.pulldown = false;
s.on = false;
segs.push_back(s);
}
n = new nodes(map_seg_i);
for (int i = 0; i != trns.size(); ++i) {
trn& t = trns[i];
// if (t.c1 == n->VSS) {
// t.c1 = t.c2;
// t.c2 = n->VSS;
// } else if (t.c1 == n->VCC) {
// t.c1 = t.c2;
// t.c2 = n->VCC;
// }
segs[t.gate].gates.push_back(i);
segs[t.c1].c1c2s.push_back(i);
segs[t.c2].c1c2s.push_back(i);
}
}
CPU::~CPU() {
}
void CPU::powerOn() {
std::cout << "initial state" << std::endl;
dumpRegs();
dumpSegs();
/*
* Since we use segs[CLK0].on as our own
* temporary variable (see "step" method), we
* need to initialize it here, to "phase one".
*/
segs[n->CLK0].on = true;
std::cout << "setting input pins..." << std::endl;
initPins();
std::cout << "initial full calculation..." << std::endl;
recalcAll();
dumpRegs();
dumpSegs();
}
void CPU::initPins() {
// set voltage supply and ground.
setSeg(n->VCC, true);
setSeg(n->VSS, false);
// don't do the set-overflow overriding functionality
setSeg(n->SO, false);
// ready to run (i.e., do not do single-stepping of instructions)
setSeg(n->RDY, true);
// pull up to indicate that we are not interrupting now
setSeg(n->IRQ, true);
setSeg(n->NMI, true);
/*
* RES_BAR pin means "not resetting". Since it is a negated pin, pulling it low means "resetting"
* and pulling it high means "not resetting" or equivalently "running".
*/
/*
* RES_BAR false: resetting now (i.e., in power-up now; pull high to begin normal operation)
* We want to hold RES_BAR low for a while, indicating power-up phase during which the
* CPU does not start up normal operations yet. The caller can set RES_BAR high (by calling
* reset) whenever he is ready to start the CPU running.
*/
setSeg(n->RES, false);
}
void CPU::reset() {
setSeg(n->RES, true);
recalc(n->RES);
}
void CPU::tick() {
step();
step();
}
void CPU::step() {
/*
* We cheat a little bit here: instead of requiring the
* caller to toggle clock-zero pin, we let him just call
* "step" and *we* keep track of which phase we are in.
* To do this, we just use the CLK0 segment value (as
* a kind of temporary variable), and just toggle it in
* order to know which phase we are going into.
*
* The real 6502, of course, does not do this.
*/
const bool nextPhase = !segs[n->CLK0].on;
clock(nextPhase);
// database read/write happens during Clock Phase 2 (only)
if (segs[n->CLK2OUT].on) {
rw();
}
dumpRegs();
dumpSegs();
}
void CPU::clock(bool phase) {
setSeg(n->CLK0, phase);
recalc(n->CLK0);
}
void CPU::rw() {
readBus();
std::set<int> s;
addDataToRecalc(s);
recalc(s);
writeBus();
}
void CPU::readBus() {
if (segs[n->RW].on) {
setDataSegs(mRead(rAddr()));
}
}
void CPU::writeBus() {
if (!segs[n->RW].on) {
mWrite(rAddr(), rData());
}
}
void CPU::setDataSegs(const unsigned char data) {
unsigned char x = data;
setSeg(n->DB0, x & 1);
x >>= 1;
setSeg(n->DB1, x & 1);
x >>= 1;
setSeg(n->DB2, x & 1);
x >>= 1;
setSeg(n->DB3, x & 1);
x >>= 1;
setSeg(n->DB4, x & 1);
x >>= 1;
setSeg(n->DB5, x & 1);
x >>= 1;
setSeg(n->DB6, x & 1);
x >>= 1;
setSeg(n->DB7, x & 1);
}
void CPU::addDataToRecalc(std::set<int>& s) {
s.insert(n->DB0);
s.insert(n->DB1);
s.insert(n->DB2);
s.insert(n->DB3);
s.insert(n->DB4);
s.insert(n->DB5);
s.insert(n->DB6);
s.insert(n->DB7);
}
unsigned char CPU::mRead(unsigned short addr) {
const unsigned char x = this->addressBus.read(addr);
#ifdef TRACEMEM
std::cout << "-------------------------------------------------- ";
pHex(x);
std::cout << "<";
pHexw(addr);
std::cout << std::endl;
#endif
return x;
}
void CPU::mWrite(unsigned short addr, unsigned char data) {
this->addressBus.write(addr, data);
#ifdef TRACEMEM
std::cout << "-------------------------------------------------- ";
pHex(data);
std::cout << ">";
pHexw(addr);
std::cout << std::endl;
#endif
}
void CPU::setSeg(const int iSeg, const bool up) {
seg& s = segs[iSeg];
s.pullup = up;
s.pulldown = !up;
}
unsigned char CPU::rData() {
return readByte(n->DB7, n->DB6, n->DB5, n->DB4, n->DB3, n->DB2, n->DB1, n->DB0);
}
unsigned short CPU::rAddr() {
return readWord(n->AB15, n->AB14, n->AB13, n->AB12, n->AB11, n->AB10, n->AB9, n->AB8, n->AB7, n->AB6, n->AB5, n->AB4, n->AB3, n->AB2, n->AB1, n->AB0);
}
unsigned char CPU::rA() {
return readByte(n->A7, n->A6, n->A5, n->A4, n->A3, n->A2, n->A1, n->A0);
}
unsigned char CPU::rX() {
return readByte(n->X7, n->X6, n->X5, n->X4, n->X3, n->X2, n->X1, n->X0);
}
unsigned char CPU::rY() {
return readByte(n->Y7, n->Y6, n->Y5, n->Y4, n->Y3, n->Y2, n->Y1, n->Y0);
}
unsigned char CPU::rS() {
return readByte(n->S7, n->S6, n->S5, n->S4, n->S3, n->S2, n->S1, n->S0);
}
unsigned short CPU::rPC() {
return readWord(n->PCH7, n->PCH6, n->PCH5, n->PCH4, n->PCH3, n->PCH2, n->PCH1, n->PCH0, n->PCL7, n->PCL6, n->PCL5, n->PCL4, n->PCL3, n->PCL2, n->PCL1, n->PCL0);
}
unsigned char CPU::readByte(unsigned int b7, unsigned int b6, unsigned int b5, unsigned int b4, unsigned int b3, unsigned int b2, unsigned int b1, unsigned int b0) {
return
segs[b7].on << 7 |
segs[b6].on << 6 |
segs[b5].on << 5 |
segs[b4].on << 4 |
segs[b3].on << 3 |
segs[b2].on << 2 |
segs[b1].on << 1 |
segs[b0].on;
}
unsigned short CPU::readWord(unsigned int b15, unsigned int b14, unsigned int b13, unsigned int b12, unsigned int b11, unsigned int b10, unsigned int b9, unsigned int b8, unsigned int b7, unsigned int b6, unsigned int b5, unsigned int b4, unsigned int b3, unsigned int b2, unsigned int b1, unsigned int b0) {
return
segs[b15].on << 15 |
segs[b14].on << 14 |
segs[b13].on << 13 |
segs[b12].on << 12 |
segs[b11].on << 11 |
segs[b10].on << 10 |
segs[b9].on << 9 |
segs[b8].on << 8 |
segs[b7].on << 7 |
segs[b6].on << 6 |
segs[b5].on << 5 |
segs[b4].on << 4 |
segs[b3].on << 3 |
segs[b2].on << 2 |
segs[b1].on << 1 |
segs[b0].on;
}
void CPU::recalcAll() {
std::set<int> riSeg;
for (int iSeg = 0; iSeg < segs.size(); ++iSeg) {
addRecalc(iSeg,riSeg);
}
recalc(riSeg);
}
void CPU::recalc(const int iSeg) {
std::set<int> riSeg;
addRecalc(iSeg,riSeg);
recalc(riSeg);
}
/*
* Recalculate segment states (on/off), based on the fact that the segments
* in riSeg have just changed state. Keep track of which other segments are
* affected, and repeat the process on those segments. Repeat until no more
* segments change state.
*/
void CPU::recalc(const std::set<int>& riSeg) {
std::set<int> riSegRecalc(riSeg);
for (int sane = 0; sane < 100; ++sane) {
if (!riSegRecalc.size()) {
return;
}
std::set<int> riSegChanged;
for (std::set<int>::const_iterator iSegRecalc = riSegRecalc.begin(); iSegRecalc != riSegRecalc.end(); ++iSegRecalc) {
recalcNode(*iSegRecalc, riSegChanged);
}
riSegRecalc = riSegChanged;
}
std::cerr << "ERROR: reached maximum iteration limit while recalculating CPU state" << std::endl;
}
/*
* Gets group of segments currently electrically connected to iSeg,
* gets what their group value is (or should be), goes through all
* those segments and sets their "on" value. For all connected gates,
* turn on/off, and indicate that the segments connected to those
* transistors' source and drain legs have changed, by adding them
* to riSegChanged.
*/
void CPU::recalcNode(const int iSeg, std::set<int>& riSegChanged) {
if (!(iSeg == n->VCC || iSeg == n->VSS)) {
std::set<int> riSegGroup;
addToGroup(iSeg, riSegGroup);
const bool groupOn = getGroupValue(riSegGroup);
for (std::set<int>::iterator iSegGroup = riSegGroup.begin(); iSegGroup != riSegGroup.end(); ++iSegGroup) {
seg& s = segs[*iSegGroup];
if (s.on != groupOn) {
s.on = groupOn;
for (std::vector<int>::iterator iTrnGate = s.gates.begin(); iTrnGate != s.gates.end(); ++iTrnGate) {
setTrans(trns[*iTrnGate], groupOn, riSegChanged);
}
}
}
}
}
void CPU::setTrans(trn& t, const bool on, std::set<int>& riSeg) {
if (t.on != on) {
t.on = on;
addRecalc(t.c1, riSeg);
addRecalc(t.c2, riSeg);
}
}
void CPU::addRecalc(const int iSeg, std::set<int>& riSeg) {
if (!(iSeg == n->VCC || iSeg == n->VSS)) {
riSeg.insert(iSeg);
}
}
/*
* Adds segment iSeg, and all segments electrically connected to it, to riSeg.
* This happens recursively, but we don't recurse past ground or voltage supply.
*/
void CPU::addToGroup(int iSeg, std::set<int>& riSeg) {
const std::pair<std::set<int>::iterator, bool> ret = riSeg.insert(iSeg);
if (!ret.second) {
return;
}
if (iSeg == n->VCC || iSeg == n->VSS) {
return;
}
/*
* For every ON transistor this seg is connected to via a leg (source or
* drain), add the seg that's connected to the OTHER leg of the transistor.
* This is a RECURSIVE addition.
*
* Also note that, upon system startup, all transistors are initialized
* to OFF, so at the time of the very first recalcAll call, *no* other
* segments will be added here.
*/
const seg& s = segs[iSeg];
for (std::vector<int>::const_iterator iTrn = s.c1c2s.begin(); iTrn != s.c1c2s.end(); ++iTrn) {
const trn& t = trns[*iTrn];
if (t.on) {
if (t.c1 == iSeg) {
addToGroup(t.c2, riSeg);
} else if (t.c2 == iSeg) {
addToGroup(t.c1, riSeg);
}
}
}
}
/*
* Upon system startup, this will return the "pullup" value of
* each segment (except for VCC and VSS (which will of course be
* ON and OFF respectively).
*/
bool CPU::getGroupValue(const std::set<int>& riSeg) {
/* If group contains ground, it's OFF, */
if (riSeg.find(n->VSS) != riSeg.end()) {
return false;
}
/* otherwise, if group contains voltage supply, it's ON. */
else if (riSeg.find(n->VCC) != riSeg.end()) {
return true;
}
for (std::set<int>::const_iterator iSeg = riSeg.begin(); iSeg != riSeg.end(); ++iSeg) {
const seg& s = segs[*iSeg];
if (s.pullup) {
return true;
}
if (s.pulldown) {
return false;
}
if (s.on) {
return true;
}
}
return false;
}
void CPU::dumpSegments() {
for (int i = 0; i < segs.size(); ++i) {
seg& s = segs[i];
if (s.pullup) {
std::cout << "U";
} else if (s.pulldown) {
std::cout << "D";
} else {
std::cout << "f";
}
if (s.on) {
std::cout << "+";
} else {
std::cout << "-";
}
}
std::cout << std::endl;
}
void CPU::dumpRegisters() {
std::cout << "A";
pHex(rA());
std::cout << " X";
pHex(rX());
std::cout << " Y";
pHex(rY());
std::cout << " ";
std::cout << (segs[n->P7].on ? "N" : "n");
std::cout << (segs[n->P6].on ? "V" : "v");
std::cout << ".";
std::cout << (segs[n->P4].on ? "B" : "b");
std::cout << (segs[n->P3].on ? "D" : "d");
std::cout << (segs[n->P2].on ? "I" : "i");
std::cout << (segs[n->P1].on ? "Z" : "z");
std::cout << (segs[n->P0].on ? "C" : "c");
std::cout << " S";
pHex(rS());
std::cout << " PC";
pHexw(rPC());
if (segs[n->CLK1OUT].on) {
std::cout << " PH1 ";
}
if (segs[n->CLK2OUT].on) {
std::cout << " PH2";
if (segs[n->RW].on) {
std::cout << " R";
} else {
std::cout << " W";
}
}
if (!(segs[n->CLK1OUT].on || segs[n->CLK2OUT].on)) {
std::cout << " PH- ";
}
std::cout << " DB";
pHex(rData());
std::cout << " AB";
pHexw(rAddr());
std::cout << std::endl;
//pZP();
}

77
cpu.h
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#ifndef CPU_H
#define CPU_H
#include <string>
#include <vector>
#include <set>
#include <map>
class AddressBus;
class seg {
public:
std::string id;
bool pullup;
bool pulldown;
bool on;
std::vector<int> gates;
std::vector<int> c1c2s;
};
class trn {
public:
int gate;
int c1;
int c2;
bool on;
};
class CPU {
private:
std::map<std::string,int> map_seg_i;
std::vector<seg> segs;
std::vector<trn> trns;
AddressBus& addressBus;
void addDataToRecalc(std::set<int>& s);
void addRecalc(const int iSeg, std::set<int>& riSeg);
void setTrans(trn& t, const bool on, std::set<int>& riSeg);
unsigned char readByte(unsigned int b7, unsigned int b6, unsigned int b5, unsigned int b4, unsigned int b3, unsigned int b2, unsigned int b1, unsigned int b0);
unsigned short readWord(unsigned int b15, unsigned int b14, unsigned int b13, unsigned int b12, unsigned int b11, unsigned int b10, unsigned int b9, unsigned int b8, unsigned int b7, unsigned int b6, unsigned int b5, unsigned int b4, unsigned int b3, unsigned int b2, unsigned int b1, unsigned int b0);
unsigned char rData();
unsigned short rAddr();
unsigned char rA();
unsigned char rX();
unsigned char rY();
unsigned char rS();
unsigned short rPC();
void dumpSegments();
void dumpRegisters();
bool getGroupValue(const std::set<int>& s);
void addToGroup(int n, std::set<int>& s);
void recalcNode(int n, std::set<int>& rcl);
void recalc(const std::set<int>& s);
void recalc(int n);
void recalcAll();
void setSeg(int iseg, bool up);
void setHigh(int iseg);
void setLow(int iseg);
void setDataSegs(unsigned char data);
void readBus();
void writeBus();
unsigned char mRead(unsigned short addr);
void mWrite(unsigned short addr, unsigned char data);
void rw();
void initPins();
public:
CPU(AddressBus& addressBus);
~CPU();
void step(); /* convenience method */
void clock(bool phase);
void powerOn();
void reset();
void tick();
};
#endif

115
nodes.cpp
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#include "nodes.h"
#include <string>
#include <map>
nodes::nodes(std::map<std::string,int>& map_seg_i) {
/* power */
VCC = map_seg_i["+vcc"];
VSS = map_seg_i["-vss"];
/* inputs */
CLK0 = map_seg_i["-clk0"];
IRQ = map_seg_i["-irq"];
RES = map_seg_i["-res"];
NMI = map_seg_i["-nmi"];
RDY = map_seg_i["+rdy"];
SO = map_seg_i["+so"];
/* data bus (I/O) */
DB0 = map_seg_i["-db0"];
DB1 = map_seg_i["-db1"];
DB2 = map_seg_i["-db2"];
DB3 = map_seg_i["-db3"];
DB4 = map_seg_i["-db4"];
DB5 = map_seg_i["-db5"];
DB6 = map_seg_i["-db6"];
DB7 = map_seg_i["-db7"];
/* address bus (output) */
AB0 = map_seg_i["-ab0"];
AB1 = map_seg_i["-ab1"];
AB2 = map_seg_i["-ab2"];
AB3 = map_seg_i["-ab3"];
AB4 = map_seg_i["-ab4"];
AB5 = map_seg_i["-ab5"];
AB6 = map_seg_i["-ab6"];
AB7 = map_seg_i["-ab7"];
AB8 = map_seg_i["-ab8"];
AB9 = map_seg_i["-ab9"];
AB10 = map_seg_i["-ab10"];
AB11 = map_seg_i["-ab11"];
AB12 = map_seg_i["-ab12"];
AB13 = map_seg_i["-ab13"];
AB14 = map_seg_i["-ab14"];
AB15 = map_seg_i["-ab15"];
/* outputs */
RW = map_seg_i["-rw"];
SYNC = map_seg_i["-sync"];
CLK1OUT = map_seg_i["-clk1out"];
CLK2OUT = map_seg_i["-clk2out"];
/* internal registers */
A0 = map_seg_i["-a0"];
A1 = map_seg_i["-a1"];
A2 = map_seg_i["-a2"];
A3 = map_seg_i["-a3"];
A4 = map_seg_i["-a4"];
A5 = map_seg_i["-a5"];
A6 = map_seg_i["-a6"];
A7 = map_seg_i["-a7"];
X0 = map_seg_i["-x0"];
X1 = map_seg_i["-x1"];
X2 = map_seg_i["-x2"];
X3 = map_seg_i["-x3"];
X4 = map_seg_i["-x4"];
X5 = map_seg_i["-x5"];
X6 = map_seg_i["-x6"];
X7 = map_seg_i["-x7"];
Y0 = map_seg_i["-y0"];
Y1 = map_seg_i["-y1"];
Y2 = map_seg_i["-y2"];
Y3 = map_seg_i["-y3"];
Y4 = map_seg_i["-y4"];
Y5 = map_seg_i["-y5"];
Y6 = map_seg_i["-y6"];
Y7 = map_seg_i["-y7"];
PCL0 = map_seg_i["-pcl0"];
PCL1 = map_seg_i["-pcl1"];
PCL2 = map_seg_i["-pcl2"];
PCL3 = map_seg_i["-pcl3"];
PCL4 = map_seg_i["-pcl4"];
PCL5 = map_seg_i["-pcl5"];
PCL6 = map_seg_i["-pcl6"];
PCL7 = map_seg_i["-pcl7"];
PCH0 = map_seg_i["-pch0"];
PCH1 = map_seg_i["-pch1"];
PCH2 = map_seg_i["-pch2"];
PCH3 = map_seg_i["-pch3"];
PCH4 = map_seg_i["-pch4"];
PCH5 = map_seg_i["-pch5"];
PCH6 = map_seg_i["-pch6"];
PCH7 = map_seg_i["-pch7"];
P0 = map_seg_i["+Pout0"];
P1 = map_seg_i["+Pout1"];
P2 = map_seg_i["+Pout2"];
P3 = map_seg_i["+Pout3"];
P4 = map_seg_i["+Pout4"];
// P5 does not exist in the 6502 chip
P6 = map_seg_i["+Pout6"];
P7 = map_seg_i["+Pout7"];
S0 = map_seg_i["-s0"];
S1 = map_seg_i["-s1"];
S2 = map_seg_i["-s2"];
S3 = map_seg_i["-s3"];
S4 = map_seg_i["-s4"];
S5 = map_seg_i["-s5"];
S6 = map_seg_i["-s6"];
S7 = map_seg_i["-s7"];
}

121
nodes.h
View File

@ -1,121 +0,0 @@
#ifndef NODES_H
#define NODES_H
#include <string>
#include <map>
class nodes {
public:
/* power */
int VCC;
int VSS;
/* inputs */
int CLK0;
int IRQ;
int RES;
int NMI;
int RDY;
int SO;
/* data bus; */
int DB0;
int DB1;
int DB3;
int DB2;
int DB5;
int DB4;
int DB7;
int DB6;
/* address bus; */
int AB0;
int AB1;
int AB2;
int AB3;
int AB4;
int AB5;
int AB6;
int AB7;
int AB8;
int AB9;
int AB12;
int AB13;
int AB10;
int AB11;
int AB14;
int AB15;
/* outputs */
int RW;
int SYNC;
int CLK1OUT;
int CLK2OUT;
/* internal registers */
int A0;
int A1;
int A2;
int A3;
int A4;
int A5;
int A6;
int A7;
int X0;
int X1;
int X2;
int X3;
int X4;
int X5;
int X6;
int X7;
int Y0;
int Y1;
int Y2;
int Y3;
int Y4;
int Y5;
int Y6;
int Y7;
int PCL0;
int PCL1;
int PCL2;
int PCL3;
int PCL4;
int PCL5;
int PCL6;
int PCL7;
int PCH0;
int PCH1;
int PCH2;
int PCH3;
int PCH4;
int PCH5;
int PCH6;
int PCH7;
int P0;
int P1;
int P2;
int P3;
int P4;
int P6;
int P7;
int S0;
int S1;
int S2;
int S3;
int S4;
int S5;
int S6;
int S7;
nodes(std::map<std::string,int>& map_seg_i);
};
#endif