From 416cd57947ae9a41b0185b93b761534a702001ae Mon Sep 17 00:00:00 2001 From: Barry Silverman Date: Mon, 4 Oct 2010 15:30:25 -0400 Subject: [PATCH] Backport various fixes from expert --- index.html | 16 +- macros.js | 25 +- memtable.js | 2 +- nodenames.js | 645 ++++++++++++++++++++++++++++++++++++++++----------- wires.js | 66 ++++-- 5 files changed, 578 insertions(+), 176 deletions(-) diff --git a/index.html b/index.html index 6f2af7b..3cb640a 100644 --- a/index.html +++ b/index.html @@ -43,7 +43,7 @@ lots of RAM. If you have trouble, please check com
Hit '>' to zoom in, '<' to zoom out
-Right-click to scroll around +Left-click and drag to scroll around
Enter your own program into the array of RAM
@@ -70,19 +70,15 @@ Enter your own program into the array of RAM

x: 0
y: 0

-
Show: - (metal) - (switched diffusion) - (grounded diffusion) - (powered diffusion) - (polysilicon) - (diode) +


-Source code is available on GitHub: http://github.com/trebonian/visual6502 +Source code is available on github visual6502. +Use the online emulator and assembler from 6502asm.com +and disassembler from e-tradition.net
-In addition to this JavaScript project, see our Python-based simulator which may be easier to customize, verify, and apply to the study of long programs.
+For in-depth 6502 investigation and some more advanced features, try our Experimenter's (Beta) version.

diff --git a/macros.js b/macros.js index 2526c18..e47ba5e 100644 --- a/macros.js +++ b/macros.js @@ -274,13 +274,36 @@ function chipStatus(){ ' fetch:' + readBit('fetch') + ' clearIR:' + readBit('clearIR') + ' D1x1:' + readBit('D1x1'); - setStatus(machine1 + "
" + machine2); + setStatus(machine1 + "
" + machine2 + "
Hz: " + estimatedHz().toFixed(1)); if (loglevel>2 && ctrace) { console.log(machine1 + " " + machine2 + " " + machine3 + " " + machine4 + " " + machine5); } selectCell(ab); } +var prevHzTimeStamp=0; +var prevHzCycleCount=0; +var prevHzEstimate1=1; +var prevHzEstimate2=1; +var HzSamplingRate=10; +function estimatedHz(){ + if(cycle%HzSamplingRate!=3) + return prevHzEstimate1; + var HzTimeStamp = now(); + var HzEstimate = (cycle-prevHzCycleCount+.01)/(HzTimeStamp-prevHzTimeStamp+.01); + HzEstimate=HzEstimate*1000/2; // convert from phases per millisecond to Hz + if(HzEstimate<5) + HzSamplingRate=5; // quicker + if(HzEstimate>10) + HzSamplingRate=10; // smoother + prevHzEstimate2=prevHzEstimate1; + prevHzEstimate1=(HzEstimate+prevHzEstimate1+prevHzEstimate2)/3; // wrong way to average speeds + prevHzTimeStamp=HzTimeStamp; + prevHzCycleCount=cycle; + return prevHzEstimate1 +} + + function getMem(){ var res = Array(); for(var i=0;i<0x200;i++) res.push(mRead(i)); diff --git a/memtable.js b/memtable.js index 7f0c41c..986bf64 100644 --- a/memtable.js +++ b/memtable.js @@ -84,6 +84,6 @@ function unselectCell(){ function cellEl(n){ var r = n>>4; var c = n%16; - var e = table.children[r].children[c+1]; + var e = table.childNodes[r].childNodes[c+1]; return e; } diff --git a/nodenames.js b/nodenames.js index 78b7f6b..f8d7a1c 100644 --- a/nodenames.js +++ b/nodenames.js @@ -1,5 +1,5 @@ /* - Copyright (c) 2010 Brian Silverman, Barry Silverman + Copyright (c) 2010 Brian Silverman, Barry Silverman, Ed Spittles Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal @@ -21,89 +21,19 @@ */ var nodenames ={ +res: 159, // pads: reset +rw: 1156, // pads: read not write +db0: 1005, // pads: databus db1: 82, -db0: 1005, db3: 650, db2: 945, db5: 175, db4: 1393, db7: 1349, db6: 1591, -idl0: 116, -idl1: 576, -idl2: 1485, -idl3: 1284, -idl4: 1516, -idl5: 498, -idl6: 1537, -idl7: 529, -a1: 1234, +ab0: 268, // pads: address bus ab1: 451, ab2: 1340, -a2: 978, -s2: 81, -a5: 858, -a4: 727, -a7: 1653, -a6: 1136, -so: 1672, -sync: 539, -vcc: 657, -clk1out: 1163, -p2: 1421, -p3: 439, -p0: 687, -p1: 1444, -p6: 77, -p7: 1370, -p4: 1119, -p5: 0, -pcl3: 1359, -pcl2: 655, -pcl1: 1022, -pcl0: 1139, -pcl7: 1611, -pcl6: 377, -pcl5: 622, -pcl4: 900, -clk0: 1171, -s3: 1532, -res: 159, -s1: 183, -s0: 1403, -s7: 1435, -s6: 1212, -s5: 1098, -s4: 1702, -nots0: 418, -nots1: 1064, -nots2: 752, -nots3: 828, -nots4: 1603, -nots5: 601, -nots6: 1029, -nots7: 181, -rw: 1156, -x2: 1, -x3: 1648, -x0: 1216, -x1: 98, -x6: 448, -x7: 777, -x4: 85, -x5: 589, -rdy: 89, -clk2out: 421, -nmi: 1297, -ab12: 1237, -ab13: 349, -ab10: 1443, -ab11: 399, -ab14: 672, -ab15: 195, -ab0: 268, -a0: 737, -a3: 162, ab3: 211, ab4: 435, ab5: 736, @@ -111,69 +41,143 @@ ab6: 887, ab7: 1493, ab8: 230, ab9: 148, -pch7: 205, -pch6: 1551, -pch5: 49, -pch4: 948, -pch3: 584, -pch2: 502, -pch1: 292, -pch0: 1670, -irq: 103, -vss: 558, +ab12: 1237, +ab13: 349, +ab10: 1443, +ab11: 399, +ab14: 672, +ab15: 195, +sync: 539, // pads +so: 1672, // pads: set overflow +clk0: 1171, // pads +clk1out: 1163, // pads +clk2out: 421, // pads +rdy: 89, // pads: ready +nmi: 1297, // pads: non maskable interrupt +irq: 103, // pads +vcc: 657, // pads +vss: 558, // pads + +a0: 737, // machine state: accumulator +a1: 1234, +a2: 978, +a3: 162, +a4: 727, +a5: 858, +a6: 1136, +a7: 1653, +y0: 64, // machine state: y index register y1: 1148, -y0: 64, -y3: 305, y2: 573, -y5: 615, +y3: 305, y4: 989, -y7: 843, +y5: 615, y6: 115, -cclk: 943, // aka cp2 -clock1: 156, -clock2: 1536, -notir7: 1320, -notir6: 895, // OK -notir5: 1394, // OK -notir4: 26, -notir3: 1125, -notir2: 1182, +y7: 843, +x0: 1216, // machine state: x index register +x1: 98, +x2: 1, +x3: 1648, +x4: 85, +x5: 589, +x6: 448, +x7: 777, +pcl0: 1139, // machine state: program counter low (first storage node) +pcl1: 1022, +pcl2: 655, +pcl3: 1359, +pcl4: 900, +pcl5: 622, +pcl6: 377, +pcl7: 1611, +pclp0: 526, // machine state: program counter low (pre-incremented?, second storage node) +pclp1: 1102, +pclp2: 1411, +pclp3: 868, +pclp4: 15, +pclp5: 1326, +pclp6: 993, +pclp7: 536, +pch0: 1670, // machine state: program counter high (first storage node) +pch1: 292, +pch2: 502, +pch3: 584, +pch4: 948, +pch5: 49, +pch6: 1551, +pch7: 205, +pchp0: 780, // machine state: program counter high (pre-incremented?, second storage node) +pchp1: 126, +pchp2: 114, +pchp3: 1061, +pchp4: 820, +pchp5: 469, +pchp6: 751, +pchp7: 663, +p0: 687, // machine state: status register +p1: 1444, +p2: 1421, +p3: 439, +p4: 1119, // there is no bit4 in the status register! +p5: -1, // there is no bit5 in the status register! +p6: 77, +p7: 1370, +s0: 1403, // machine state: stack pointer +s1: 183, +s2: 81, +s3: 1532, +s4: 1702, +s5: 1098, +s6: 1212, +s7: 1435, +ir0: 328, // internal state: instruction register +ir1: 1626, +ir2: 1384, +ir3: 1576, +ir4: 1112, +ir5: 1329, // ir5 distinguishes branch set from branch clear +ir6: 337, +ir7: 1328, +notir0: 194, // internal signal: instruction register inverted outputs notir1: 702, -notir0: 194, -t2: 971, +notir2: 1182, +notir3: 1125, +notir4: 26, +notir5: 1394, +notir6: 895, +notir7: 1320, +irline3: 996, // internal signal: PLA input - ir0 AND ir1 +clock1: 156, // internal state: timing control +clock2: 1536, // internal state: timing control +t2: 971, // internal state: timing control t3: 1567, t4: 690, t5: 909, -cp1: 710, -fetch: 879, -clearIR: 1077, -D1x1: 827, -notRdy0: 248, -alu0: 394, -alu1: 697, -alu2: 276, -alu3: 495, -alu4: 1490, -alu5: 893, -alu6: 68, -alu7: 1123, -adl0: 413, -adl1: 1282, -adl2: 1242, -adl3: 684, -adl4: 1437, -adl5: 1630, -adl6: 121, -adl7: 1299, -adh0: 407, -adh1: 52, -adh2: 1651, -adh3: 315, -adh4: 1160, -adh5: 483, -adh6: 13, -adh7: 1539, -sb0: 54, +nots0: 418, // datapath state: not stack pointer +nots1: 1064, +nots2: 752, +nots3: 828, +nots4: 1603, +nots5: 601, +nots6: 1029, +nots7: 181, +notidl0: 116, // datapath state: internal data latch (first storage node) +notidl1: 576, +notidl2: 1485, +notidl3: 1284, +notidl4: 1516, +notidl5: 498, +notidl6: 1537, +notidl7: 529, +idl0: 1597, // datapath signal: internal data latch (driven output) +idl1: 870, +idl2: 1066, +idl3: 464, +idl4: 1306, +idl5: 240, +idl6: 1116, +idl7: 391, +sb0: 54, // datapath bus: special bus sb1: 1150, sb2: 1287, sb3: 1188, @@ -181,7 +185,48 @@ sb4: 1405, sb5: 166, sb6: 1336, sb7: 1001, -idb0: 1108, +notalu0: 394, // datapath state: alu output storage node (inverse) +notalu1: 697, +notalu2: 276, +notalu3: 495, +notalu4: 1490, +notalu5: 893, +notalu6: 68, +notalu7: 1123, +alu0: 401, // datapath signal: ALU output +alu1: 872, +alu2: 1637, +alu3: 1414, +alu4: 606, +alu5: 314, +alu6: 331, +alu7: 765, + // datapath signal: decimally adjusted special bus +dasb0: 54, // same node as sb0 +dasb1: 1009, +dasb2: 450, +dasb3: 1475, +dasb4: 1405, // same node as sb4 +dasb5: 263, +dasb6: 679, +dasb7: 1494, +adl0: 413, // internal state: address latch low +adl1: 1282, +adl2: 1242, +adl3: 684, +adl4: 1437, +adl5: 1630, +adl6: 121, +adl7: 1299, +adh0: 407, // internal state: address latch high +adh1: 52, +adh2: 1651, +adh3: 315, +adh4: 1160, +adh5: 483, +adh6: 13, +adh7: 1539, +idb0: 1108, // internal state: data buffer idb1: 991, idb2: 1473, idb3: 1302, @@ -189,15 +234,23 @@ idb4: 892, idb5: 1503, idb6: 833, idb7: 493, -dor0: 222, -dor1: 527, -dor2: 1288, -dor3: 823, -dor4: 873, -dor5: 1266, -dor6: 1418, -dor7: 158, -pd0: 758, +notdor0: 222, // internal state: data output register (storage node) +notdor1: 527, +notdor2: 1288, +notdor3: 823, +notdor4: 873, +notdor5: 1266, +notdor6: 1418, +notdor7: 158, +dor0: 97, // internal signal: data output register +dor1: 746, +dor2: 1634, +dor3: 444, +dor4: 1088, +dor5: 1453, +dor6: 1415, +dor7: 63, +pd0: 758, // internal state: predecode register pd1: 361, pd2: 955, pd3: 894, @@ -205,5 +258,315 @@ pd4: 369, pd5: 829, pd6: 1669, pd7: 1690, -h1x1: 1042, // drive status byte onto databus +notRdy0: 248, // internal signal: global pipeline control +Reset0: 67, // internal signal: retimed reset from pin +C1x5Reset: 926, // retimed and pipelined reset in progress +notRnWprepad: 187, // internal signal: to pad, yet to be inverted and retimed +RnWstretched: 353, // internal signal: control datapad output drivers +cp1: 710, // internal signal: clock phase 1 +cclk: 943, // unbonded pad: internal non-overlappying phi2 +fetch: 879, // internal signal +clearIR: 1077, // internal signal +D1x1: 827, // internal signal: interrupt handler related +H1x1: 1042, // internal signal: drive status byte onto databus + + // internal signal: pla outputs block 1 (west/left edge of die) + // often 130 pla outputs are mentioned - we have 131 here +pla0: 1601, +pla1: 60, +pla2: 1512, +pla3: 382, +pla4: 1173, +pla5: 1233, + + // internal signal: pla outputs block 2 +pla6: 258, +pla7: 1562, +pla8: 84, +pla9: 1543, +pla10: 76, +pla11: 1658, +pla12: 1540, +pla13: 245, +pla14: 985, +pla15: 786, +pla16: 1664, +pla17: 682, +pla18: 1482, +pla19: 665, +pla20: 286, + + // internal signal: pla outputs block 3 + // not pla, feed through +pla21: 271, +pla22: 370, +pla23: 552, +pla24: 1612, +pla25: 1487, +pla26: 784, +pla27: 244, +pla28: 788, +pla29: 1623, +pla30: 764, +pla31: 1057, +pla32: 403, +pla33: 204, +pla34: 1273, +pla35: 1582, +pla36: 1031, + + // internal signal: pla outputs block 4 +pla37: 804, +pla38: 1311, +pla39: 1428, +pla40: 492, +pla41: 1204, +pla42: 58, +pla43: 1520, +pla44: 324, +pla45: 1259, +pla46: 342, +pla47: 857, +pla48: 712, +pla49: 1337, +pla50: 1355, +pla51_T0SBC: 787, // 52:111XXXXX 1 0 T0SBC +pla52_T0ADCSBC: 575, // 51:X11XXXXX 1 0 T0ADCSBC +pla53: 1466, + + // internal signal: pla outputs block 5 +pla54: 1381, +pla55: 546, +pla56: 776, +pla57: 157, +pla58: 257, +pla59: 1243, +pla60: 822, +pla61: 1324, +pla62: 179, +pla63: 131, +pla64: 1420, +pla65: 1342, +pla66: 4, +pla67: 1396, +pla68: 167, +pla69: 303, +pla70: 1504, +pla71: 354, +pla72: 1168, + + // internal signal: pla outputs block 6 +pla73: 1721, // has extra non-pla input +pla74: 1086, +pla75: 1074, +pla76: 1246, +pla77: 487, +pla78: 579, +pla79: 145, +pla80_T2BR: 1239, // T2BR, 83 for Balazs +pla81: 285, + // not pla, feed through + // not pla, feed through +pla82: 1524, +pla83: 273, // has extra pulldown: pla97 +pla84: 0, +pla85: 341, +pla86: 120, +pla87: 1478, +pla88: 594, +pla89: 1210, +pla90: 677, // has extra pulldown: pla97 + + // internal signal: pla outputs block 7 +pla91: 461, +pla92: 447, +pla93: 660, +pla94: 1557, +pla95: 259, +pla96: 1052, + // gap +pla97: 791, // feeds into pla83 and pla90 (no normal pla output) +pla98: 517, +pla99: 352, +pla100: 750, +pla101: 932, +pla102: 1589, + // gap +pla103: 446, +pla104: 528, + + // internal signal: pla outputs block 8 +pla105: 309, +pla106: 1430, +pla107: 53, +pla108: 691, +pla109: 1292, + // gap +pla110: 1646, +pla111: 1114, +pla112: 904, +pla113: 1155, +pla114: 1476, +pla115: 1226, +pla116: 1569, +pla117: 301, +pla118: 950, +pla119: 1665, + + // internal signal: pla outputs block 9 +pla120: 1710, +pla121: 1050, // feeds into pla130 (no normal pla output) +pla122: 1419, +pla123: 840, +pla124: 607, +pla125: 219, +pla126: 1385, +pla127: 281, +pla128: 1174, +pla129: 1164, +pla130: 1006, // has extra pulldowns: pla121 and ir0 + +// internal signals: control signals +nnT2BR: 967, // doubly inverted +BRtaken: 1544, + +// internal state: misc pipeline state clocked by cclk (phi2) +pipeBRtaken: 832, +pipeUNK01: 1530, +pipeUNK02: 974, +pipeUNK03: 1436, +pipeUNK04: 99, +pipeUNK05: 44, +pipeUNK06: 443, +pipeUNK07: 215, +pipeUNK08: 338, +pipeUNK09: 199, +pipeUNK10: 215, +pipeUNK11: 1011, +pipeUNK12: 1283, +pipeUNK13: 1442, +pipeUNK14: 1607, +pipeUNK15: 1577, // inverse of H1x1, write P onto idb (PHP, interrupt) +pipeUNK16: 1051, +pipeUNK17: 1078, +pipeUNK18: 899, +pipeUNK19: 832, +pipeUNK20: 294, +pipeUNK21: 1176, +pipeUNK22: 561, // becomes dpc22 +pipeUNK23: 596, +pipephi2Reset0: 449, +pipephi2Reset0x: 1036, // a second copy of the same latch +pipeUNK26: 1321, +pipeUNK27: 73, +pipeUNK28: 685, +pipeUNK29: 1008, +pipeUNK30: 1652, +pipeUNK31: 614, +pipeUNK32: 960, +pipeUNK33: 848, +pipeUNK34: 56, +pipeUNK35: 1713, +pipeUNK36: 729, +pipeUNK37: 197, +pipeUNK38: 1131, +pipeUNK39: 151, +pipeUNK40: 456, +pipeUNK41: 1438, +pipeUNK42: 1104, +pipeUNK43: 554, + + + +// internal state: vector address pulldown control +pipeVectorA0: 357, +pipeVectorA1: 170, +pipeVectorA2: 45, + +// internal state: datapath control drivers +pipedpc28: 683, + +// internal signals: alu internal (private) busses +alua0: 1167, +alua1: 1248, +alua2: 1332, +alua3: 1680, +alua4: 1142, +alua5: 530, +alua6: 1627, +alua7: 1522, +alub0: 977, +alub1: 1432, +alub2: 704, +alub3: 96, +alub4: 1645, +alub5: 1678, +alub6: 235, +alub7: 1535, + +aluanorb0: 143, +aluanandb0: 1628, +aluaorb0: 693, +notaluoutmux0: 957, // alu result latch input + +aluanorb1: 155, +aluanandb1: 841, +aluaorb1: 1021, +notaluoutmux1: 250, // alu result latch input + +// internal signals: datapath control signals +dpc0_YSB: 801, // drive sb from y +dpc1_SBY: 325, // load y from sb +dpc2_XSB: 1263, // drive sb from x +dpc3_SBX: 1186, // load x from sb +dpc4_SSB: 1700, // drive sb from stack pointer +dpc5_SADL: 1468, // drive adl from stack pointer +dpc6_SBS: 874, // load stack pointer from sb +dpc7_SS: 654, // recirculate stack pointer +dpc8_nDBADD: 1068, // alu b side: select not-idb input +dpc9_DBADD: 859, // alu b side: select idb input + +dpc10_ADLADD: 437, // alu b side: select adl input +dpc11_SBADD: 549, // alu a side: select sb +dpc12_0ADD: 984, // alu a side: select zero +dpc13_ORS: 59, // alu op: a or b +dpc14_SRS: 362, // alu op: logical right shift +dpc15_ANDS: 574, // alu op: a and b +dpc16_EORS: 1666, // alu op: a xor b (?) +dpc17_SUMS: 921, // alu op: a plus b (?) +alucin: 910, // alu carry in +notalucin: 1165, +dpc18_DAA: 1201, // decimal related +dpc19_ADDSB7: 214, // alu to sb bit 7 only + +dpc20_ADDSB06: 129, // alu to sb bits 6-0 only +dpc21_ADDADL: 1015, // alu to adl +alurawcout: 808, // alu raw carry out (no decimal adjust) +alucout: 1146, // alu carry out (latched by phi2) +notaluvout: 1308, // alu overflow out +aluvout: 938, // alu overflow out (latched by phi2) +dpc22_DSA: 725, // decimal related/SBC only +dpc23_SBAC: 534, // (optionalls decimal-adjusted) sb to acc +dpc24_ACSB: 1698, // acc to sb +dpc25_SBDB: 1060, // sb pass-connects to idb +dpc26_ACDB: 1331, // acc to idb +dpc27_SBADH: 140, // sb pass-connects to adh +dpc28_0ADH0: 229, // zero to adh0 bit0 only +dpc29_0ADH17: 203, // zero to adh bits 7-1 only + +dpc30_ADHPCH: 48, // load pch from adh +dpc31_PCHPCH: 741, // load pch from pch incremented +dpc32_PCHADH: 1235, // drive adh from pch incremented +dpc33_PCHDB: 247, // drive idb from pch incremented +dpc34_PCLC: 1704, // pch carry in and pcl FF detect? +dpc35: 1334, // pcl 0x?F detect - half-carry +dpc36_IPC: 379, // pcl carry in +dpc37_PCLDB: 283, // drive idb from pcl incremented +dpc38_PCLADL: 438, // drive adl from pcl incremented +dpc39_PCLPCL: 898, // load pcl from pcl incremented + +dpc40_ADLPCL: 414, // load pcl from adl +dpc41: 1564, // pass-connect adl to mux node driven by idl +dpc42: 41, // pass-connect adh to mux node driven by idl +dpc43: 863, // pass-connect idb to mux node driven by idl } diff --git a/wires.js b/wires.js index b5f8bb1..f15f18a 100644 --- a/wires.js +++ b/wires.js @@ -26,6 +26,25 @@ var zoom=1; var dragMouseX, dragMouseY, moved; var statbox; +// Some constants for the graphics presentation +// the canvas is embedded in an 800x600 clipping div +// which gives rise to some of the 300 and 400 values in the code +// there are also some 600 values +// the 6502D chip coords are in the box (216,179) to (8983,9807) +// we have 4 canvases all the same size, now 2000 pixels square +// chip background - the layout +// overlay - a red/white transparency to show logic high or low +// hilite - to show the selected polygon +// hitbuffer - abusing color values to return which polygon is under a point +// we no longer use a scaling transform - we now scale the chip data at +// the point of drawing line segments +// if the canvas is any smaller than chip coordinates there will be +// rounding artifacts, and at high zoom there will be anti-aliasing on edges. +var grMaxZoom=12; +var grChipSize=10000; +var grCanvasSize=2000; +var grLineWidth=1; + // Index of layerNames corresponds to index into drawLayers var layernames = ['metal', 'switched diffusion', 'inputdiode', 'grounded diffusion', 'powered diffusion', 'polysilicon']; var colors = ['rgba(128,128,192,0.4)','#FFFF00','#FF00FF','#4DFF4D', @@ -116,14 +135,13 @@ function setupLayerVisibility(){ function setupBackground(){ chipbg = document.getElementById('chipbg'); - chipbg.width = 4000; - chipbg.height = 4000; + chipbg.width = grCanvasSize; + chipbg.height = grCanvasSize; var ctx = chipbg.getContext('2d'); - ctx.scale(chipbg.width/10000, chipbg.height/10000); ctx.fillStyle = '#000000'; ctx.strokeStyle = 'rgba(255,255,255,0.5)'; - ctx.lineWidth = 4; - ctx.fillRect(0,0,10000,10000); + ctx.lineWidth = grLineWidth; + ctx.fillRect(0,0,grCanvasSize,grCanvasSize); for(var i in segdefs){ var seg = segdefs[i]; var c = seg[2]; @@ -138,27 +156,24 @@ function setupBackground(){ function setupOverlay(){ overlay = document.getElementById('overlay'); - overlay.width = 4000; - overlay.height = 4000; + overlay.width = grCanvasSize; + overlay.height = grCanvasSize; ctx = overlay.getContext('2d'); - ctx.scale(overlay.width/10000, overlay.height/10000); } function setupHilite(){ hilite = document.getElementById('hilite'); - hilite.width = 4000; - hilite.height = 4000; + hilite.width = grCanvasSize; + hilite.height = grCanvasSize; var ctx = hilite.getContext('2d'); - ctx.scale(hilite.width/10000, hilite.height/10000); } function setupHitBuffer(){ hitbuffer = document.getElementById('hitbuffer'); - hitbuffer.width = 4000; - hitbuffer.height = 4000; + hitbuffer.width = grCanvasSize; + hitbuffer.height = grCanvasSize; hitbuffer.style.visibility = 'hidden'; var ctx = hitbuffer.getContext('2d'); - ctx.scale(hitbuffer.width/10000, hitbuffer.height/10000); for(i in nodes) hitBufferNode(ctx, i, nodes[i].segs); } @@ -183,7 +198,7 @@ function hexdigit(n){return '0123456789ABCDEF'.charAt(n);} ///////////////////////// function refresh(){ - ctx.clearRect(0,0,10000,10000); + ctx.clearRect(0,0,grCanvasSize,grCanvasSize); for(i in nodes){ if(isNodeHigh(i)) overlayNode(nodes[i].segs); } @@ -199,7 +214,7 @@ function overlayNode(w){ function hiliteNode(n){ var ctx = hilite.getContext('2d'); - ctx.clearRect(0,0,10000,10000); + ctx.clearRect(0,0,grCanvasSize,grCanvasSize); ctx.fillStyle = 'rgba(255,255,255,0.7)'; if(n==-1) return; if(isNodeHigh(n[0])) @@ -216,9 +231,9 @@ function drawSeg(ctx, seg){ if(noGraphics) return; var dx = 400; ctx.beginPath(); - ctx.moveTo(seg[0]+dx, 10000-seg[1]) - for(var i=2;i?np'.indexOf(c)==-1) return; if(c=='<' && zoom>1) setZoom(zoom/1.2); - else if(c=='>' && zoom<16) setZoom(zoom*1.2); + else if(c=='>' && zoom','y:',cy); else {setStatus('x:',cx, 'y:', cy,'
','node:',w, nodeName(w));} } function findNodeNumber(x,y){ var ctx = hitbuffer.getContext('2d'); - var pixels = ctx.getImageData(x*4000/600, y*4000/600, 2, 2).data; + var pixels = ctx.getImageData(x*grCanvasSize/600, y*grCanvasSize/600, 2, 2).data; if(pixels[0]==0) return -1; var high = pixels[0]>>4; var mid = pixels[1]>>4; @@ -333,6 +348,11 @@ function setChipStyle(props){ } } +// we draw the chip data scaled down to the canvas +// and so avoid scaling a large canvas +function grScale(x){ + return Math.round(x*grCanvasSize/grChipSize); +} function localx(el, gx){ return gx-el.getBoundingClientRect().left;