diff --git a/chip-6800/nodenames.js b/chip-6800/nodenames.js
index 3224b0e..30dd029 100644
--- a/chip-6800/nodenames.js
+++ b/chip-6800/nodenames.js
@@ -60,12 +60,24 @@ vma: 1971,     // pads: valid memory address
 ba: 1964,      // pads: bus available
 //
 
-ir0: 1302, // internal state: Instruction Register
-ir1: 1290,
-ir2: 1296,
-ir3: 1297,
-ir4: 1298,
-ir5: 1299,
-ir6: 1278,
-ir7: 1279,
+notir0: 1302, // internal state: Instruction Register
+notir1: 1290,
+notir2: 1296,
+notir3: 1297,
+notir4: 1298,
+notir5: 1299,
+notir6: 1278,
+notir7: 1279,
+
+ir0: 1271,
+ir1: 1269,
+ir2: 1268,
+ir3: 1267,
+ir4: 1265,
+ir5: 1264,
+ir6: 1263,
+ir7: 1261,
+
+// internal control signals
+sync: 1528,
 }
diff --git a/chip-6800/support.js b/chip-6800/support.js
index e296fe6..fd12caf 100644
--- a/chip-6800/support.js
+++ b/chip-6800/support.js
@@ -87,9 +87,8 @@ function handleBusRead(){
 		var d = eval(readTriggers[a]);
 		if(d == undefined)
 			d = mRead(readAddressBus());
-		// we have no SYNC pin on 6800
-		// if(isNodeHigh(nodenames['sync']))
-		// 	eval(fetchTriggers[d]);
+		if(isNodeHigh(nodenames['sync']))
+			eval(fetchTriggers[d]);
 		writeDataBus(d);
 	}
 }
@@ -116,18 +115,533 @@ function chipStatus(){
 */
 	var machine3 = 
 		'Hz: ' + estimatedHz().toFixed(1);
-/*
 	if(typeof expertMode != "undefined") {
-		machine3 += ' Exec: ' + busToString('Execute') + '(' + busToString('State') + ')';
+//		machine3 += ' Exec: ' + busToString('Execute') + '(' + busToString('State') + ')';
 		if(isNodeHigh(nodenames['sync']))
 			machine3 += ' (Fetch: ' + busToString('Fetch') + ')';
 		if(goldenChecksum != undefined)
 			machine3 += " Chk:" + traceChecksum + ((traceChecksum==goldenChecksum)?" OK":" no match");
 	}
-*/
+
 	setStatus(machine1, machine2, machine3);
 	if (loglevel>0) {
 		updateLogbox(logThese);
 	}
 	selectCell(ab);
 }
+
+// javascript derived from http://segher.ircgeeks.net/6800/OPS
+var disassembly={
+0x00: "",
+0x01: "nop",
+0x02: "",
+0x03: "",
+0x04: "",
+0x05: "",
+0x06: "tap",
+0x07: "tpa",
+0x08: "",
+0x09: "",
+0x0a: "",
+0x0b: "",
+0x0c: "",
+0x0d: "",
+0x0e: "",
+0x0f: "",
+0x10: "sba",
+0x11: "cba",
+0x12: "",
+0x13: "",
+0x14: "!nba",
+0x15: "",
+0x16: "tab",
+0x17: "tba",
+0x18: "",
+0x19: "",
+0x1a: "",
+0x1b: "",
+0x1c: "",
+0x1d: "",
+0x1e: "",
+0x1f: "",
+0x20: "bra N",
+0x21: "",
+0x22: "bhi N",
+0x23: "bls N",
+0x24: "bcc N",
+0x25: "bcs N",
+0x26: "bne N",
+0x27: "beq N",
+0x28: "",
+0x29: "",
+0x2a: "",
+0x2b: "",
+0x2c: "",
+0x2d: "",
+0x2e: "",
+0x2f: "",
+0x30: "tsx",
+0x31: "ins",
+0x32: "pul a",
+0x33: "pul b",
+0x34: "des",
+0x35: "txs",
+0x36: "psh a",
+0x37: "psh b",
+0x38: "",
+0x39: "",
+0x3a: "",
+0x3b: "",
+0x3c: "",
+0x3d: "",
+0x3e: "",
+0x3f: "",
+0x40: "neg a",
+0x41: "",
+0x42: "",
+0x43: "com a",
+0x44: "lsr a",
+0x45: "",
+0x46: "ror a",
+0x47: "asr a",
+0x48: "",
+0x49: "",
+0x4a: "",
+0x4b: "",
+0x4c: "",
+0x4d: "",
+0x4e: "",
+0x4f: "",
+0x50: "neg b",
+0x51: "",
+0x52: "",
+0x53: "com b",
+0x54: "lsr b",
+0x55: "",
+0x56: "ror b",
+0x57: "asr b",
+0x58: "",
+0x59: "",
+0x5a: "",
+0x5b: "",
+0x5c: "",
+0x5d: "",
+0x5e: "",
+0x5f: "",
+0x60: "neg Nx",
+0x61: "",
+0x62: "",
+0x63: "com Nx",
+0x64: "lsr Nx",
+0x65: "",
+0x66: "ror Nx",
+0x67: "asr Nx",
+0x68: "",
+0x69: "",
+0x6a: "",
+0x6b: "",
+0x6c: "",
+0x6d: "",
+0x6e: "",
+0x6f: "",
+0x70: "neg NN",
+0x71: "",
+0x72: "",
+0x73: "com NN",
+0x74: "lsr NN",
+0x75: "",
+0x76: "ror NN",
+0x77: "asr NN",
+0x78: "",
+0x79: "",
+0x7a: "",
+0x7b: "",
+0x7c: "",
+0x7d: "",
+0x7e: "",
+0x7f: "",
+0x80: "sub a #",
+0x81: "cmp a #",
+0x82: "sbc a #",
+0x83: "",
+0x84: "and a #",
+0x85: "bit a #",
+0x86: "lda a #",
+0x87: "",
+0x88: "",
+0x89: "",
+0x8a: "",
+0x8b: "",
+0x8c: "",
+0x8d: "",
+0x8e: "",
+0x8f: "",
+0x90: "sub a N",
+0x91: "cmp a N",
+0x92: "sbc a N",
+0x93: "",
+0x94: "and a N",
+0x95: "bit a N",
+0x96: "lda a N",
+0x97: "sta a N",
+0x98: "",
+0x99: "",
+0x9a: "",
+0x9b: "",
+0x9c: "",
+0x9d: "",
+0x9e: "",
+0x9f: "",
+0xa0: "sub a Nx",
+0xa1: "cmp a Nx",
+0xa2: "sbc a Nx",
+0xa3: "",
+0xa4: "and a Nx",
+0xa5: "bit a Nx",
+0xa6: "lda a Nx",
+0xa7: "sta a Nx",
+0xa8: "",
+0xa9: "",
+0xaa: "",
+0xab: "",
+0xac: "",
+0xad: "",
+0xae: "",
+0xaf: "",
+0xb0: "sub a NN",
+0xb1: "cmp a NN",
+0xb2: "sbc a NN",
+0xb3: "",
+0xb4: "and a NN",
+0xb5: "bit a NN",
+0xb6: "lda a NN",
+0xb7: "sta a NN",
+0xb8: "",
+0xb9: "",
+0xba: "",
+0xbb: "",
+0xbc: "",
+0xbd: "",
+0xbe: "",
+0xbf: "",
+0xc0: "sub b #",
+0xc1: "cmp b #",
+0xc2: "sbc b #",
+0xc3: "",
+0xc4: "and b #",
+0xc5: "bit b #",
+0xc6: "lda b #",
+0xc7: "",
+0xc8: "",
+0xc9: "",
+0xca: "",
+0xcb: "",
+0xcc: "",
+0xcd: "",
+0xce: "",
+0xcf: "",
+0xd0: "sub b N",
+0xd1: "cmp b N",
+0xd2: "sbc b N",
+0xd3: "",
+0xd4: "and b N",
+0xd5: "bit b N",
+0xd6: "lda b N",
+0xd7: "sta b N",
+0xd8: "",
+0xd9: "",
+0xda: "",
+0xdb: "",
+0xdc: "",
+0xdd: "",
+0xde: "",
+0xdf: "",
+0xe0: "sub b Nx",
+0xe1: "cmp b Nx",
+0xe2: "sbc b Nx",
+0xe3: "",
+0xe4: "and b Nx",
+0xe5: "bit b Nx",
+0xe6: "lda b Nx",
+0xe7: "sta b Nx",
+0xe8: "",
+0xe9: "",
+0xea: "",
+0xeb: "",
+0xec: "",
+0xed: "",
+0xee: "",
+0xef: "",
+0xf0: "sub b NN",
+0xf1: "cmp b NN",
+0xf2: "sbc b NN",
+0xf3: "",
+0xf4: "and b NN",
+0xf5: "bit b NN",
+0xf6: "lda b NN",
+0xf7: "sta b NN",
+0xf8: "",
+0xf9: "",
+0xfa: "",
+0xfb: "",
+0xfc: "",
+0xfd: "",
+0xfe: "",
+0xff: "",
+0x00: "inx",
+0x01: "dex",
+0x02: "clv",
+0x03: "sev",
+0x04: "clc",
+0x05: "sec",
+0x06: "cli",
+0x07: "sei",
+0x08: "",
+0x09: "",
+0x0a: "",
+0x0b: "",
+0x0c: "",
+0x0d: "",
+0x0e: "",
+0x0f: "",
+0x10: "",
+0x11: "daa",
+0x12: "",
+0x13: "aba",
+0x14: "",
+0x15: "",
+0x16: "",
+0x17: "",
+0x18: "",
+0x19: "",
+0x1a: "",
+0x1b: "",
+0x1c: "",
+0x1d: "",
+0x1e: "",
+0x1f: "",
+0x20: "bvc N",
+0x21: "bvs N",
+0x22: "bpl N",
+0x23: "bmi N",
+0x24: "bge N",
+0x25: "blt N",
+0x26: "bgt N",
+0x27: "ble N",
+0x28: "",
+0x29: "",
+0x2a: "",
+0x2b: "",
+0x2c: "",
+0x2d: "",
+0x2e: "",
+0x2f: "",
+0x30: "",
+0x31: "rts",
+0x32: "",
+0x33: "rti",
+0x34: "",
+0x35: "",
+0x36: "wai",
+0x37: "swi",
+0x38: "",
+0x39: "",
+0x3a: "",
+0x3b: "",
+0x3c: "",
+0x3d: "",
+0x3e: "",
+0x3f: "",
+0x40: "asl a",
+0x41: "rol a",
+0x42: "dec a",
+0x43: "",
+0x44: "inc a",
+0x45: "tst a",
+0x46: "",
+0x47: "clr a",
+0x48: "",
+0x49: "",
+0x4a: "",
+0x4b: "",
+0x4c: "",
+0x4d: "",
+0x4e: "",
+0x4f: "",
+0x50: "asl b",
+0x51: "rol b",
+0x52: "dec b",
+0x53: "",
+0x54: "inc b",
+0x55: "tst b",
+0x56: "",
+0x57: "clr b",
+0x58: "",
+0x59: "",
+0x5a: "",
+0x5b: "",
+0x5c: "",
+0x5d: "",
+0x5e: "",
+0x5f: "",
+0x60: "asl Nx",
+0x61: "rol Nx",
+0x62: "dec Nx",
+0x63: "",
+0x64: "inc Nx",
+0x65: "tst Nx",
+0x66: "jmp Nx",
+0x67: "clr Nx",
+0x68: "",
+0x69: "",
+0x6a: "",
+0x6b: "",
+0x6c: "",
+0x6d: "",
+0x6e: "",
+0x6f: "",
+0x70: "asl NN",
+0x71: "rol NN",
+0x72: "dec NN",
+0x73: "",
+0x74: "inc NN",
+0x75: "tst NN",
+0x76: "jmp NN",
+0x77: "clr NN",
+0x78: "",
+0x79: "",
+0x7a: "",
+0x7b: "",
+0x7c: "",
+0x7d: "",
+0x7e: "",
+0x7f: "",
+0x80: "eor a #",
+0x81: "adc a #",
+0x82: "ora a #",
+0x83: "add a #",
+0x84: "cpx ##",
+0x85: "bsr N",
+0x86: "lds ##",
+0x87: "",
+0x88: "",
+0x89: "",
+0x8a: "",
+0x8b: "",
+0x8c: "",
+0x8d: "",
+0x8e: "",
+0x8f: "",
+0x90: "eor a N",
+0x91: "adc a N",
+0x92: "ora a N",
+0x93: "add a N",
+0x94: "cpx N",
+0x95: "!hcf",
+0x96: "lds N",
+0x97: "sts N",
+0x98: "",
+0x99: "",
+0x9a: "",
+0x9b: "",
+0x9c: "",
+0x9d: "",
+0x9e: "",
+0x9f: "",
+0xa0: "eor a Nx",
+0xa1: "adc a Nx",
+0xa2: "ora a Nx",
+0xa3: "add a Nx",
+0xa4: "cpx Nx",
+0xa5: "jsr Nx",
+0xa6: "lds Nx",
+0xa7: "sts Nx",
+0xa8: "",
+0xa9: "",
+0xaa: "",
+0xab: "",
+0xac: "",
+0xad: "",
+0xae: "",
+0xaf: "",
+0xb0: "eor a NN",
+0xb1: "adc a NN",
+0xb2: "ora a NN",
+0xb3: "add a NN",
+0xb4: "cpx NN",
+0xb5: "jsr NN",
+0xb6: "lds NN",
+0xb7: "sts NN",
+0xb8: "",
+0xb9: "",
+0xba: "",
+0xbb: "",
+0xbc: "",
+0xbd: "",
+0xbe: "",
+0xbf: "",
+0xc0: "eor b #",
+0xc1: "adc b #",
+0xc2: "ora b #",
+0xc3: "add b #",
+0xc4: "",
+0xc5: "",
+0xc6: "ldx ##",
+0xc7: "",
+0xc8: "",
+0xc9: "",
+0xca: "",
+0xcb: "",
+0xcc: "",
+0xcd: "",
+0xce: "",
+0xcf: "",
+0xd0: "eor b N",
+0xd1: "adc b N",
+0xd2: "ora b N",
+0xd3: "add b N",
+0xd4: "",
+0xd5: "!hcf",
+0xd6: "ldx N",
+0xd7: "stx N",
+0xd8: "",
+0xd9: "",
+0xda: "",
+0xdb: "",
+0xdc: "",
+0xdd: "",
+0xde: "",
+0xdf: "",
+0xe0: "eor b Nx",
+0xe1: "adc b Nx",
+0xe2: "ora b Nx",
+0xe3: "add b Nx",
+0xe4: "",
+0xe5: "",
+0xe6: "ldx Nx",
+0xe7: "stx Nx",
+0xe8: "",
+0xe9: "",
+0xea: "",
+0xeb: "",
+0xec: "",
+0xed: "",
+0xee: "",
+0xef: "",
+0xf0: "eor b NN",
+0xf1: "adc b NN",
+0xf2: "ora b NN",
+0xf3: "add b NN",
+0xf4: "",
+0xf5: "",
+0xf6: "ldx NN",
+0xf7: "stx NN",
+0xf8: "",
+0xf9: "",
+0xfa: "",
+0xfb: "",
+0xfc: "",
+0xfd: "",
+0xfe: "",
+0xff: "",
+};
diff --git a/chip-6800/testprogram.js b/chip-6800/testprogram.js
index fd5fa51..6e2b95f 100644
--- a/chip-6800/testprogram.js
+++ b/chip-6800/testprogram.js
@@ -7,29 +7,19 @@ var consoleboxStream="";
 // for opcodes, see ftp://ftp.comlab.ox.ac.uk/pub/Cards/txt/6800.txt
 
 testprogram = [
-  0x86, 0x00, 0x9d, 0x10, 0x7e, 0x00, 0x02, 0x08, 0x5a, 0x7c, 0x00,
-  0x0f, 0x0d, 0x89, 0x02, 0x39,
+  0xce, 0x21, 0x43,  // LDX #4321
+  0x35,              // TXS
+  0xc6, 0x00,        // LDAA #$00
+  0xbd, 0x10, 0x00,  // JSR $0010
+  0x7e, 0x02, 0x00,  // JMP $0002
+  0x01,
+  0x01,
+  0x01,              // NOP
+  0x01,
+  0x08,              // INX
+  0x5a,              // DECB
+  0x7c, 0x0f, 0x00,  // INC $0F
+  0x0d,              // SEC
+  0xc9, 0x02,        // ADCA #$02
+  0x39,              // RTS
 ]
-
-// Crasm LYB 1.3:                                                   page  1
-//                          1  CPU  6800
-//                          2  
-//   0000                   3  * = 0
-//                          4  
-//                          5  CODE
-//                          6  
-// 0000 8600                7  LDAA #$00
-// 0002 9D10                8  JSR $0010
-// 0004 7E0002              9  JMP $0002
-// 0007 08                 10  INX
-// 0008 5A                 11  DECB
-// 0009 7C000F             12  INC $0F
-// 000C 0D                 13  SEC
-// 000D 8902               14  ADCA #$02
-// 000F 39                 15  RTS
-//                         16  
-// ERRORS:       0
-// WARNINGS:     0
-// Successful assembly...
-//  Last address        f (15)
-//  Code length        20 (32)
diff --git a/macros.js b/macros.js
index db9884c..0fab8fb 100644
--- a/macros.js
+++ b/macros.js
@@ -330,9 +330,9 @@ function busToString(busname){
 	if(busname=='State')
 		return listActiveTCStates();
 	if(busname=='Execute')
-		return dis6502toHTML(readBits('ir',8));
+		return disassemblytoHTML(readBits('ir',8));
 	if(busname=='Fetch')
-		return isNodeHigh(nodenames['sync'])?dis6502toHTML(readDataBus()):"";
+		return isNodeHigh(nodenames['sync'])?disassemblytoHTML(readDataBus()):"";
 	if(busname=='plaOutputs')
 		// PLA outputs are mostly ^op- but some have a prefix too
 		//    - we'll allow the x and xx prefix but ignore the #
@@ -625,8 +625,8 @@ function adler32(x){
 }
 
 // sanitised opcode for HTML output
-function dis6502toHTML(byte){
-	var opcode=dis6502[byte];
+function disassemblytoHTML(byte){
+	var opcode=disassembly[byte];
 	if(typeof opcode == "undefined")
 		return "unknown"
 	return opcode.replace(/ /,' ');
@@ -634,7 +634,7 @@ function dis6502toHTML(byte){
 
 // opcode lookup for 6502 - not quite a disassembly
 //   javascript derived from Debugger.java by Achim Breidenbach
-var dis6502={
+var disassembly={
 0x00:"BRK",
 0x01:"ORA (zp,X)",
 0x05:"ORA zp",