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add 6800 timing state signals
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@ -73,6 +73,34 @@ ir7: 1277,
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// internal control signals
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sync: 1528, // aka #decode_0
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// timing state signals
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Ts: 1309,
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Ta0: 879,
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Td0_0: 981,
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"#Te0": 868,
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"Te0.2": 866,
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Tg0: 12,
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Tx0: 850,
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Ta1: 838,
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Te1_0: 735,
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Tg1: 772,
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Tx1: 851,
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Ta2: 844,
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Tg2: 832,
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Tx2: 860,
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Tg3: 835,
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Tr3: 823,
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Tg4: 696,
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Tr4: 825,
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Tg5: 914,
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Tr5: 828,
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Tg6: 911,
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Tr6: 894,
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Tr7: 694,
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Tg7: 1081,
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Tg8: 891,
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Tr8: 697,
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// many other internal busses registers and signals
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abh0: 267,
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abh1: 258,
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