import remainder of Segher's 6800 nodename updates and begin process of ordering and commenting

chip-6800/nodenames.js

@@ -168,6 +168,13 @@ addb5: 552,
 addb6: 545,
 addb7: 544,
 addg0: 593,
+addg1: 594,
+addg2: 589,
+addg3: 590,
+addg4: 585,
+addg5: 586,
+addg6: 581,
+addg7: 582,
 addp0: 564,
 addp1: 566,
 addp2: 556,
@@ -258,7 +265,7 @@ obl4: 29,
 obl5: 33,
 obl6: 1073,
 obl7: 35,
-pch0: 1878,
+pch0: 1878, // program counter high register
 pch1: 1882,
 pch2: 1879,
 pch3: 1883,
@@ -266,7 +273,7 @@ pch4: 1880,
 pch5: 1884,
 pch6: 1881,
 pch7: 1885,
-pcl0: 1877,
+pcl0: 1877, // program counter low register
 pcl1: 1873,
 pcl2: 1876,
 pcl3: 1872,
@@ -274,8 +281,10 @@ pcl4: 1875,
 pcl5: 1871,
 pcl6: 1874,
 pcl7: 1870,
+
 resg: 1512,
-sph0: 1909,
+
+sph0: 1909,  // stack pointer high register
 sph1: 1908,
 sph2: 1907,
 sph3: 1906,
@@ -283,7 +292,7 @@ sph4: 1905,
 sph5: 1904,
 sph6: 1903,
 sph7: 1902,
-spl0: 1894,
+spl0: 1894,  // stack pointer low register
 spl1: 1898,
 spl2: 1895,
 spl3: 1899,
@@ -291,7 +300,8 @@ spl4: 1896,
 spl5: 1900,
 spl6: 1897,
 spl7: 1901,
-sum0: 644,
+
+sum0: 644,  // phi2-latched alu partial result
 sum1: 643,
 sum2: 642,
 sum3: 641,
@@ -299,7 +309,8 @@ sum4: 640,
 sum5: 639,
 sum6: 638,
 sum7: 412,
-tmp0: 1893,
+
+tmp0: 1893, // non-visible temporary register
 tmp1: 1892,
 tmp2: 1891,
 tmp3: 1890,
@@ -307,7 +318,8 @@ tmp4: 1889,
 tmp5: 1888,
 tmp6: 1887,
 tmp7: 1886,
-xi0: 1303,
+
+xi0: 1303,  // half-latch prior to IR
 xi1: 1291,
 xi2: 1294,
 xi3: 1292,
@@ -317,6 +329,7 @@ xi6: 1275,
 xi7: 1276,
 
 // signals which are not purely alphabetical
+// note that underscore digit represents a logical duplication
 acca0_1: 342,
 acca1_1: 350,
 acca2_1: 344,
@@ -758,6 +771,13 @@ phi2_1: 478,
 "#xaccb/abl1": 460,
 "#xaccb/db": 760,
 "#xaddg0": 571,
+"#xaddg1": 570,
+"#xaddg2": 563,
+"#xaddg3": 562,
+"#xaddg4": 555,
+"#xaddg5": 554,
+"#xaddg6": 547,
+"#xaddg7": 546,
 "#xda/adda": 434,
 "#xdb/acca": 464,
 "#xdb/accb": 430,
@@ -897,4 +917,279 @@ phi2_1: 478,
 "flag0/db4": 309,
 "flag0/db5": 308,
 "ndb/adda": 415,
+
+// from this point: signals imported from Segher 2011-04-16 and not yet ordered or commented
+carry: 646,
+dbe_1: 1453,
+dec: 163,
+fetch: 849,
+halted: 2,
+int: 1083,
+irq_0: 3,
+irqg: 1183,
+nmi_0: 1477,
+nmig: 1192,
+restart: 1186,
+
+ta0: 879,  // timing state signals also seen earlier with mixed-case names
+ta1: 838,
+ta2: 844,
+td0_0: 981,
+td0_1: 700,
+te1_0: 735,
+te1_1: 967,
+te1_2: 705,
+te1_3: 715,
+te1_4: 865,
+te1_5: 973,
+te1_6: 706,
+tg0: 12,
+tg1: 772,
+tg2: 832,
+tg3: 835,
+tg4: 696,
+tg5: 914,
+tg6: 911,
+tg7: 1081,
+tg8: 891,
+tr3: 823,
+tr4: 825,
+tr5: 828,
+tr6: 894,
+tr7: 694,
+tr8: 697,
+ts: 1309,
+tsc_0: 1508,
+tx0: 850,
+tx1: 851,
+tx2: 860,
+
+wait: 1234,
+wr: 788,
+writing: 1449,
+
+// the remainder of the imports need quoting
+"#alu-cin": 592,
+"#alu-cout": 595,
+"#alu-hin": 584,
+"#alu-hout": 1690,
+"#alu-or": 472,
+"#alu-or-xor": 475,
+"#carry16": 733,
+"#dbe_0": 1452,
+"#dbe_2": 1454,
+"#end": 1574,
+"#flagc_1": 942,
+"#i-ts": 1313,
+"#inc": 712,
+"#inch-cin": 78,
+"#next-cyc-fetch": 4,
+"#nmi_1": 1478,
+"#nmip": 1178,
+"#op-00xxxxxx_0": 945,
+"#op-ta0-a-alu": 1019,
+"#ta0-stx": 796,
+"#ta0.2_0": 873,
+"#ta1-0000100x": 798,
+"#ta1-0000100x.2": 799,
+"#ta1_0": 872,
+"#ta1_1": 1095,
+"#ta1_2": 960,
+"#taken": 1039,
+"#te0": 868,
+"#te0.2_0": 867,
+"#tx0_0": 971,
+"#tx0_1": 926,
+"#tx1_0": 727,
+"#xalu-cin": 943,
+"#xalu-or-xor": 479,
+"#xdbi/db": 536,
+"#xsum/db": 535,
+"alu-and": 473,
+"alu-sl": 578,
+"alu-sr/c": 1110,
+"alu-sub/c": 1144,
+"alu-sub/c_0": 1163,
+"alu-vout": 1058,
+"alu-zout": 645,
+"alu/c": 1147,
+"alu/c_0": 1164,
+"alu/h": 782,
+"alu/nz": 1027,
+"alu/v": 1112,
+"alu2/z": 1049,
+"da-c": 379,
+"da-h": 381,
+"db/ccr": 1107,
+"dbi/db": 531,
+"dec-low-adjust": 385,
+"do-alu-cin": 575,
+"force-wait": 1245,
+"inc16/z": 989,
+"incl-cout": 42,
+"insn/c": 1162,
+"insn/c_0": 1131,
+"insn/i": 1000,
+"insn/v": 1570,
+"irq-dis": 990,
+"irq-new": 1215,
+"ix/ab": 833,
+"nmi-done": 1172,
+"nmi-new": 1174,
+"no-address": 1489,
+"shift-vout": 1057,
+"shift/v": 1568,
+"sr-cin": 765,
+"t-before-fetch-simple": 1149,
+"ta0-two-cycle-insn": 965,
+"ta0.2": 878,
+"ta2-0000100x": 1028,
+"ta2-0000100x_0": 748,
+"ta2-0000100x_1": 759,
+"ta2-1xxx11xx": 1045,
+"ta3-0000100x": 1031,
+"te0.2": 866,
+"tsc-high": 1460,
+"tsc-low": 1476,
+"xalu-and": 483,
+
+// pla outputs (not in physical order)
+"op-0000011x": 1361,
+"op-0000100x": 1332,
+"op-0000100x_0": 1379,
+"op-0000100x_1": 1427,
+"op-0000101x": 1141,
+"op-0000110x": 1130,
+"op-0000xxxx": 1369,
+"op-0000xxxx_0": 1362,
+"op-00010110": 1355,
+"op-0001100x": 1394,
+"op-0001101x": 1346,
+"op-0001xxxx": 1360,
+"op-000x0110": 1391,
+"op-0010xxxx": 1380,
+"op-0010xxxx_0": 1363,
+"op-0010xxxx_1": 1399,
+"op-0010xxxx_2": 1426,
+"op-0011100x": 1381,
+"op-00111011": 1383,
+"op-00xxxxxx": 1342,
+"op-0100xxxx": 1432,
+"op-0101xxxx": 1425,
+"op-011x1101": 1387,
+"op-011x1110": 1398,
+"op-011xxxxx": 1337,
+"op-011xxxxx_0": 1322,
+"op-011xxxxx_1": 1320,
+"op-01xx01xx": 1443,
+"op-01xx01xx_0": 1396,
+"op-01xx0xxx": 1390,
+"op-01xx100x": 1345,
+"op-01xx100x_0": 1094,
+"op-01xx100x_1": 1334,
+"op-01xx1110": 1328,
+"op-01xx1110_0": 1341,
+"op-01xx11x1": 1428,
+"op-01xxx1xx": 1338,
+"op-0x01xxxx": 1343,
+"op-0x0xxxxx_0": 1364,
+"op-0xxxxxxx": 1439,
+"op-0xxxxxxx_0": 1401,
+"op-0xxxxxxx_1": 1437,
+"op-10xx0111": 1339,
+"op-10xx111x": 948,
+"op-10xxxxxx": 1384,
+"op-11xx0111": 1436,
+"op-11xx1110": 1366,
+"op-11xx1111": 1393,
+"op-11xxxxxx": 1327,
+"op-1x001101": 1349,
+"op-1x00xxxx": 1372,
+"op-1x10xxxx": 1350,
+"op-1x11xxxx": 1321,
+"op-1xx01101": 1352,
+"op-1xx0xxxx": 1371,
+"op-1xxx0010": 1354,
+"op-1xxx0111": 1323,
+"op-1xxx10x0": 1438,
+"op-1xxx10x1": 1444,
+"op-1xxx1100": 1378,
+"op-1xxx1100_0": 1442,
+"op-1xxx1101": 1356,
+"op-1xxx1101_0": 1388,
+"op-1xxx1101_1": 1434,
+"op-1xxx1111": 1389,
+"op-1xxx11x0": 1374,
+"op-1xxx11xx": 1431,
+"op-1xxx11xx_0": 1353,
+"op-1xxx11xx_1": 1430,
+"op-1xxx11xx_2": 1392,
+"op-1xxx11xx_3": 1340,
+"op-1xxx11xx_4": 1373,
+"op-1xxxx111": 1435,
+"op-1xxxx111_0": 1348,
+"op-1xxxxxxx": 846,
+"op-1xxxxxxx_0": 1150,
+"op-s-00000110": 1420,
+"op-s-00000111": 1407,
+"op-s-00001001": 1410,
+"op-s-0000100x": 1417,
+"op-s-0000100x_0": 1423,
+"op-s-0000111x": 1001,
+"op-s-00110101": 1411,
+"op-s-00110110": 1413,
+"op-s-00110111": 1414,
+"op-s-0011011x": 1415,
+"op-s-0011x1xx": 1421,
+"op-s-0011xxxx": 1409,
+"op-s-0x0xxxxx": 1419,
+"op-s-0x0xxxxx": 1422,
+"op-s-1x001101": 1412,
+"op-s-1x00xxxx": 1405,
+"op-s-1x01xxxx": 1418,
+"op-s-1x01xxxx_0": 1402,
+"op-s-1x01xxxx_1": 1416,
+"op-s-xx10xxxx": 1408,
+"op-s-xx10xxxx_0": 1403,
+"op-s-xx11xxxx": 1404,
+"op-xx11xxxx": 1357,
+"op-xxx011x": 1375,
+"op-xxx1xxxx": 1336,
+"op-xxxx0000": 1424,
+"op-xxxx000x": 1377,
+"op-xxxx0010": 1344,
+"op-xxxx0011": 1333,
+"op-xxxx001x": 1335,
+"op-xxxx00xx": 1433,
+"op-xxxx00xx_0": 1367,
+"op-xxxx0111": 1330,
+"op-xxxx01xx": 1395,
+"op-xxxx0x01": 1385,
+"op-xxxx0x0x": 1324,
+"op-xxxx0xxx": 1040,
+"op-xxxx0xxx_0": 1351,
+"op-xxxx1001": 1326,
+"op-xxxx100x": 1358,
+"op-xxxx10x1": 1365,
+"op-xxxx10x1_0": 1429,
+"op-xxxx10xx": 1325,
+"op-xxxx1100": 1440,
+"op-xxxx111x": 1359,
+"op-xxxx111x_0": 1400,
+"op-xxxx111x_1": 1368,
+"op-xxxx11xx": 1329,
+"op-xxxx11xx_0": 1382,
+"op-xxxx1xx1": 1386,
+"op-xxxx1xxx": 1397,
+"op-xxxxx11x": 1376,
+"op-xxxxx11x_0": 1441,
+"op-xxxxx1xx": 1370,
+"op-xxxxxx0x": 1041,
+"op-xxxxxx1x": 1446,
+"op-xxxxxxx0": 1138,
+"op-xxxxxxx0_0": 1003,
+"op-xxxxxxx1": 1331,
+"op-xxxxxxx1_0": 11,
+"op-xxxxxxx1_1": 1347,
+"op-xxxxxxx1_2": 1086,
 }