Merge branch 'ed' into staging

This commit is contained in:
Barry Silverman 2010-09-25 10:30:11 -04:00
commit b50da0d3ed
3 changed files with 146 additions and 37 deletions

View File

@ -22,7 +22,7 @@
var ctrace = false;
var noGraphics = false;
var loglevel = 3;
var loglevel = 0;
var ridx = 0;
function recalcNodeList(list){

View File

@ -265,17 +265,20 @@ function chipStatus(){
' NMI:' + readBit('nmi');
var machine4 =
' IR:' + hexByte(255 - readBits('notir', 8)) +
' idl:' + hexByte(255 - readBits('idl', 8)) +
' alu:' + hexByte(255 - readBits('alu', 8)) +
' TCstate:' + readBit('clock1') + readBit('clock2') +
readBit('t2') + readBit('t3') + readBit('t4') + readBit('t5');
var machine5 =
' idl:' + hexByte(readBits('idl', 8)) +
' alu:' + hexByte(readBits('alu', 8)) +
' idb:' +hexByte(readBits('idb',8)) +
' dor:' + hexByte(readBits('dor',8));
var machine6 =
' notRdy0:' + readBit('notRdy0') +
' fetch:' + readBit('fetch') +
' clearIR:' + readBit('clearIR') +
' D1x1:' + readBit('D1x1');
setStatus(machine1 + "<br>" + machine2);
if (loglevel>2 && ctrace) {
if (loglevel>2) {
console.log(machine1 + " " + machine2 + " " + machine3 + " " + machine4 + " " + machine5);
}
selectCell(ab);

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@ -1,5 +1,5 @@
/*
Copyright (c) 2010 Brian Silverman, Barry Silverman
Copyright (c) 2010 Brian Silverman, Barry Silverman, Ed Spittles
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
@ -82,7 +82,7 @@ x4: 85,
x5: 589,
x6: 448,
x7: 777,
pcl0: 1139, // machine state: program counter low
pcl0: 1139, // machine state: program counter low (first storage node)
pcl1: 1022,
pcl2: 655,
pcl3: 1359,
@ -90,14 +90,30 @@ pcl4: 900,
pcl5: 622,
pcl6: 377,
pcl7: 1611,
pch7: 205, // machine state: program counter high
pch6: 1551,
pch5: 49,
pch4: 948,
pch3: 584,
pch2: 502,
pclp0: 526, // machine state: program counter low (pre-incremented?, second storage node)
pclp1: 1102,
pclp2: 1411,
pclp3: 868,
pclp4: 15,
pclp5: 1326,
pclp6: 993,
pclp7: 536,
pch0: 1670, // machine state: program counter high (first storage node)
pch1: 292,
pch0: 1670,
pch2: 502,
pch3: 584,
pch4: 948,
pch5: 49,
pch6: 1551,
pch7: 205,
pchp0: 780, // machine state: program counter high (pre-incremented?, second storage node)
pchp1: 126,
pchp2: 114,
pchp3: 1061,
pchp4: 820,
pchp5: 469,
pchp6: 751,
pchp7: 663,
p0: 687, // machine state: status register
p1: 1444,
p2: 1421,
@ -145,14 +161,22 @@ nots4: 1603,
nots5: 601,
nots6: 1029,
nots7: 181,
idl0: 116, // datapath state: internal data latch
idl1: 576,
idl2: 1485,
idl3: 1284,
idl4: 1516,
idl5: 498,
idl6: 1537,
idl7: 529,
notidl0: 116, // datapath state: internal data latch (first storage node)
notidl1: 576,
notidl2: 1485,
notidl3: 1284,
notidl4: 1516,
notidl5: 498,
notidl6: 1537,
notidl7: 529,
idl0: 1597, // datapath signal: internal data latch (driven output)
idl1: 870,
idl2: 1066,
idl3: 464,
idl4: 1306,
idl5: 240,
idl6: 1116,
idl7: 391,
sb0: 54, // datapath bus: special bus
sb1: 1150,
sb2: 1287,
@ -161,14 +185,22 @@ sb4: 1405,
sb5: 166,
sb6: 1336,
sb7: 1001,
alu0: 394, // datapath state: ALU output
alu1: 697,
alu2: 276,
alu3: 495,
alu4: 1490,
alu5: 893,
alu6: 68,
alu7: 1123,
notalu0: 394, // datapath state: alu output storage node (inverse)
notalu1: 697,
notalu2: 276,
notalu3: 495,
notalu4: 1490,
notalu5: 893,
notalu6: 68,
notalu7: 1123,
alu0: 401, // datapath signal: ALU output
alu1: 872,
alu2: 1637,
alu3: 1414,
alu4: 606,
alu5: 314,
alu6: 331,
alu7: 765,
adl0: 413, // internal state: address latch low
adl1: 1282,
adl2: 1242,
@ -193,14 +225,22 @@ idb4: 892,
idb5: 1503,
idb6: 833,
idb7: 493,
dor0: 222, // internal state: data output register
dor1: 527,
dor2: 1288,
dor3: 823,
dor4: 873,
dor5: 1266,
dor6: 1418,
dor7: 158,
notdor0: 222, // internal state: data output register (storage node)
notdor1: 527,
notdor2: 1288,
notdor3: 823,
notdor4: 873,
notdor5: 1266,
notdor6: 1418,
notdor7: 158,
dor0: 97, // internal signal: data output register
dor1: 746,
dor2: 1634,
dor3: 444,
dor4: 1088,
dor5: 1453,
dor6: 1415,
dor7: 63,
pd0: 758, // internal state: predecode register
pd1: 361,
pd2: 955,
@ -370,4 +410,70 @@ pla126: 281,
pla127: 1174,
pla128: 1164,
pla129: 1006, // has extra pulldowns: pla122 and ir0
// internal signals: alu internal (private) busses
alua0: 1167,
alub0: 977,
aluanorb0: 143,
aluanandb0: 1628,
aluaorb0: 693,
notaluoutmux0: 957, // alu result latch input
alua1: 1248,
alub1: 1432,
aluanorb1: 155,
aluanandb1: 841,
aluaorb1: 1021,
notaluoutmux1: 250, // alu result latch input
// internal signals: datapath control signals
dpc0: 801, // drive sb from y
dpc1: 325, // load y from sb
dpc2: 1263, // drive sb from x
dpc3: 1186, // load x from sb
dpc4: 1700, // drive sb from stack pointer
dpc5: 1468, // drive adl from stack pointer
dpc6: 874, // load stack pointer from sb
dpc7: 654, // recirculate stack pointer
dpc8: 1068, // alu b side: select not-idb input
dpc9: 859, // alu b side: select idb input
dpc10: 437, // alu b side: select adl input
dpc11: 549, // alu a side: select sb
dpc12: 984, // alu a side: select zero
dpc13: 59, // alu op: a or b
dpc14: 362, // alu op: logical right shift
dpc15: 574, // alu op: a and b
dpc16: 1666, // alu op: a xor b (?)
dpc17: 921, // alu op: a plus b (?)
notalucin: 1165, // alu carry in
dpc18: 1201, // decimal related? bits 7 and 3 only
dpc19: 214, // alu to sb bit 7 only
dpc20: 129, // alu to sb bits 6-0 only
dpc21: 1015, // alu to adl
dpc22: 725, // decimal related? bits 3 and 4 only
dpc23: 534, // sb to acc
dpc24: 1698, // acc to sb
dpc25: 1060, // sb pass-connects to idb
dpc26: 1331, // acc to idb
dpc27: 140, // sb pass-connects to adh
dpc28: 229, // zero to adh0 bit0 only
dpc29: 203, // zero to adh bits 7-1 only
dpc30: 48, // load pch from adh
dpc31: 741, // load pch from pch incremented
dpc32: 1235, // drive adh from pch incremented
dpc33: 247, // drive idb from pch incremented
dpc34: 1704, // pch carry in and pcl FF detect?
dpc35: 1334, // pcl 0x?F detect - half-carry
dpc36: 379, // pcl carry in
dpc37: 283, // drive idb from pcl incremented
dpc38: 438, // drive adl from pcl incremented
dpc39: 898, // load pcl from pcl incremented
dpc40: 414, // load pcl from adl
dpc41: 1564, // pass-connect adl to mux node driven by idl
dpc42: 41, // pass-connect adh to mux node driven by idl
dpc43: 863, // pass-connect idb to mux node driven by idl
}