Clarified causation statement about T0 T+ time code in 6502 time codes documentation

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mmfoerster 2017-09-19 23:56:43 -04:00
parent 587fa47d8a
commit d39bab7302
1 changed files with 3 additions and 3 deletions

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@ -120,7 +120,7 @@ The time code:
T0 T+ .. .. .. .. [..]
arises when RES is down when a T0 F1 clock state is clocked in. This can be
either the T0 that is usually scheduled for an instruction's last cycle, or
the T0 caused by instruction abort.
arises when RES is down when a T0 phase 1 clock state is clocked in. This can
be either the T0 that is usually scheduled for an instruction's last cycle, or
the T0 caused by instruction abort (later caused by the RES).