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Merge pull request #55 from hoglet67/Z80

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Further work on Z80
This commit is contained in:
BigEd 2018-10-26 18:12:30 +01:00 committed by GitHub
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7 changed files with 19661 additions and 19892 deletions
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690
chip-z80/nodenames.js
View File

@ -1,4 +1,14 @@
// ***********************************************************
// * This file is automatically generated by Z80Simulator. *
// * Please do not manually edit! Instead, find a transistor *
// * that uses the new signal and use FindTransistor(x,y) in *
// * Z80Simulator to cause that signal to be added. *
// * This seems a pain, but it has two advantages: *
// * - all signals are then available in Z80Simulator *
// * - it avoids renumbering issues if/when the PNGs change *
// ***********************************************************
var nodenames ={
// Pads
vss: 1,
vcc: 2,
clk: 3,
@ -45,246 +55,476 @@ db6: 38,
db7: 39,
_halt: 40,
_busak: 41,
// T-States
t1: 115,
t2: 137,
t3: 144,
t4: 166,
t5: 134,
t6: 168,
// Machine cycles
m1: 155,
m2: 173,
m3: 163,
m4: 159,
m5: 209,
m6: 210,
m6: 210,
// EXX latches
ex_af: 631,
ex_bcdehl: 1770,
ex_dehl0: 625,
ex_dehl1: 629,
ex_dehl_combined: 626,
reg_a0: 2271,
reg_f0: 1854,
reg_b0: 2268,
reg_c0: 1851,
reg_d0: 2264,
reg_e0: 1847,
reg_h0: 2266,
reg_l0: 1849,
reg_w0: 2260,
reg_z0: 1843,
reg_pch0: 2258,
reg_pcl0: 1841,
reg_sph0: 2261,
reg_spl0: 1844,
reg_ixh0: 2263,
reg_ixl0: 1846,
reg_iyh0: 2262,
reg_iyl0: 1845,
reg_i0: 2259,
reg_r0: 1842,
reg_aa0: 2270,
reg_ff0: 1853,
reg_bb0: 2269,
reg_cc0: 1852,
reg_dd0: 2265,
reg_ee0: 1848,
reg_hh0: 2267,
reg_ll0: 1850,
reg_a1: 2296,
reg_f1: 1881,
reg_b1: 2293,
reg_c1: 1878,
reg_d1: 2289,
reg_e1: 1874,
reg_h1: 2291,
reg_l1: 1876,
reg_w1: 2285,
reg_z1: 1870,
reg_pch1: 2283,
reg_pcl1: 1868,
reg_sph1: 2286,
reg_spl1: 1871,
reg_ixh1: 2288,
reg_ixl1: 1873,
reg_iyh1: 2287,
reg_iyl1: 1872,
reg_i1: 2284,
reg_r1: 1869,
reg_aa1: 2295,
reg_ff1: 1880,
reg_bb1: 2294,
reg_cc1: 1879,
reg_dd1: 2290,
reg_ee1: 1875,
reg_hh1: 2292,
reg_ll1: 1877,
reg_a2: 2384,
reg_f2: 1958,
reg_b2: 2381,
reg_c2: 1955,
reg_d2: 2377,
reg_e2: 1951,
reg_h2: 2379,
reg_l2: 1953,
reg_w2: 2373,
reg_z2: 1947,
reg_pch2: 2371,
reg_pcl2: 1945,
reg_sph2: 2374,
reg_spl2: 1948,
reg_ixh2: 2376,
reg_ixl2: 1950,
reg_iyh2: 2375,
reg_iyl2: 1949,
reg_i2: 2372,
reg_r2: 1946,
reg_aa2: 2383,
reg_ff2: 1957,
reg_bb2: 2382,
reg_cc2: 1956,
reg_dd2: 2378,
reg_ee2: 1952,
reg_hh2: 2380,
reg_ll2: 1954,
reg_a3: 2416,
reg_f3: 1986,
reg_b3: 2413,
reg_c3: 1983,
reg_d3: 2409,
reg_e3: 1979,
reg_h3: 2411,
reg_l3: 1981,
reg_w3: 2405,
reg_z3: 1975,
reg_pch3: 2403,
reg_pcl3: 1973,
reg_sph3: 2406,
reg_spl3: 1976,
reg_ixh3: 2408,
reg_ixl3: 1978,
reg_iyh3: 2407,
reg_iyl3: 1977,
reg_i3: 2404,
reg_r3: 1974,
reg_aa3: 2415,
reg_ff3: 1985,
reg_bb3: 2414,
reg_cc3: 1984,
reg_dd3: 2410,
reg_ee3: 1980,
reg_hh3: 2412,
reg_ll3: 1982,
reg_a4: 2489,
reg_f4: 2058,
reg_b4: 2486,
reg_c4: 2055,
reg_d4: 2482,
reg_e4: 2051,
reg_h4: 2484,
reg_l4: 2053,
reg_w4: 2478,
reg_z4: 2047,
reg_pch4: 2476,
reg_pcl4: 2045,
reg_sph4: 2479,
reg_spl4: 2048,
reg_ixh4: 2481,
reg_ixl4: 2050,
reg_iyh4: 2480,
reg_iyl4: 2049,
reg_i4: 2477,
reg_r4: 2046,
reg_aa4: 2488,
reg_ff4: 2057,
reg_bb4: 2487,
reg_cc4: 2056,
reg_dd4: 2483,
reg_ee4: 2052,
reg_hh4: 2485,
reg_ll4: 2054,
reg_a5: 2527,
reg_f5: 2082,
reg_b5: 2524,
reg_c5: 2079,
reg_d5: 2520,
reg_e5: 2075,
reg_h5: 2522,
reg_l5: 2077,
reg_w5: 2516,
reg_z5: 2071,
reg_pch5: 2514,
reg_pcl5: 2069,
reg_sph5: 2517,
reg_spl5: 2072,
reg_ixh5: 2519,
reg_ixl5: 2074,
reg_iyh5: 2518,
reg_iyl5: 2073,
reg_i5: 2515,
reg_r5: 2070,
reg_aa5: 2526,
reg_ff5: 2081,
reg_bb5: 2525,
reg_cc5: 2080,
reg_dd5: 2521,
reg_ee5: 2076,
reg_hh5: 2523,
reg_ll5: 2078,
reg_a6: 2610,
reg_f6: 2155,
reg_b6: 2607,
reg_c6: 2152,
reg_d6: 2603,
reg_e6: 2148,
reg_h6: 2605,
reg_l6: 2150,
reg_w6: 2599,
reg_z6: 2144,
reg_pch6: 2597,
reg_pcl6: 2142,
reg_sph6: 2600,
reg_spl6: 2145,
reg_ixh6: 2602,
reg_ixl6: 2147,
reg_iyh6: 2601,
reg_iyl6: 2146,
reg_i6: 2598,
reg_r6: 2143,
reg_aa6: 2609,
reg_ff6: 2154,
reg_bb6: 2608,
reg_cc6: 2153,
reg_dd6: 2604,
reg_ee6: 2149,
reg_hh6: 2606,
reg_ll6: 2151,
reg_a7: 2633,
reg_f7: 2179,
reg_b7: 2630,
reg_c7: 2176,
reg_d7: 2626,
reg_e7: 2172,
reg_h7: 2628,
reg_l7: 2174,
reg_w7: 2622,
reg_z7: 2168,
reg_pch7: 2620,
reg_pcl7: 2166,
reg_sph7: 2623,
reg_spl7: 2169,
reg_ixh7: 2625,
reg_ixl7: 2171,
reg_iyh7: 2624,
reg_iyl7: 2170,
reg_i7: 2621,
reg_r7: 2167,
reg_aa7: 2632,
reg_ff7: 2178,
reg_bb7: 2631,
reg_cc7: 2177,
reg_dd7: 2627,
reg_ee7: 2173,
reg_hh7: 2629,
reg_ll7: 2175,
// Registers
reg_a0: 2245,
reg_a1: 2319,
reg_a2: 2357,
reg_a3: 2442,
reg_a4: 2463,
reg_a5: 2552,
reg_a6: 2586,
reg_a7: 2656,
reg_f0: 1827,
reg_f1: 1903,
reg_f2: 1928,
reg_f3: 2009,
reg_f4: 2032,
reg_f5: 2107,
reg_f6: 2132,
reg_f7: 2209,
reg_b0: 2242,
reg_b1: 2316,
reg_b2: 2354,
reg_b3: 2439,
reg_b4: 2460,
reg_b5: 2549,
reg_b6: 2583,
reg_b7: 2653,
reg_c0: 1824,
reg_c1: 1900,
reg_c2: 1925,
reg_c3: 2006,
reg_c4: 2029,
reg_c5: 2104,
reg_c6: 2129,
reg_c7: 2206,
reg_d0: 2238,
reg_d1: 2312,
reg_d2: 2350,
reg_d3: 2435,
reg_d4: 2456,
reg_d5: 2545,
reg_d6: 2579,
reg_d7: 2649,
reg_e0: 1820,
reg_e1: 1896,
reg_e2: 1921,
reg_e3: 2002,
reg_e4: 2025,
reg_e5: 2100,
reg_e6: 2125,
reg_e7: 2202,
reg_h0: 2240,
reg_h1: 2314,
reg_h2: 2352,
reg_h3: 2437,
reg_h4: 2458,
reg_h5: 2547,
reg_h6: 2581,
reg_h7: 2651,
reg_l0: 1822,
reg_l1: 1898,
reg_l2: 1923,
reg_l3: 2004,
reg_l4: 2027,
reg_l5: 2102,
reg_l6: 2127,
reg_l7: 2204,
reg_w0: 2234,
reg_w1: 2308,
reg_w2: 2346,
reg_w3: 2431,
reg_w4: 2452,
reg_w5: 2541,
reg_w6: 2575,
reg_w7: 2645,
reg_z0: 1816,
reg_z1: 1892,
reg_z2: 1917,
reg_z3: 1998,
reg_z4: 2021,
reg_z5: 2096,
reg_z6: 2121,
reg_z7: 2198,
reg_pch0: 2232,
reg_pch1: 2306,
reg_pch2: 2344,
reg_pch3: 2429,
reg_pch4: 2450,
reg_pch5: 2539,
reg_pch6: 2573,
reg_pch7: 2643,
reg_pcl0: 1814,
reg_pcl1: 1890,
reg_pcl2: 1915,
reg_pcl3: 1996,
reg_pcl4: 2019,
reg_pcl5: 2094,
reg_pcl6: 2119,
reg_pcl7: 2196,
reg_sph0: 2235,
reg_sph1: 2309,
reg_sph2: 2347,
reg_sph3: 2432,
reg_sph4: 2453,
reg_sph5: 2542,
reg_sph6: 2576,
reg_sph7: 2646,
reg_spl0: 1817,
reg_spl1: 1893,
reg_spl2: 1918,
reg_spl3: 1999,
reg_spl4: 2022,
reg_spl5: 2097,
reg_spl6: 2122,
reg_spl7: 2199,
reg_ixh0: 2237,
reg_ixh1: 2311,
reg_ixh2: 2349,
reg_ixh3: 2434,
reg_ixh4: 2455,
reg_ixh5: 2544,
reg_ixh6: 2578,
reg_ixh7: 2648,
reg_ixl0: 1819,
reg_ixl1: 1895,
reg_ixl2: 1920,
reg_ixl3: 2001,
reg_ixl4: 2024,
reg_ixl5: 2099,
reg_ixl6: 2124,
reg_ixl7: 2201,
reg_iyh0: 2236,
reg_iyh1: 2310,
reg_iyh2: 2348,
reg_iyh3: 2433,
reg_iyh4: 2454,
reg_iyh5: 2543,
reg_iyh6: 2577,
reg_iyh7: 2647,
reg_iyl0: 1818,
reg_iyl1: 1894,
reg_iyl2: 1919,
reg_iyl3: 2000,
reg_iyl4: 2023,
reg_iyl5: 2098,
reg_iyl6: 2123,
reg_iyl7: 2200,
reg_i0: 2233,
reg_i1: 2307,
reg_i2: 2345,
reg_i3: 2430,
reg_i4: 2451,
reg_i5: 2540,
reg_i6: 2574,
reg_i7: 2644,
reg_r0: 1815,
reg_r1: 1891,
reg_r2: 1916,
reg_r3: 1997,
reg_r4: 2020,
reg_r5: 2095,
reg_r6: 2120,
reg_r7: 2197,
reg_aa0: 2244,
reg_aa1: 2318,
reg_aa2: 2356,
reg_aa3: 2441,
reg_aa4: 2462,
reg_aa5: 2551,
reg_aa6: 2585,
reg_aa7: 2655,
reg_ff0: 1826,
reg_ff1: 1902,
reg_ff2: 1927,
reg_ff3: 2008,
reg_ff4: 2031,
reg_ff5: 2106,
reg_ff6: 2131,
reg_ff7: 2208,
reg_bb0: 2243,
reg_bb1: 2317,
reg_bb2: 2355,
reg_bb3: 2440,
reg_bb4: 2461,
reg_bb5: 2550,
reg_bb6: 2584,
reg_bb7: 2654,
reg_cc0: 1825,
reg_cc1: 1901,
reg_cc2: 1926,
reg_cc3: 2007,
reg_cc4: 2030,
reg_cc5: 2105,
reg_cc6: 2130,
reg_cc7: 2207,
reg_dd0: 2239,
reg_dd1: 2313,
reg_dd2: 2351,
reg_dd3: 2436,
reg_dd4: 2457,
reg_dd5: 2546,
reg_dd6: 2580,
reg_dd7: 2650,
reg_ee0: 1821,
reg_ee1: 1897,
reg_ee2: 1922,
reg_ee3: 2003,
reg_ee4: 2026,
reg_ee5: 2101,
reg_ee6: 2126,
reg_ee7: 2203,
reg_hh0: 2241,
reg_hh1: 2315,
reg_hh2: 2353,
reg_hh3: 2438,
reg_hh4: 2459,
reg_hh5: 2548,
reg_hh6: 2582,
reg_hh7: 2652,
reg_ll0: 1823,
reg_ll1: 1899,
reg_ll2: 1924,
reg_ll3: 2005,
reg_ll4: 2028,
reg_ll5: 2103,
reg_ll6: 2128,
reg_ll7: 2205,
// Data buses and control
dp_dl: 82,
dl_dp: 165,
load_ir: 1354,
dlatch0: 123,
dlatch1: 195,
dlatch2: 414,
dlatch3: 930,
dlatch4: 1000,
dlatch5: 872,
dlatch6: 751,
dlatch7: 358,
dl_d: 87,
d_dl: 133,
dbus0: 138,
dbus1: 196,
dbus2: 412,
dbus3: 480,
dbus4: 485,
dbus5: 486,
dbus6: 380,
dbus7: 370,
_instr0: 1350,
_instr1: 1360,
_instr2: 1366,
_instr3: 1380,
_instr4: 1388,
_instr5: 1395,
_instr6: 1370,
_instr7: 1375,
instr0: 1348,
instr1: 1359,
instr2: 1365,
instr3: 1379,
instr4: 1387,
instr5: 1394,
instr6: 1369,
instr7: 1374,
d_u: 546,
ubus0: 545,
ubus1: 528,
ubus2: 526,
ubus3: 770,
ubus4: 779,
ubus5: 790,
ubus6: 716,
ubus7: 525,
u_v: 750,
vbus0: 755,
vbus1: 772,
vbus2: 783,
vbus3: 796,
vbus4: 803,
vbus5: 808,
vbus6: 836,
vbus7: 839,
rl_wr: 678,
rh_wr: 652,
r_u: 692,
r_v: 693,
regbit0: 702,
regbit1: 732,
regbit2: 738,
regbit3: 775,
regbit4: 776,
regbit5: 807,
regbit6: 809,
regbit7: 864,
regbit8: 870,
regbit9: 902,
regbit10: 906,
regbit11: 934,
regbit12: 935,
regbit13: 970,
regbit14: 973,
regbit15: 999,
r_p: 1785,
r_x1: 608,
pcbit0: 703,
pcbit1: 731,
pcbit2: 739,
pcbit3: 774,
pcbit4: 777,
pcbit5: 806,
pcbit6: 810,
pcbit7: 863,
pcbit8: 871,
pcbit9: 901,
pcbit10: 907,
pcbit11: 933,
pcbit12: 936,
pcbit13: 969,
pcbit14: 974,
pcbit15: 998,
// ALU
alubus0: 837,
alubus1: 889,
alubus2: 937,
alubus3: 983,
alubus4: 852,
alubus5: 903,
alubus6: 951,
alubus7: 995,
alua0: 850,
alua1: 899,
alua2: 947,
alua3: 993,
alua4: 868,
alua5: 920,
alua6: 968,
alua7: 1007,
alub0: 845,
alub1: 897,
alub2: 944,
alub3: 988,
alub4: 867,
alub5: 918,
alub6: 966,
alub7: 1005,
aluout0: 2211,
aluout1: 2338,
aluout2: 2504,
aluout3: 816,
alulat0: 865,
alulat1: 912,
alulat2: 960,
alulat3: 1002,
// PLA
pla0: 287,
pla1: 332,
pla2: 314,
pla3: 333,
pla4: 315,
pla5: 334,
pla6: 316,
pla7: 335,
pla8: 317,
pla9: 336,
pla10: 318,
pla11: 361,
pla12: 261,
pla13: 337,
pla14: 319,
pla15: 464,
pla16: 288,
pla17: 338,
pla18: 320,
pla19: 364,
pla20: 325,
pla21: 324,
pla22: 308,
pla23: 289,
pla24: 339,
pla25: 313,
pla26: 340,
pla27: 290,
pla28: 341,
pla29: 291,
pla30: 342,
pla31: 292,
pla32: 365,
pla33: 293,
pla34: 362,
pla35: 294,
pla36: 331,
pla37: 293,
pla38: 343,
pla39: 296,
pla40: 297,
pla41: 298,
pla42: 344,
pla43: 299,
pla44: 269,
pla45: 300,
pla46: 237,
pla47: 301,
pla48: 345,
pla49: 302,
pla50: 346,
pla51: 264,
pla52: 266,
pla53: 347,
pla54: 303,
pla55: 356,
pla56: 227,
pla57: 366,
pla58: 304,
pla59: 305,
pla60: 271,
pla61: 348,
pla62: 306,
pla63: 309,
pla64: 311,
pla65: 312,
pla66: 307,
pla67: 367,
pla68: 272,
pla69: 349,
pla70: 273,
pla71: 350,
pla72: 274,
pla73: 351,
pla74: 275,
pla75: 276,
pla76: 268,
pla77: 352,
pla78: 277,
pla79: 278,
pla80: 279,
pla81: 280,
pla82: 368,
pla83: 281,
pla84: 282,
pla85: 283,
pla86: 284,
pla87: 285,
pla88: 286,
pla89: 321,
pla90: 353,
pla91: 322,
pla92: 354,
pla93: 323,
pla94: 369,
pla95: 258,
pla96: 249,
pla97: 245,
pla98: 355,
}

31034
chip-z80/segdefs.js
View File

File diff suppressed because one or more lines are too long

204
chip-z80/support.js
View File

@ -19,11 +19,45 @@ presetLogLists=[
['cycle',],
['ab', 'db', '_m1', '_rd', '_wr', '_mreq', '_iorq', 'State', 'pc', 'Fetch'],
['a', 'f', 'bc', 'de', 'hl', 'ix', 'iy', 'sp'],
['a2', 'f2', 'bc2', 'de2', 'hl2'],
['wz', 'ir'],
['alubus', '-alua', '-alub', 'aluout', 'alulat'],
['d_u', 'r_u', '-ubus', 'r_v', 'u_v', '-vbus', 'regbit', 'r_p', 'pcbit', 'rl_wr', 'rh_wr', 'r_x1'],
['dp_dl', 'dl_dp', '-dlatch', 'dl_d', 'd_dl', '-dbus', 'instr', 'load_ir'],
['a2', 'f2', 'bc2', 'de2', 'hl2'],
['_int','_nmi', nodenamereset],
];
// Override ChipSim getNodeValue() function to allow an estimate of capacitance
// (number of connections) to be used when joining floating segments.
function getNodeValue(){
// 1. deal with power connections first
if(arrayContains(group, ngnd)) return false;
if(arrayContains(group, npwr)) return true;
// 2. deal with pullup/pulldowns next
for(var i in group){
var nn = group[i];
var n = nodes[nn];
if(n.pullup) return true;
if(n.pulldown) return false;
}
// 3. resolve connected set of floating nodes
// based on state of largest (by #connections) node
// (previously this was any node with state true wins)
var max_state = false;
var max_connections = 0;
for(var i in group){
var nn = group[i];
var n = nodes[nn];
var connections = n.gates.length + n.c1c2s.length;
if (connections > max_connections) {
max_connections = connections;
max_state = n.state;
}
}
return max_state;
}
function setupTransistors(){
for(i in transdefs){
var tdef = transdefs[i];
@ -45,6 +79,15 @@ function setupTransistors(){
}
}
function stepBack(){
if(cycle==0) return;
showState(trace[--cycle].chip);
setMem(trace[cycle].mem);
var clk = isNodeHigh(nodenames['clk']);
if(!clk) writeDataBus(mRead(readAddressBus()));
chipStatus();
}
// simulate a single clock phase with no update to graphics or trace
function halfStep(){
var clk = isNodeHigh(nodenames['clk']);
@ -110,22 +153,27 @@ var state = 0;
var last_rd_done = 1;
function handleBusRead(){
if(!isNodeHigh(nodenames['_m1']) && !isNodeHigh(nodenames['_iorq'])) {
// Interrupt acknownledge cycle, force 0xFF onto the bus
// In IM0 this is seen as RST 0x38
// In IM1 this is ignored
// In IM2 this is used as the low byte of the vector
// TODO: ideally this "vector" would be a configurable parameter
writeDataBus(0xff);
} else if(!isNodeHigh(nodenames['_rd'])){
if(!isNodeHigh(nodenames['_rd']) && !isNodeHigh(nodenames['_mreq'])) {
// Memory read
var a = readAddressBus();
var d = eval(readTriggers[a]);
if(d == undefined)
d = mRead(readAddressBus());
if(!isNodeHigh(nodenames['_m1']) && !isNodeHigh(nodenames['_mreq'])) {
if(!isNodeHigh(nodenames['_m1'])) {
eval(fetchTriggers[d]);
}
writeDataBus(d);
} else if(!isNodeHigh(nodenames['_m1']) && !isNodeHigh(nodenames['_iorq'])) {
// Interrupt acknownledge cycle, force 0xFF onto the bus
// In IM0 this is seen as JP (HL)
// In IM1 this is ignored
// In IM2 this is used as the low byte of the vector
// TODO: ideally this "vector" would be a configurable parameter
writeDataBus(0xe9);
} else {
// In all other cases we set the data bus to FF
// as a crude indicateion that it's not being driven
writeDataBus(0xff);
}
// Prefix / displacement / opcode state machine, deals with:
@ -212,48 +260,48 @@ function handleBusWrite(){
function readA() {
if (!isNodeHigh(nodenames['ex_af'])) {
return 0xFF ^ readBits('reg_aa', 8);
return readBits('reg_aa', 8);
} else {
return 0xFF ^ readBits('reg_a', 8);
return readBits('reg_a', 8);
}
}
function readF() {
if (!isNodeHigh(nodenames['ex_af'])) {
return 0xFF ^ readBits('reg_ff', 8);
return readBits('reg_ff', 8);
} else {
return 0xFF ^ readBits('reg_f', 8);
return readBits('reg_f', 8);
}
}
function readB() {
if (isNodeHigh(nodenames['ex_bcdehl'])) {
return 0xFF ^ readBits('reg_bb', 8);
return readBits('reg_bb', 8);
} else {
return 0xFF ^ readBits('reg_b', 8);
return readBits('reg_b', 8);
}
}
function readC() {
if (isNodeHigh(nodenames['ex_bcdehl'])) {
return 0xFF ^ readBits('reg_cc', 8);
return readBits('reg_cc', 8);
} else {
return 0xFF ^ readBits('reg_c', 8);
return readBits('reg_c', 8);
}
}
function readD() {
if (isNodeHigh(nodenames['ex_bcdehl'])) {
if (isNodeHigh(nodenames['ex_dehl1'])) {
return 0xFF ^ readBits('reg_hh', 8);
return readBits('reg_hh', 8);
} else {
return 0xFF ^ readBits('reg_dd', 8);
return readBits('reg_dd', 8);
}
} else {
if (isNodeHigh(nodenames['ex_dehl0'])) {
return 0xFF ^ readBits('reg_h', 8);
return readBits('reg_h', 8);
} else {
return 0xFF ^ readBits('reg_d', 8);
return readBits('reg_d', 8);
}
}
}
@ -261,15 +309,15 @@ function readD() {
function readE() {
if (isNodeHigh(nodenames['ex_bcdehl'])) {
if (isNodeHigh(nodenames['ex_dehl1'])) {
return 0xFF ^ readBits('reg_ll', 8);
return readBits('reg_ll', 8);
} else {
return 0xFF ^ readBits('reg_ee', 8);
return readBits('reg_ee', 8);
}
} else {
if (isNodeHigh(nodenames['ex_dehl0'])) {
return 0xFF ^ readBits('reg_l', 8);
return readBits('reg_l', 8);
} else {
return 0xFF ^ readBits('reg_e', 8);
return readBits('reg_e', 8);
}
}
}
@ -277,15 +325,15 @@ function readE() {
function readH() {
if (isNodeHigh(nodenames['ex_bcdehl'])) {
if (isNodeHigh(nodenames['ex_dehl1'])) {
return 0xFF ^ readBits('reg_dd', 8);
return readBits('reg_dd', 8);
} else {
return 0xFF ^ readBits('reg_hh', 8);
return readBits('reg_hh', 8);
}
} else {
if (isNodeHigh(nodenames['ex_dehl0'])) {
return 0xFF ^ readBits('reg_d', 8);
return readBits('reg_d', 8);
} else {
return 0xFF ^ readBits('reg_h', 8);
return readBits('reg_h', 8);
}
}
}
@ -293,63 +341,63 @@ function readH() {
function readL() {
if (isNodeHigh(nodenames['ex_bcdehl'])) {
if (isNodeHigh(nodenames['ex_dehl1'])) {
return 0xFF ^ readBits('reg_ee', 8);
return readBits('reg_ee', 8);
} else {
return 0xFF ^ readBits('reg_ll', 8);
return readBits('reg_ll', 8);
}
} else {
if (isNodeHigh(nodenames['ex_dehl0'])) {
return 0xFF ^ readBits('reg_e', 8);
return readBits('reg_e', 8);
} else {
return 0xFF ^ readBits('reg_l', 8);
return readBits('reg_l', 8);
}
}
}
function readA2() {
if (isNodeHigh(nodenames['ex_af'])) {
return 0xFF ^ readBits('reg_aa', 8);
return readBits('reg_aa', 8);
} else {
return 0xFF ^ readBits('reg_a', 8);
return readBits('reg_a', 8);
}
}
function readF2() {
if (isNodeHigh(nodenames['ex_af'])) {
return 0xFF ^ readBits('reg_ff', 8);
return readBits('reg_ff', 8);
} else {
return 0xFF ^ readBits('reg_f', 8);
return readBits('reg_f', 8);
}
}
function readB2() {
if (!isNodeHigh(nodenames['ex_bcdehl'])) {
return 0xFF ^ readBits('reg_bb', 8);
return readBits('reg_bb', 8);
} else {
return 0xFF ^ readBits('reg_b', 8);
return readBits('reg_b', 8);
}
}
function readC2() {
if (!isNodeHigh(nodenames['ex_bcdehl'])) {
return 0xFF ^ readBits('reg_cc', 8);
return readBits('reg_cc', 8);
} else {
return 0xFF ^ readBits('reg_c', 8);
return readBits('reg_c', 8);
}
}
function readD2() {
if (!isNodeHigh(nodenames['ex_bcdehl'])) {
if (isNodeHigh(nodenames['ex_dehl1'])) {
return 0xFF ^ readBits('reg_hh', 8);
return readBits('reg_hh', 8);
} else {
return 0xFF ^ readBits('reg_dd', 8);
return readBits('reg_dd', 8);
}
} else {
if (isNodeHigh(nodenames['ex_dehl0'])) {
return 0xFF ^ readBits('reg_h', 8);
return readBits('reg_h', 8);
} else {
return 0xFF ^ readBits('reg_d', 8);
return readBits('reg_d', 8);
}
}
}
@ -357,15 +405,15 @@ function readD2() {
function readE2() {
if (!isNodeHigh(nodenames['ex_bcdehl'])) {
if (isNodeHigh(nodenames['ex_dehl1'])) {
return 0xFF ^ readBits('reg_ll', 8);
return readBits('reg_ll', 8);
} else {
return 0xFF ^ readBits('reg_ee', 8);
return readBits('reg_ee', 8);
}
} else {
if (isNodeHigh(nodenames['ex_dehl0'])) {
return 0xFF ^ readBits('reg_l', 8);
return readBits('reg_l', 8);
} else {
return 0xFF ^ readBits('reg_e', 8);
return readBits('reg_e', 8);
}
}
}
@ -373,15 +421,15 @@ function readE2() {
function readH2() {
if (!isNodeHigh(nodenames['ex_bcdehl'])) {
if (isNodeHigh(nodenames['ex_dehl1'])) {
return 0xFF ^ readBits('reg_dd', 8);
return readBits('reg_dd', 8);
} else {
return 0xFF ^ readBits('reg_hh', 8);
return readBits('reg_hh', 8);
}
} else {
if (isNodeHigh(nodenames['ex_dehl0'])) {
return 0xFF ^ readBits('reg_d', 8);
return readBits('reg_d', 8);
} else {
return 0xFF ^ readBits('reg_h', 8);
return readBits('reg_h', 8);
}
}
}
@ -389,30 +437,30 @@ function readH2() {
function readL2() {
if (!isNodeHigh(nodenames['ex_bcdehl'])) {
if (isNodeHigh(nodenames['ex_dehl1'])) {
return 0xFF ^ readBits('reg_ee', 8);
return readBits('reg_ee', 8);
} else {
return 0xFF ^ readBits('reg_ll', 8);
return readBits('reg_ll', 8);
}
} else {
if (isNodeHigh(nodenames['ex_dehl0'])) {
return 0xFF ^ readBits('reg_e', 8);
return readBits('reg_e', 8);
} else {
return 0xFF ^ readBits('reg_l', 8);
return readBits('reg_l', 8);
}
}
}
function readI(){return 0xFF ^ readBits('reg_i', 8);}
function readR(){return 0xFF ^ readBits('reg_r', 8);}
function readW(){return 0xFF ^ readBits('reg_w', 8);}
function readZ(){return 0xFF ^ readBits('reg_z', 8);}
function readI(){return readBits('reg_i', 8);}
function readR(){return readBits('reg_r', 8);}
function readW(){return readBits('reg_w', 8);}
function readZ(){return readBits('reg_z', 8);}
function readIX(){return 0xFFFF ^ ((readBits('reg_ixh', 8)<<8) + readBits('reg_ixl', 8));}
function readIY(){return 0xFFFF ^ ((readBits('reg_iyh', 8)<<8) + readBits('reg_iyl', 8));}
function readSP(){return 0xFFFF ^ ((readBits('reg_sph', 8)<<8) + readBits('reg_spl', 8));}
function readPC(){return 0xFFFF ^ ((readBits('reg_pch', 8)<<8) + readBits('reg_pcl', 8));}
function readPCL(){return 0xFF ^ readBits('reg_pcl', 8);}
function readPCH(){return 0xFF ^ readBits('reg_pch', 8);}
function readIX(){return (readBits('reg_ixh', 8)<<8) + readBits('reg_ixl', 8);}
function readIY(){return (readBits('reg_iyh', 8)<<8) + readBits('reg_iyl', 8);}
function readSP(){return (readBits('reg_sph', 8)<<8) + readBits('reg_spl', 8);}
function readPC(){return (readBits('reg_pch', 8)<<8) + readBits('reg_pcl', 8);}
function readPCL(){return readBits('reg_pcl', 8);}
function readPCH(){return readBits('reg_pch', 8);}
function formatFstring(f){
var result;
@ -444,14 +492,6 @@ function listActiveTCStates() {
return s.join(" ");
}
function busToHexInv(busname){
var value=busToHex(busname)
if (typeof value != "undefined")
return value.replace(/./g,function(x){return (15-parseInt(x,16)).toString(16)});
else
return undefined;;
}
function busToString(busname){
// takes a signal name or prefix
// returns an appropriate string representation
@ -479,17 +519,17 @@ function busToString(busname){
if(busname=='hl2')
return hexByte(readH2()) + hexByte(readL2());
if(busname=='ir')
return busToHexInv('reg_i') + busToHexInv('reg_r');
return busToHex('reg_i') + busToHex('reg_r');
if(busname=='wz')
return busToHexInv('reg_w') + busToHexInv('reg_z');
return busToHex('reg_w') + busToHex('reg_z');
if(busname=='pc')
return busToHexInv('reg_pch') + busToHexInv('reg_pcl');
return busToHex('reg_pch') + busToHex('reg_pcl');
if(busname=='sp')
return busToHexInv('reg_sph') + busToHexInv('reg_spl');
return busToHex('reg_sph') + busToHex('reg_spl');
if(busname=='ix')
return busToHexInv('reg_ixh') + busToHexInv('reg_ixl');
return busToHex('reg_ixh') + busToHex('reg_ixl');
if(busname=='iy')
return busToHexInv('reg_iyh') + busToHexInv('reg_iyl');
return busToHex('reg_iyh') + busToHex('reg_iyl');
if(busname=='State')
return listActiveTCStates();
// DMB: TODO

7601
chip-z80/transdefs.js
View File

File diff suppressed because it is too large Load Diff

2
chipsim.js
View File

@ -158,7 +158,7 @@ function allNodes(){
function stateString(){
var codes = ['l','h'];
var res = '';
for(var i=0;i<1725;i++){
for(var i=0;i<nodes.length;i++){
var n = nodes[i];
if(n==undefined) res+='x';
else if(i==ngnd) res+='g';

2
expertWires.js
View File

@ -487,7 +487,7 @@ function handleClick(e){
var cx = Math.round(x*grChipSize/600);
var cy = Math.round(y*grChipSize/600);
// prepare two lines of status report
var s1='x: ' + cx + ' y: ' + cy;
var s1='x: ' + (cx - grChipOffsetX) + ' y: ' + (cy - grChipOffsetY);
var s2='node:&nbsp;' + w + '&nbsp;' + nodeName(w);
if(w==-1) {
setStatus(s1); // no node found, so report only coordinates

20
wires.js
View File

@ -204,9 +204,23 @@ function ctxDrawBox(ctx, xMin, yMin, xMax, yMax){
function zoomToBox(xmin,xmax,ymin,ymax){
var xmid=(xmin+xmax)/2;
var ymid=(ymin+ymax)/2;
var x=(xmid+400)/grChipSize*600;
var y=600-ymid/grChipSize*600;
var zoom=5; // pending a more careful calculation
var x=(xmid+grChipOffsetX)/grChipSize*600;
var y=600-(ymid-grChipOffsetY)/grChipSize*600;
// Zoom to fill 80% of the window with the selection
var fillfactor=0.80;
var dx=xmax-xmin;
var dy=ymax-ymin;
if (dx < 1) dx=1;
if (dy < 1) dy=1;
var zx=(800/600)*fillfactor*grChipSize/dx;
var zy=fillfactor*grChipSize/dy;
var zoom=Math.min(zx,zy);
if (zoom < 1) {
zoom = 1;
}
if (zoom > grMaxZoom) {
zoom = grMaxZoom;
}
moveHere([x,y,zoom]);
}