cb7815e1ad
Z80: Visualization improvements concerning: panelization, holes, diagnonals
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(3 commits squashed together to reduce the size, as they each affect seggefs.js)
- updated segdefs.js to fix some panelization artefacts
- override drawSeg() to deal with holes in shapes; updated segdefs.js
- updated segdefs.js with adjacent diagonals just touching
2019-03-04 08:50:39 +00:00
9760663cc1
Z80: avoid the need to invert the register values in Javascript
2018-10-12 12:40:59 +01:00
a92f443ac1
Z80: fix stepBack(), drive IntAck value of 0xe9, add lots more internal busses (with Ed)
2018-10-09 22:01:28 +01:00
f360557572
Z80: override chipsim getNodeValue() to better model charge sharing
2018-10-08 10:33:44 +01:00
5005774b1b
Z80: updated handleBusRead() to leave the databus at 0xFF between reads
2018-10-08 10:27:36 +01:00
6fcb3077eb
Z80: In INTACK cycle, force 0xFF onto the databus
2018-09-30 15:14:40 +01:00
d9c92ebdc3
Z80: corrected typo in flag name
2018-09-22 16:29:19 +01:00
7d579fa4aa
Z80: whitespace only
2018-09-22 11:02:18 +01:00
e33f40e60c
Z80: Corrected fetch state machine to cover all cases correctly
2018-09-22 10:58:48 +01:00
379d2d1ea1
Z80: Seperate A/F and format flags individually
2018-09-22 09:45:51 +01:00
59792d75fc
All: added variables for grChipOffsetX/gfChipOffsetY (previously hardcoded to 400/0)
2018-09-22 09:30:47 +01:00
2f882d7d34
Z80: Start with clock high
2018-09-21 18:03:50 +01:00
b9e235fac2
Z80: display remapped registers (so INC D always increments D)
2018-09-21 17:48:51 +01:00
0e4c3e0ab0
Z80: Added disassembly
2018-09-21 16:51:58 +01:00
767e2492be
Z80: Set grCanvasSize to 5000, so mistakes are clearer
2018-09-21 10:32:20 +01:00
95f9d52306
Z80: Adjusted chip/canvas size and max zoom
2018-09-21 10:32:20 +01:00
646f22b79e
Z80: segdefs.js now contains polygon information
2018-09-21 10:32:20 +01:00
2ff43fafb3
Z80: Expose alterate register state and register set selection flipflops
2018-09-19 18:52:43 +01:00
8a9fe6f57e
Extended test program to test simple memory writes
2018-09-19 15:07:27 +01:00
85058171b2
Z80: Added ir and wr registers
2018-09-19 13:50:31 +01:00
7a0cb72539
Initial checking of chip-z80
2018-09-19 13:27:39 +01:00
David Banks