David Banks
|
deb6833f8a
|
Z80: updated segdefs.js based on new boundary tracing algorithm
|
2018-10-26 16:40:14 +01:00 |
|
David Banks
|
a4ed7a9178
|
Z80: updated transdefs to have accurate bounding box for transistors
|
2018-10-14 12:28:25 +01:00 |
|
David Banks
|
9795b463ac
|
Z80: Updated nodenames.js to include warning about manual editing
|
2018-10-12 13:51:06 +01:00 |
|
David Banks
|
b384fb552f
|
Z80: Update netlist to fix the IM2 vector issue (missing pass transistor)
|
2018-10-12 13:08:57 +01:00 |
|
David Banks
|
9760663cc1
|
Z80: avoid the need to invert the register values in Javascript
|
2018-10-12 12:40:59 +01:00 |
|
David Banks
|
3ae93282ba
|
Z80: switch to machine generates nodenames.js (please don't edit\!)
|
2018-10-12 12:30:03 +01:00 |
|
David Banks
|
ab53a12b2e
|
Z80: added pla signals to nodenames.js
|
2018-10-11 12:52:57 +01:00 |
|
David Banks
|
a92f443ac1
|
Z80: fix stepBack(), drive IntAck value of 0xe9, add lots more internal busses (with Ed)
|
2018-10-09 22:01:28 +01:00 |
|
David Banks
|
f360557572
|
Z80: override chipsim getNodeValue() to better model charge sharing
|
2018-10-08 10:33:44 +01:00 |
|
David Banks
|
5005774b1b
|
Z80: updated handleBusRead() to leave the databus at 0xFF between reads
|
2018-10-08 10:27:36 +01:00 |
|
David Banks
|
924074e305
|
Z80: Updated netlist using data that include burried contact at 488,2761 (Ken, 2014)
|
2018-10-07 13:30:52 +01:00 |
|
Ed Spittles
|
b0c40b9e7b
|
add URL control of some Z80 inputs
|
2018-10-06 13:58:37 +01:00 |
|
David Banks
|
6fcb3077eb
|
Z80: In INTACK cycle, force 0xFF onto the databus
|
2018-09-30 15:14:40 +01:00 |
|
David Banks
|
cbebb0e11d
|
Z80: Added additional nodenames for int/nmi
|
2018-09-30 15:14:40 +01:00 |
|
David Banks
|
d9c92ebdc3
|
Z80: corrected typo in flag name
|
2018-09-22 16:29:19 +01:00 |
|
David Banks
|
651a1753b7
|
Z80: update test program
|
2018-09-22 15:27:27 +01:00 |
|
David Banks
|
f5cada53f7
|
Z80: Updated transdefs.js with a version that replaces trap transistor with a hard short it's drain to ground (just connecting trap gate to VCC was not sufficient)
|
2018-09-22 14:34:53 +01:00 |
|
David Banks
|
7d579fa4aa
|
Z80: whitespace only
|
2018-09-22 11:02:18 +01:00 |
|
David Banks
|
e33f40e60c
|
Z80: Corrected fetch state machine to cover all cases correctly
|
2018-09-22 10:58:48 +01:00 |
|
David Banks
|
379d2d1ea1
|
Z80: Seperate A/F and format flags individually
|
2018-09-22 09:45:51 +01:00 |
|
David Banks
|
59792d75fc
|
All: added variables for grChipOffsetX/gfChipOffsetY (previously hardcoded to 400/0)
|
2018-09-22 09:30:47 +01:00 |
|
David Banks
|
225b49a6d8
|
Z80: Correct bounding box for transistor in transdefs.js
|
2018-09-21 22:00:51 +01:00 |
|
David Banks
|
3de51801ea
|
Z80: Updated test program to include call
|
2018-09-21 18:04:18 +01:00 |
|
David Banks
|
2f882d7d34
|
Z80: Start with clock high
|
2018-09-21 18:03:50 +01:00 |
|
David Banks
|
b9e235fac2
|
Z80: display remapped registers (so INC D always increments D)
|
2018-09-21 17:48:51 +01:00 |
|
David Banks
|
0e4c3e0ab0
|
Z80: Added disassembly
|
2018-09-21 16:51:58 +01:00 |
|
David Banks
|
767e2492be
|
Z80: Set grCanvasSize to 5000, so mistakes are clearer
|
2018-09-21 10:32:20 +01:00 |
|
David Banks
|
95f9d52306
|
Z80: Adjusted chip/canvas size and max zoom
|
2018-09-21 10:32:20 +01:00 |
|
David Banks
|
646f22b79e
|
Z80: segdefs.js now contains polygon information
|
2018-09-21 10:32:20 +01:00 |
|
David Banks
|
2ff43fafb3
|
Z80: Expose alterate register state and register set selection flipflops
|
2018-09-19 18:52:43 +01:00 |
|
David Banks
|
8a9fe6f57e
|
Extended test program to test simple memory writes
|
2018-09-19 15:07:27 +01:00 |
|
David Banks
|
3315f309a7
|
Added EXX to test program, as we seem to start off with alternative BC/DE/HL active
|
2018-09-19 14:45:41 +01:00 |
|
David Banks
|
85058171b2
|
Z80: Added ir and wr registers
|
2018-09-19 13:50:31 +01:00 |
|
David Banks
|
7a0cb72539
|
Initial checking of chip-z80
|
2018-09-19 13:27:39 +01:00 |
|