David Banks
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d9c92ebdc3
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Z80: corrected typo in flag name
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2018-09-22 16:29:19 +01:00 |
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David Banks
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7d579fa4aa
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Z80: whitespace only
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2018-09-22 11:02:18 +01:00 |
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David Banks
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e33f40e60c
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Z80: Corrected fetch state machine to cover all cases correctly
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2018-09-22 10:58:48 +01:00 |
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David Banks
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379d2d1ea1
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Z80: Seperate A/F and format flags individually
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2018-09-22 09:45:51 +01:00 |
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David Banks
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59792d75fc
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All: added variables for grChipOffsetX/gfChipOffsetY (previously hardcoded to 400/0)
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2018-09-22 09:30:47 +01:00 |
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David Banks
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2f882d7d34
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Z80: Start with clock high
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2018-09-21 18:03:50 +01:00 |
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David Banks
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b9e235fac2
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Z80: display remapped registers (so INC D always increments D)
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2018-09-21 17:48:51 +01:00 |
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David Banks
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0e4c3e0ab0
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Z80: Added disassembly
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2018-09-21 16:51:58 +01:00 |
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David Banks
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767e2492be
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Z80: Set grCanvasSize to 5000, so mistakes are clearer
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2018-09-21 10:32:20 +01:00 |
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David Banks
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95f9d52306
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Z80: Adjusted chip/canvas size and max zoom
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2018-09-21 10:32:20 +01:00 |
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David Banks
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646f22b79e
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Z80: segdefs.js now contains polygon information
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2018-09-21 10:32:20 +01:00 |
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David Banks
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2ff43fafb3
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Z80: Expose alterate register state and register set selection flipflops
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2018-09-19 18:52:43 +01:00 |
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David Banks
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8a9fe6f57e
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Extended test program to test simple memory writes
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2018-09-19 15:07:27 +01:00 |
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David Banks
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85058171b2
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Z80: Added ir and wr registers
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2018-09-19 13:50:31 +01:00 |
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David Banks
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7a0cb72539
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Initial checking of chip-z80
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2018-09-19 13:27:39 +01:00 |
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