Merge branch 'ed' into svg

Merge branch 'patch-1' of http://github.com/BigEd/visual6502 into ed
2025-07-09 05:24:02 +00:00 · 2013-06-26 17:23:51 -04:00 · 2013-06-26 17:23:14 -04:00 · 2013-06-25 17:25:09 -04:00 · 2013-06-25 22:31:53 +02:00 · 2013-06-24 18:53:07 +02:00
12 changed files with 4743 additions and 3826 deletions
--- a/6502N.svg
+++ b/6502N.svg
--- a/2
+++ b/2
@ -1,4 +1,4 @@
-This is the javascript simulator from the visual5602.org project:
+This is the JavaScript simulator from the visual5602.org project:
 www.visual6502.org/JSSim

 It includes a general purpose transistor-level simulator, layout browser,
--- a/chip-6800/nodenames.js
+++ b/chip-6800/nodenames.js
@ -26,7 +26,8 @@ vcc: 31,       // pads: power
 phi1: 1507,    // pads: phase 1 clock input
 phi2: 1511,    // pads: phase 2 clock input
 reset: 1461,   // pads: reset
-db0: 686,       // pads: data bus
+
+db0: 686,       // pads: data bus (should really be called d)
 db1: 683,
 db2: 677,
 db3: 676,
@ -34,7 +35,8 @@ db4: 669,
 db5: 670,
 db6: 664,
 db7: 691,
-ab0: 1854,       // pads: address bus
+
+ab0: 1854,       // pads: address bus (should really be called a)
 ab1: 1857,
 ab2: 1855,
 ab3: 1858,
@ -50,6 +52,7 @@ ab12: 1948,
 ab13: 1946,
 ab14: 1949,
 ab15: 1947,
+
 irq: 1496,     // input pads: interrupt request (active low)
 nmi: 1501,     // pads: non maskable interrupt (active low)
 dbe: 1456,     // pads: data bus enable
@ -60,8 +63,206 @@ vma: 1971,     // pads: valid memory address
 ba: 1964,      // pads: bus available
 //

-// internal state: Instruction Register
-ir0: 1301,
+// major internal busses
+
+idb0: 610,  // internal databus (should be called db)
+idb1: 1593,
+idb2: 387,
+idb3: 386,
+idb4: 311,
+idb5: 310,
+idb6: 393,
+idb7: 1651,
+
+abh0: 267, // internal bus: address bus high
+abh1: 258,
+abh2: 266,
+abh3: 257,
+abh4: 265,
+abh5: 256,
+abh6: 259,
+abh7: 255,
+
+abl0: 1670,  // internal bus: address bus low
+abl1: 1671,
+abl2: 1653,
+abl3: 1667,
+abl4: 1655,
+abl5: 1657,
+abl6: 1656,
+abl7: 1658,
+
+ablx0: 1683,  // internal bus: extension of abl bus
+ablx1: 1682,
+ablx2: 1689,
+ablx3: 1687,
+ablx4: 1694,
+ablx5: 1693,
+ablx6: 1698,
+ablx7: 1697,
+
+i0: 1271,  // pla word lines
+i1: 1269,
+i2: 1268,
+i3: 1267,
+i4: 1265,
+i5: 1264,
+i6: 1263,
+i7: 1261,
+
+// programmer-visible state
+
+flagc: 1160, // status word flags
+flagh: 785,
+flagi: 1007,
+flagn: 1005,
+flagv: 1124,
+flagz: 1026,
+
+acca0: 1934,  // a register: accumulator a
+acca1: 1688,
+acca2: 1700,
+acca3: 1699,
+acca4: 1701,
+acca5: 1702,
+acca6: 1703,
+acca7: 1784,
+
+accb0: 1919,  // b register: accumulator b
+accb1: 1927,
+accb2: 1921,
+accb3: 1929,
+accb4: 1923,
+accb5: 1931,
+accb6: 1925,
+accb7: 1933,
+
+ixh0: 1910, // index register high
+ixh1: 1914,
+ixh2: 1911,
+ixh3: 1915,
+ixh4: 1912,
+ixh5: 1916,
+ixh6: 1913,
+ixh7: 1917,
+ixl0: 1918, // index register low
+ixl1: 1926,
+ixl2: 1920,
+ixl3: 1928,
+ixl4: 1922,
+ixl5: 1930,
+ixl6: 1924,
+ixl7: 1932,
+
+pch0: 1878, // program counter high register
+pch1: 1882,
+pch2: 1879,
+pch3: 1883,
+pch4: 1880,
+pch5: 1884,
+pch6: 1881,
+pch7: 1885,
+pcl0: 1877, // program counter low register
+pcl1: 1873,
+pcl2: 1876,
+pcl3: 1872,
+pcl4: 1875,
+pcl5: 1871,
+pcl6: 1874,
+pcl7: 1870,
+
+sph0: 1909,  // stack pointer high register
+sph1: 1908,
+sph2: 1907,
+sph3: 1906,
+sph4: 1905,
+sph5: 1904,
+sph6: 1903,
+sph7: 1902,
+spl0: 1894,  // stack pointer low register
+spl1: 1898,
+spl2: 1895,
+spl3: 1899,
+spl4: 1896,
+spl5: 1900,
+spl6: 1897,
+spl7: 1901,
+
+// datapath state not visible to the programmer
+
+tmp0: 1893, // non-visible temporary register
+tmp1: 1892,
+tmp2: 1891,
+tmp3: 1890,
+tmp4: 1889,
+tmp5: 1888,
+tmp6: 1887,
+tmp7: 1886,
+
+sum0: 644,  // alu output (phi2-latched)
+sum1: 643,
+sum2: 642,
+sum3: 641,
+sum4: 640,
+sum5: 639,
+sum6: 638,
+sum7: 412,
+
+dbi0: 608,  // data bus input register
+dbi1: 599,
+dbi2: 598,
+dbi3: 400,
+dbi4: 405,
+dbi5: 395,
+dbi6: 389,
+dbi7: 650,
+
+dbo0: 609,  // data bus output latch
+dbo1: 602,
+dbo2: 601,
+dbo3: 402,
+dbo4: 406,
+dbo5: 397,
+dbo6: 390,
+dbo7: 649,
+
+inch0: 198, // incrementer high output port
+inch1: 199,
+inch2: 200,
+inch3: 201,
+inch4: 202,
+inch5: 203,
+inch6: 204,
+inch7: 205,
+incl0: 154, // incrementer low output port
+incl1: 143,
+incl2: 144,
+incl3: 147,
+incl4: 148,
+incl5: 151,
+incl6: 152,
+incl7: 156,
+
+obl0: 27,  // output buffer low (address bus low output latch)
+obl1: 30,
+obl2: 28,
+obl3: 32,
+obl4: 29,
+obl5: 33,
+obl6: 1073,
+obl7: 35,
+
+"#obh0": 1071,  // output buffer high (address bus high output latch))
+"#obh1": 819,
+"#obh2": 811,
+"#obh3": 813,
+"#obh4": 817,
+"#obh5": 809,
+"#obh6": 815,
+"#obh7": 574,
+
+// other internal state
+ir0: 1301, // Instruction Register
 ir1: 1285,
 ir2: 1286,
 ir3: 1287,
@ -70,11 +271,9 @@ ir5: 1289,
 ir6: 1274,
 ir7: 1277,

-// internal control signals
-sync: 1528,   // aka #decode_0
-
 // timing state signals
 Ts: 1309,
+Tf: 849,      // aka fetch
 Ta0: 879,
 Td0_0: 981,
 "#Te0": 868,
@ -101,47 +300,12 @@ Tg7: 1081,
 Tg8: 891,
 Tr8: 697,

-// many other internal busses registers and signals
-abh0: 267,
-abh1: 258,
-abh2: 266,
-abh3: 257,
-abh4: 265,
-abh5: 256,
-abh6: 259,
-abh7: 255,
-ablx0: 1683,
-ablx1: 1682,
-ablx2: 1689,
-ablx3: 1687,
-ablx4: 1694,
-ablx5: 1693,
-ablx6: 1698,
-ablx7: 1697,
-abl0: 1670,
-abl1: 1671,
-abl2: 1653,
-abl3: 1667,
-abl4: 1655,
-abl5: 1657,
-abl6: 1656,
-abl7: 1658,
-acca0: 1934,
-acca1: 1688,
-acca2: 1700,
-acca3: 1699,
-acca4: 1701,
-acca5: 1702,
-acca6: 1703,
-acca7: 1784,
-accb0: 1919,
-accb1: 1927,
-accb2: 1921,
-accb3: 1929,
-accb4: 1923,
-accb5: 1931,
-accb6: 1925,
-accb7: 1933,
+// other internal busses registers and signals
+
+// internal control signals
+sync: 1528,   // aka #decode_0
+
+// ALU signals
 adda0: 1680,
 adda1: 1681,
 adda2: 1685,
@ -166,145 +330,42 @@ addb4: 553,
 addb5: 552,
 addb6: 545,
 addb7: 544,
-idb0: 610,
-idb1: 1593,
-idb2: 387,
-idb3: 386,
-idb4: 311,
-idb5: 310,
-idb6: 393,
-idb7: 1651,
-dbi0: 608,
-dbi1: 599,
-dbi2: 598,
-dbi3: 400,
-dbi4: 405,
-dbi5: 395,
-dbi6: 389,
-dbi7: 650,
-dbo0: 609,
-dbo1: 602,
-dbo2: 601,
-dbo3: 402,
-dbo4: 406,
-dbo5: 397,
-dbo6: 390,
-dbo7: 649,
+addg0: 593,
+addg1: 594,
+addg2: 589,
+addg3: 590,
+addg4: 585,
+addg5: 586,
+addg6: 581,
+addg7: 582,
+addp0: 564,
+addp1: 566,
+addp2: 556,
+addp3: 558,
+addp4: 548,
+addp5: 550,
+addp6: 541,
+addp7: 543,
+
 decode: 1225,
-i0: 1271,  // pla word lines
-i1: 1269,
-i2: 1268,
-i3: 1267,
-i4: 1265,
-i5: 1264,
-i6: 1263,
-i7: 1261,
-inch0: 198,
-inch1: 199,
-inch2: 200,
-inch3: 201,
-inch4: 202,
-inch5: 203,
-inch6: 204,
-inch7: 205,
-incl0: 154,
-incl1: 143,
-incl2: 144,
-incl3: 147,
-incl4: 148,
-incl5: 151,
-incl6: 152,
-incl7: 156,
-ixh0: 1910,
-ixh1: 1914,
-ixh2: 1911,
-ixh3: 1915,
-ixh4: 1912,
-ixh5: 1916,
-ixh6: 1913,
-ixh7: 1917,
-ixl0: 1918,
-ixl1: 1926,
-ixl2: 1920,
-ixl3: 1928,
-ixl4: 1922,
-ixl5: 1930,
-ixl6: 1924,
-ixl7: 1932,
-ob: 1308,
-obl0: 27,
-obl1: 30,
-obl2: 28,
-obl3: 32,
-obl4: 29,
-obl5: 33,
-obl6: 1073,
-obl7: 35,
-pch0: 1878,
-pch1: 1882,
-pch2: 1879,
-pch3: 1883,
-pch4: 1880,
-pch5: 1884,
-pch6: 1881,
-pch7: 1885,
-pcl0: 1877,
-pcl1: 1873,
-pcl2: 1876,
-pcl3: 1872,
-pcl4: 1875,
-pcl5: 1871,
-pcl6: 1874,
-pcl7: 1870,
-res: 1512,
-sph0: 1909,
-sph1: 1908,
-sph2: 1907,
-sph3: 1906,
-sph4: 1905,
-sph5: 1904,
-sph6: 1903,
-sph7: 1902,
-spl0: 1894,
-spl1: 1898,
-spl2: 1895,
-spl3: 1899,
-spl4: 1896,
-spl5: 1900,
-spl6: 1897,
-spl7: 1901,
-sum0: 644,
-sum1: 643,
-sum2: 642,
-sum3: 641,
-sum4: 640,
-sum5: 639,
-sum6: 638,
-sum7: 412,
-sumab0: 564,
-sumab1: 566,
-sumab2: 556,
-sumab3: 558,
-sumab4: 548,
-sumab5: 550,
-sumab6: 541,
-sumab7: 543,
-tmp0: 1893,
-tmp1: 1892,
-tmp2: 1891,
-tmp3: 1890,
-tmp4: 1889,
-tmp5: 1888,
-tmp6: 1887,
-tmp7: 1886,
 enrwa: 1318,
-flagc: 1160,
-flagh: 785,
-flagi: 1007,
-flagn: 1005,
-flagv: 1124,
-flagz: 1026,
-qaddgen0: 593,
+fetch: 849, // aka Tf
+
+ob: 1308, // output buffer (read-not-write output latch)
+
+resg: 1512,
+
+xi0: 1303,  // half-latch prior to IR
+xi1: 1291,
+xi2: 1294,
+xi3: 1292,
+xi4: 1295,
+xi5: 1293,
+xi6: 1275,
+xi7: 1276,
+
+// signals which are not purely alphabetical
+// note that underscore digit represents a logical duplication
 acca0_1: 342,
 acca1_1: 350,
 acca2_1: 344,
@ -635,14 +696,6 @@ phi2_1: 478,
 "#ixl5_0": 1726,
 "#ixl6_0": 1730,
 "#ixl7_0": 1782,
-"#obh0": 1071,
-"#obh1": 819,
-"#obh2": 811,
-"#obh3": 813,
-"#obh4": 817,
-"#obh5": 809,
-"#obh6": 815,
-"#obh7": 574,
 "#pch0_0": 1760,
 "#pch1_0": 1757,
 "#pch2_0": 1761,
@ -732,7 +785,6 @@ phi2_1: 478,
 "#n0n.2-7": 1242,
 "#phi2_0": 477,
 "#phi2_2": 576,
-"#qand0": 571,
 "#x0/abh": 979,
 "#x0/abl1": 438,
 "#x0/db0": 127,
@ -746,6 +798,14 @@ phi2_1: 478,
 "#xacca/db": 466,
 "#xaccb/abl1": 460,
 "#xaccb/db": 760,
+"#xaddg0": 571,
+"#xaddg1": 570,
+"#xaddg2": 563,
+"#xaddg3": 562,
+"#xaddg4": 555,
+"#xaddg5": 554,
+"#xaddg6": 547,
+"#xaddg7": 546,
 "#xda/adda": 434,
 "#xdb/acca": 464,
 "#xdb/accb": 430,
@ -884,13 +944,279 @@ phi2_1: 478,
 "flag0/db3": 376,
 "flag0/db4": 309,
 "flag0/db5": 308,
-"n1n-0": 1303,
-"n1n-1": 1291,
-"n1n-2": 1294,
-"n1n-3": 1292,
-"n1n-4": 1295,
-"n1n-5": 1293,
-"n1n-6": 1275,
 "ndb/adda": 415,
-"nin-7": 1276,
+
+// from this point: signals imported from Segher 2011-04-16 and not yet ordered or commented
+carry: 646,
+dbe_1: 1453,
+dec: 163,
+halted: 2,
+int: 1083,
+irq_0: 3,
+irqg: 1183,
+nmi_0: 1477,
+nmig: 1192,
+restart: 1186,
+
+ta0: 879,  // timing state signals also seen earlier with mixed-case names
+ta1: 838,
+ta2: 844,
+td0_0: 981,
+td0_1: 700,
+te1_0: 735,
+te1_1: 967,
+te1_2: 705,
+te1_3: 715,
+te1_4: 865,
+te1_5: 973,
+te1_6: 706,
+tg0: 12,
+tg1: 772,
+tg2: 832,
+tg3: 835,
+tg4: 696,
+tg5: 914,
+tg6: 911,
+tg7: 1081,
+tg8: 891,
+tr3: 823,
+tr4: 825,
+tr5: 828,
+tr6: 894,
+tr7: 694,
+tr8: 697,
+ts: 1309,
+tsc_0: 1508,
+tx0: 850,
+tx1: 851,
+tx2: 860,
+
+wait: 1234,
+wr: 788,
+writing: 1449,
+
+// the remainder of the imports need quoting
+"#alu-cin": 592,
+"#alu-cout": 595,
+"#alu-hin": 584,
+"#alu-hout": 1690,
+"#alu-or": 472,
+"#alu-or-xor": 475,
+"#carry16": 733,
+"#dbe_0": 1452,
+"#dbe_2": 1454,
+"#end": 1574,
+"#flagc_1": 942,
+"#i-ts": 1313,
+"#inc": 712,
+"#inch-cin": 78,
+"#next-cyc-fetch": 4,
+"#nmi_1": 1478,
+"#nmip": 1178,
+"#op-00xxxxxx_0": 945,
+"#op-ta0-a-alu": 1019,
+"#ta0-stx": 796,
+"#ta0.2_0": 873,
+"#ta1-0000100x": 798,
+"#ta1-0000100x.2": 799,
+"#ta1_0": 872,
+"#ta1_1": 1095,
+"#ta1_2": 960,
+"#taken": 1039,
+"#te0": 868,
+"#te0.2_0": 867,
+"#tx0_0": 971,
+"#tx0_1": 926,
+"#tx1_0": 727,
+"#xalu-cin": 943,
+"#xalu-or-xor": 479,
+"#xdbi/db": 536,
+"#xsum/db": 535,
+"alu-and": 473,
+"alu-sl": 578,
+"alu-sr/c": 1110,
+"alu-sub/c": 1144,
+"alu-sub/c_0": 1163,
+"alu-vout": 1058,
+"alu-zout": 645,
+"alu/c": 1147,
+"alu/c_0": 1164,
+"alu/h": 782,
+"alu/nz": 1027,
+"alu/v": 1112,
+"alu2/z": 1049,
+"da-c": 379,
+"da-h": 381,
+"db/ccr": 1107,
+"dbi/db": 531,
+"dec-low-adjust": 385,
+"do-alu-cin": 575,
+"force-wait": 1245,
+"inc16/z": 989,
+"incl-cout": 42,
+"insn/c": 1162,
+"insn/c_0": 1131,
+"insn/i": 1000,
+"insn/v": 1570,
+"irq-dis": 990,
+"irq-new": 1215,
+"ix/ab": 833,
+"nmi-done": 1172,
+"nmi-new": 1174,
+"no-address": 1489,
+"shift-vout": 1057,
+"shift/v": 1568,
+"sr-cin": 765,
+"t-before-fetch-simple": 1149,
+"ta0-two-cycle-insn": 965,
+"ta0.2": 878,
+"ta2-0000100x": 1028,
+"ta2-0000100x_0": 748,
+"ta2-0000100x_1": 759,
+"ta2-1xxx11xx": 1045,
+"ta3-0000100x": 1031,
+"te0.2": 866,
+"tsc-high": 1460,
+"tsc-low": 1476,
+"xalu-and": 483,
+
+// pla outputs (not in physical order)
+"op-0000011x": 1361,
+"op-0000100x": 1332,
+"op-0000100x_0": 1379,
+"op-0000100x_1": 1427,
+"op-0000101x": 1141,
+"op-0000110x": 1130,
+"op-0000xxxx": 1369,
+"op-0000xxxx_0": 1362,
+"op-00010110": 1355,
+"op-0001100x": 1394,
+"op-0001101x": 1346,
+"op-0001xxxx": 1360,
+"op-000x0110": 1391,
+"op-0010xxxx": 1380,
+"op-0010xxxx_0": 1363,
+"op-0010xxxx_1": 1399,
+"op-0010xxxx_2": 1426,
+"op-0011100x": 1381,
+"op-00111011": 1383,
+"op-00xxxxxx": 1342,
+"op-0100xxxx": 1432,
+"op-0101xxxx": 1425,
+"op-011x1101": 1387,
+"op-011x1110": 1398,
+"op-011xxxxx": 1337,
+"op-011xxxxx_0": 1322,
+"op-011xxxxx_1": 1320,
+"op-01xx01xx": 1443,
+"op-01xx01xx_0": 1396,
+"op-01xx0xxx": 1390,
+"op-01xx100x": 1345,
+"op-01xx100x_0": 1094,
+"op-01xx100x_1": 1334,
+"op-01xx1110": 1328,
+"op-01xx1110_0": 1341,
+"op-01xx11x1": 1428,
+"op-01xxx1xx": 1338,
+"op-0x01xxxx": 1343,
+"op-0x0xxxxx_0": 1364,
+"op-0xxxxxxx": 1439,
+"op-0xxxxxxx_0": 1401,
+"op-0xxxxxxx_1": 1437,
+"op-10xx0111": 1339,
+"op-10xx111x": 948,
+"op-10xxxxxx": 1384,
+"op-11xx0111": 1436,
+"op-11xx1110": 1366,
+"op-11xx1111": 1393,
+"op-11xxxxxx": 1327,
+"op-1x001101": 1349,
+"op-1x00xxxx": 1372,
+"op-1x10xxxx": 1350,
+"op-1x11xxxx": 1321,
+"op-1xx01101": 1352,
+"op-1xx0xxxx": 1371,
+"op-1xxx0010": 1354,
+"op-1xxx0111": 1323,
+"op-1xxx10x0": 1438,
+"op-1xxx10x1": 1444,
+"op-1xxx1100": 1378,
+"op-1xxx1100_0": 1442,
+"op-1xxx1101": 1356,
+"op-1xxx1101_0": 1388,
+"op-1xxx1101_1": 1434,
+"op-1xxx1111": 1389,
+"op-1xxx11x0": 1374,
+"op-1xxx11xx": 1431,
+"op-1xxx11xx_0": 1353,
+"op-1xxx11xx_1": 1430,
+"op-1xxx11xx_2": 1392,
+"op-1xxx11xx_3": 1340,
+"op-1xxx11xx_4": 1373,
+"op-1xxxx111": 1435,
+"op-1xxxx111_0": 1348,
+"op-1xxxxxxx": 846,
+"op-1xxxxxxx_0": 1150,
+"op-s-00000110": 1420,
+"op-s-00000111": 1407,
+"op-s-00001001": 1410,
+"op-s-0000100x": 1417,
+"op-s-0000100x_0": 1423,
+"op-s-0000111x": 1001,
+"op-s-00110101": 1411,
+"op-s-00110110": 1413,
+"op-s-00110111": 1414,
+"op-s-0011011x": 1415,
+"op-s-0011x1xx": 1421,
+"op-s-0011xxxx": 1409,
+"op-s-0x0xxxxx": 1419,
+"op-s-0x0xxxxx": 1422,
+"op-s-1x001101": 1412,
+"op-s-1x00xxxx": 1405,
+"op-s-1x01xxxx": 1418,
+"op-s-1x01xxxx_0": 1402,
+"op-s-1x01xxxx_1": 1416,
+"op-s-xx10xxxx": 1408,
+"op-s-xx10xxxx_0": 1403,
+"op-s-xx11xxxx": 1404,
+"op-xx11xxxx": 1357,
+"op-xxx011x": 1375,
+"op-xxx1xxxx": 1336,
+"op-xxxx0000": 1424,
+"op-xxxx000x": 1377,
+"op-xxxx0010": 1344,
+"op-xxxx0011": 1333,
+"op-xxxx001x": 1335,
+"op-xxxx00xx": 1433,
+"op-xxxx00xx_0": 1367,
+"op-xxxx0111": 1330,
+"op-xxxx01xx": 1395,
+"op-xxxx0x01": 1385,
+"op-xxxx0x0x": 1324,
+"op-xxxx0xxx": 1040,
+"op-xxxx0xxx_0": 1351,
+"op-xxxx1001": 1326,
+"op-xxxx100x": 1358,
+"op-xxxx10x1": 1365,
+"op-xxxx10x1_0": 1429,
+"op-xxxx10xx": 1325,
+"op-xxxx1100": 1440,
+"op-xxxx111x": 1359,
+"op-xxxx111x_0": 1400,
+"op-xxxx111x_1": 1368,
+"op-xxxx11xx": 1329,
+"op-xxxx11xx_0": 1382,
+"op-xxxx1xx1": 1386,
+"op-xxxx1xxx": 1397,
+"op-xxxxx11x": 1376,
+"op-xxxxx11x_0": 1441,
+"op-xxxxx1xx": 1370,
+"op-xxxxxx0x": 1041,
+"op-xxxxxx1x": 1446,
+"op-xxxxxxx0": 1138,
+"op-xxxxxxx0_0": 1003,
+"op-xxxxxxx1": 1331,
+"op-xxxxxxx1_0": 11,
+"op-xxxxxxx1_1": 1347,
+"op-xxxxxxx1_2": 1086,
 }
--- a/chip-6800/support.js
+++ b/chip-6800/support.js
@ -15,8 +15,8 @@ presetLogLists=[
                ['cycle',],
                ['ab','db','rw','vma','Fetch','pc','acca','accb','ix','sp','p'],
                ['ir','sync','Execute','State'],			// instruction fetch and execution control
-                ['dbi','dbo','tmp'],       				// internal register-sized state
-                ['idb','abh','abl','ablx'],				// internal busses
+                ['dbi','dbo','tmp','sum','inc'],			// internal register-sized state
+                ['idb','abh','abl','ablx'],				// internal datapath busses
                ['irq','nmi',nodenamereset,'tsc','dbe','halt','ba'],	// other pins
        ];

@ -128,7 +128,7 @@ function readPstring(){
 // The 6800 state control is something like a branching shift register
 // ... but not quite like that
 TCStates=[
-        "Ts",
+        "Ts",   "Tf",
        "Tx0",  "Tx1",   "Tx2",
                                "Ta0", "Ta1", "Ta2",
        "Td0_0",
@ -164,6 +164,8 @@ function busToString(busname){
 		return busToHex('sph') + busToHex('spl');
 	if(busname=='ix')
 		return busToHex('ixh') + busToHex('ixl');
+	if(busname=='inc')
+		return busToHex('inch') + busToHex('incl');
 	if(busname=='p')
 		return readPstring();
 	if(busname=='State')
--- a/chip-6800/transdefs.js
+++ b/chip-6800/transdefs.js
--- a/expert.html
+++ b/expert.html
@ -56,7 +56,7 @@ $().ready(function(){
 <a href="http://blog.visual6502.org">Blog</a>&nbsp;
 <a href="http://www.visual6502.org/links.html">Links</a>&nbsp;
 <a href="http://github.com/trebonian/visual6502">Source</a>&nbsp;
-<a href="http://www.6502asm.com/">6502asm assembler</a>&nbsp;
+<a href="http://skilldrick.github.com/easy6502/#first-program">easy6502 assembler</a>&nbsp;
 <a href="http://www.e-tradition.net/bytes/6502/disassembler.html">e-tradition disassembler</a>&nbsp;
 </span>
 <div class="frame" id="frame">
@ -76,7 +76,7 @@ $().ready(function(){
  </form>
 </div>
 <div id="layoutControlPanel">
-  Use 'z' or '>' to zoom in, 'x' or '<' to zoom out, click to probe signals and drag to pan.
+  Use 'z' or '&gt;' to zoom in, 'x' or '&lt;' to zoom out, click to probe signals and drag to pan.
  <form id="updateShow"> Show:
  <input type="checkbox" name="1" id="updateShow1" onchange="updateShow(this.name,this.checked)" />(diffusion)
  <input type="checkbox" name="3" id="updateShow3" onchange="updateShow(this.name,this.checked)" />(grounded diffusion)
--- a/index.html
+++ b/index.html
@ -66,26 +66,26 @@ Keyboard controls: 'z' to zoom in, 'x' to zoom out, 'n' to step the simulation.
 <br />
 Mouse controls: Left-click and drag to scroll around (when you're zoomed in.)
 <br />
-More information in the <a href="http://visual6502.org/wiki/index.php?title=JssimUserHelp">User Guide<a>.
+More information in the <a href="http://visual6502.org/wiki/index.php?title=JssimUserHelp">User Guide</a>.
 <br />
 <br /> 
 </span>
 <div class="frame" id="frame">
 <div class="chip" id="chip">
-<canvas class="chip" id="chipbg"></canvas>
+<object data="6502N.svg" type="image/svg+xml" id="chipbg" style="position: absolute; width: 600px; height:600px;"></object>
 <canvas class="chip" id="overlay"></canvas>
 <canvas class="chip" id="hilite"></canvas>
 <canvas class="chip" id="hitbuffer"></canvas>
 </div>
 <div class = "buttons">
  <div style="position:relative; float:left;">
-    <a href ="javascript:stopChip()"id="stop"><img class="navstop" src="images/stop.png"></a>
-    <a href ="javascript:runChip()" id="start"><img class="navplay" src="images/play.png"></a>
+    <a href ="javascript:stopChip()" id="stop"><img class="navstop" src="images/stop.png" title="stop"></a>
+    <a href ="javascript:runChip()" id="start"><img class="navplay" src="images/play.png" title="start"></a>
  </div>
  <div style="float:left;">
-    <a href ="javascript:resetChip()"><img class="navbutton" src="images/up.png"></a>
-    <a href ="javascript:stepBack()"><img class="navbutton" src="images/prev.png"></a>
-    <a href ="javascript:stepForward()"><img class="navbutton" src="images/next.png"></a>
+    <a href ="javascript:resetChip()"><img class="navbutton" src="images/up.png" title="reset"></a>
+    <a href ="javascript:stepBack()"><img class="navbutton" src="images/prev.png" title="back"></a>
+    <a href ="javascript:stepForward()"><img class="navbutton" src="images/next.png" title="step"></a>
  </div>
  <div style="float:right; margin-left:20px;">... or try <a href="expert.html">Advanced</a></div>
 </div>
@ -97,7 +97,7 @@ More information in the <a href="http://visual6502.org/wiki/index.php?title=Jssi
 <br />
 <br />
 Source code is available on <a href="http://github.com/trebonian/visual6502">github visual6502</a>.
-Use the online <a href="http://www.6502asm.com/">emulator and assembler</a> from 6502asm.com
+Use the online <a href="http://skilldrick.github.com/easy6502/#first-program">emulator and assembler</a> from the easy6502 tutorial
 and <a href="http://www.e-tradition.net/bytes/6502/disassembler.html">disassembler</a> from e-tradition.net
 <br />
 For in-depth 6502 investigation and some more advanced features, try our <a href="expert.html">Advanced</a> page.
--- a/kiosk.css
+++ b/kiosk.css
@ -50,6 +50,13 @@ canvas.chip {
 height: 600px;
 }

+object.chipbg {
+ position: absolute;
+ width: 600px;
+ height: 600px;
+}
+
+
 div.buttons{
 position: absolute;
 top: -5px;
@ -91,4 +98,4 @@ table.memtable {
 #title {
 font-size:30px;
 font-weight:bold;	
-}
+}
--- a/kioskWires.js
+++ b/kioskWires.js
@ -144,12 +144,19 @@ function mouseUp(e){
 }

 function setZoom(n){
+	var svg = chipbg.getSVGDocument();
+	svg = svg.childNodes[0];
+
 	zoom = n;
 	setChipStyle({
 		width: 600*n+'px',
 		height: 600*n+'px'
 	});
+
+	svg.style.width = 600*n+'px';
+	svg.style.height = 600*n+'px';
 	recenter();
+
 }

 function recenter(){
@ -193,7 +200,7 @@ function handleClick(e){
 function setChipStyle(props){
 	for(var i in props){
 		chipbg.style[i] = props[i];
-		overlay.style[i] = props[i];
+//		overlay.style[i] = props[i];
 		hilite.style[i] = props[i];
 		hitbuffer.style[i] = props[i];
 	}
--- a/macros.js
+++ b/macros.js
@ -226,9 +226,10 @@ fetchTriggers={};
 // simulate a single clock phase with no update to graphics or trace
 function halfStep(){
 	var clk = isNodeHigh(nodenames['clk0']);
-	eval(clockTriggers[cycle]);
 	if (clk) {setLow('clk0'); handleBusRead(); } 
 	else {setHigh('clk0'); handleBusWrite();}
+	eval(clockTriggers[cycle+1]);  // pre-apply next tick's inputs now, so the updates are displayed
+
 }

 function handleBusRead(){
--- a/nodenames.js
+++ b/nodenames.js
@ -99,13 +99,21 @@ pclp5: 72,
 pclp6: 1458,
 pclp7: 1647,
 "#pclp0": 1227,    // machine state: program counter low (pre-incremented?, inverse second storage node)
+"~pclp0": 1227,     // automatic alias replacing hash with tilde
 "#pclp1": 1102,
+"~pclp1": 1102, // automatic alias replacing hash with tilde
 "#pclp2": 1079,
+"~pclp2": 1079, // automatic alias replacing hash with tilde
 "#pclp3": 868,
+"~pclp3": 868, // automatic alias replacing hash with tilde
 "#pclp4": 39,
+"~pclp4": 39, // automatic alias replacing hash with tilde
 "#pclp5": 1326,
+"~pclp5": 1326, // automatic alias replacing hash with tilde
 "#pclp6": 731,
+"~pclp6": 731, // automatic alias replacing hash with tilde
 "#pclp7": 536,
+"~pclp7": 536, // automatic alias replacing hash with tilde
 pch0: 1670,     // machine state: program counter high (first storage node)
 pch1: 292,
 pch2: 502,
@ -123,13 +131,21 @@ pchp5: 1301,
 pchp6: 652,
 pchp7: 1206,
 "#pchp0": 780,     // machine state: program counter high (pre-incremented?, inverse second storage node)
+"~pchp0": 780,      // automatic alias replacing hash with tilde
 "#pchp1": 113,
+"~pchp1": 113, // automatic alias replacing hash with tilde
 "#pchp2": 114,
+"~pchp2": 114, // automatic alias replacing hash with tilde
 "#pchp3": 124,
+"~pchp3": 124, // automatic alias replacing hash with tilde
 "#pchp4": 820,
+"~pchp4": 820, // automatic alias replacing hash with tilde
 "#pchp5": 33,
+"~pchp5": 33, // automatic alias replacing hash with tilde
 "#pchp6": 751,
+"~pchp6": 751, // automatic alias replacing hash with tilde
 "#pchp7": 535,
+"~pchp7": 535, // automatic alias replacing hash with tilde
                // machine state: status register (not the storage nodes)
 p0: 32,         // C bit of status register (storage node)
 p1: 627,        // Z bit of status register (storage node)
@ -174,9 +190,11 @@ notir4: 26,
 notir5: 1394,
 notir6: 895,
 notir7: 1320,
-irline3: 996,   // internal signal: PLA input - ir0 AND ir1
+irline3: 996,   // internal signal: PLA input - ir0 OR ir1
 clock1: 1536,   // internal state: timing control aka #T0
+clock1: 1536,    // automatic alias replacing hash with tilde
 clock2: 156,    // internal state: timing control aka #T+
+clock2: 156,     // automatic alias replacing hash with tilde
 t2: 971,        // internal state: timing control
 t3: 1567,
 t4: 690,
@ -230,6 +248,7 @@ sb5: 166,
 sb6: 1336,
 sb7: 1001,
 notalu0: 394,   // datapath state: alu output storage node (inverse) aka #ADD0
+notalu0: 394,    // automatic alias replacing hash with tilde
 notalu1: 697,
 notalu2: 276,
 notalu3: 495,
@ -317,7 +336,9 @@ pd7: 1690,
 "PD-xxx010x1": 302,
 "PD-n-0xx0xx0x": 125,
 "#TWOCYCLE": 851,
+"~TWOCYCLE": 851, // automatic alias replacing hash with tilde
 "#TWOCYCLE.phi1": 792,
+"~TWOCYCLE.phi1": 792, // automatic alias replacing hash with tilde
 "ONEBYTE": 778,

 abl0: 1096,     // internal bus: address bus low latched data out (inverse of inverted storage node)
@ -329,13 +350,21 @@ abl5: 234,
 abl6: 178,
 abl7: 567,
 "#ABL0": 153,   // internal state: address bus low latched data out (storage node, inverted)
+"~ABL0": 153,    // automatic alias replacing hash with tilde
 "#ABL1": 107,
+"~ABL1": 107, // automatic alias replacing hash with tilde
 "#ABL2": 707,
+"~ABL2": 707, // automatic alias replacing hash with tilde
 "#ABL3": 825,
+"~ABL3": 825, // automatic alias replacing hash with tilde
 "#ABL4": 364,
+"~ABL4": 364, // automatic alias replacing hash with tilde
 "#ABL5": 1513,
+"~ABL5": 1513, // automatic alias replacing hash with tilde
 "#ABL6": 1307,
+"~ABL6": 1307, // automatic alias replacing hash with tilde
 "#ABL7": 28,
+"~ABL7": 28, // automatic alias replacing hash with tilde
 abh0: 1429,     // internal bus: address bus high latched data out (inverse of inverted storage node)
 abh1: 713,
 abh2: 287,
@ -345,13 +374,21 @@ abh5: 775,
 abh6: 997,
 abh7: 489,
 "#ABH0": 1062,  // internal state: address bus high latched data out (storage node, inverted)
+"~ABH0": 1062,   // automatic alias replacing hash with tilde
 "#ABH1": 907,
+"~ABH1": 907, // automatic alias replacing hash with tilde
 "#ABH2": 768,
+"~ABH2": 768, // automatic alias replacing hash with tilde
 "#ABH3": 92,
+"~ABH3": 92, // automatic alias replacing hash with tilde
 "#ABH4": 668,
+"~ABH4": 668, // automatic alias replacing hash with tilde
 "#ABH5": 1128,
+"~ABH5": 1128, // automatic alias replacing hash with tilde
 "#ABH6": 289,
+"~ABH6": 289, // automatic alias replacing hash with tilde
 "#ABH7": 429,
+"~ABH7": 429, // automatic alias replacing hash with tilde

 "branch-back": 626,           // distinguish forward from backward branches
 "branch-forward.phi1": 1110,  // distinguish forward from backward branches
@ -360,11 +397,13 @@ notRdy0: 248,           // internal signal: global pipeline control
 "notRdy0.phi1": 1272,   // delayed pipeline control
 "notRdy0.delay": 770,   // global pipeline control latched by phi1 and then phi2
 "#notRdy0.delay": 559,  // global pipeline control latched by phi1 and then phi2 (storage node)
+"~notRdy0.delay": 559,   // automatic alias replacing hash with tilde
 Reset0: 67,     // internal signal: retimed reset from pin
 C1x5Reset: 926, // retimed and pipelined reset in progress
 notRnWprepad: 187, // internal signal: to pad, yet to be inverted and retimed
 RnWstretched: 353, // internal signal: control datapad output drivers, aka TRISTATE
 "#DBE": 1035,      // internal signal: formerly from DBE pad (6501)
+"~DBE": 1035,       // automatic alias replacing hash with tilde
 cp1: 710,       // internal signal: clock phase 1
 cclk: 943,      // unbonded pad: internal non-overlappying phi2
 fetch: 879,     // internal signal
@ -519,32 +558,40 @@ H1x1: 1042,     // internal signal: drive status byte onto databus
 "x-op-push/pull":1050,         //  pla121    // feeds into pla130 (no normal pla output)
 "op-T0-cld/sed":1419,          //  pla122
 "#op-branch-bit6":840,         //  pla123    // IR bit6 used only to detect branch type
+"~op-branch-bit6":840,          // automatic alias replacing hash with tilde
 "op-T3-mem-abs":607,           //  pla124
 "op-T2-mem-zp":219,            //  pla125
 "op-T5-mem-ind-idx":1385,      //  pla126
 "op-T4-mem-abs-idx":281,       //  pla127
 "#op-branch-bit7":1174,        //  pla128    // IR bit7 used only to detect branch type
+"~op-branch-bit7":1174,         // automatic alias replacing hash with tilde
 "op-clv":1164,                 //  pla129
 "op-implied":1006,             //  pla130    // has extra pulldowns: pla121 and ir0

 // internal signals: derived from pla outputs
 "#op-branch-done": 1048,
+"~op-branch-done": 1048, // automatic alias replacing hash with tilde
 "#op-T3-branch": 1708,
+"~op-T3-branch": 1708, // automatic alias replacing hash with tilde
 "op-ANDS": 1228,
 "op-EORS": 1689,
 "op-ORS": 522,
 "op-SUMS": 1196,
 "op-SRS": 934,
 "#op-store": 925,
+"~op-store": 925, // automatic alias replacing hash with tilde
 "#WR": 1352,
+"~WR": 1352, // automatic alias replacing hash with tilde
 "op-rmw": 434,
 "short-circuit-idx-add": 1185,
 "short-circuit-branch-add": 430,
 "#op-set-C": 252,
+"~op-set-C": 252, // automatic alias replacing hash with tilde

 // internal signals: control signals
 nnT2BR: 967,    // doubly inverted
 BRtaken: 1544,  // aka #TAKEN
+BRtaken: 1544,   // automatic alias replacing hash with tilde

 // internal signals and state: interrupt and vector related
 // segher says:
@ -554,21 +601,26 @@ BRtaken: 1544,  // aka #TAKEN
 //   INTG is IRQ and NMI taken together.
 IRQP: 675,
 "#IRQP": 888,
+"~IRQP": 888, // automatic alias replacing hash with tilde
 NMIP: 1032,
 "#NMIP": 297,
+"~NMIP": 297, // automatic alias replacing hash with tilde
 "#NMIG": 264,
+"~NMIG": 264, // automatic alias replacing hash with tilde
 NMIL: 1374,
 RESP: 67,
 RESG: 926,
 VEC0: 1465,
 VEC1: 1481,
 "#VEC": 1134,
+"~VEC": 1134, // automatic alias replacing hash with tilde
 D1x1: 827,         // internal signal: interrupt handler related
 "brk-done": 1382,  // internal signal: interrupt handler related
 INTG: 1350,        // internal signal: interrupt handler related

 // internal state: misc pipeline state clocked by cclk (phi2)
 "pipe#VEC": 1431,     // latched #VEC
+"pipe~VEC": 1431,      // automatic alias replacing hash with tilde
 "pipeT-SYNC": 537,
 pipeT2out: 40,
 pipeT3out: 706,
@ -613,11 +665,13 @@ pipeUNK35: 1713,
 pipeUNK36: 729,
 pipeUNK37: 197,
 "pipe#WR.phi2": 1131,
+"pipe~WR.phi2": 1131, // automatic alias replacing hash with tilde
 pipeUNK39: 151,
 pipeUNK40: 456,
 pipeUNK41: 1438,
 pipeUNK42: 1104,
 "pipe#T0": 554,   // aka #T0.phi2
+"pipe~T0": 554,    // automatic alias replacing hash with tilde

 // internal state: vector address pulldown control
 pipeVectorA0: 357,
@ -664,53 +718,91 @@ DC34: 1372,   // lower nibble decimal carry
 DC78: 333,    // carry for decimal mode
 "DC78.phi2": 164,
 "#C01": 1506,
+"~C01": 1506, // automatic alias replacing hash with tilde
 "#C12": 1122,
+"~C12": 1122, // automatic alias replacing hash with tilde
 "#C23": 1003,
+"~C23": 1003, // automatic alias replacing hash with tilde
 "#C34": 1425,
+"~C34": 1425, // automatic alias replacing hash with tilde
 "#C45": 1571,
+"~C45": 1571, // automatic alias replacing hash with tilde
 "#C56": 427,
+"~C56": 427, // automatic alias replacing hash with tilde
 "#C67": 592,
+"~C67": 592, // automatic alias replacing hash with tilde
 "#C78": 1327,
+"~C78": 1327, // automatic alias replacing hash with tilde
 "DA-C01": 623,
 "DA-AB2": 216,
 "DA-AxB2": 516,
 "DA-C45": 1144,
 "#DA-ADD1": 901,
+"~DA-ADD1": 901, // automatic alias replacing hash with tilde
 "#DA-ADD2": 699,
+"~DA-ADD2": 699, // automatic alias replacing hash with tilde

 // misc alu internals
 "#(AxBxC)0": 371,
+"~(AxBxC)0": 371, // automatic alias replacing hash with tilde
 "#(AxBxC)1": 965,
+"~(AxBxC)1": 965, // automatic alias replacing hash with tilde
 "#(AxBxC)2": 22,
+"~(AxBxC)2": 22, // automatic alias replacing hash with tilde
 "#(AxBxC)3": 274,
+"~(AxBxC)3": 274, // automatic alias replacing hash with tilde
 "#(AxBxC)4": 651,
+"~(AxBxC)4": 651, // automatic alias replacing hash with tilde
 "#(AxBxC)5": 486,
+"~(AxBxC)5": 486, // automatic alias replacing hash with tilde
 "#(AxBxC)6": 1197,
+"~(AxBxC)6": 1197, // automatic alias replacing hash with tilde
 "#(AxBxC)7": 532,
+"~(AxBxC)7": 532, // automatic alias replacing hash with tilde
 AxB1: 425,
 AxB3: 640,
 AxB5: 1220,
 AxB7: 1241,
 "#(AxB)0": 1525,
+"~(AxB)0": 1525, // automatic alias replacing hash with tilde
 "#(AxB)2": 701,
+"~(AxB)2": 701, // automatic alias replacing hash with tilde
 "#(AxB)4": 308,
+"~(AxB)4": 308, // automatic alias replacing hash with tilde
 "#(AxB)6": 1459,
+"~(AxB)6": 1459, // automatic alias replacing hash with tilde
 "(AxB)0.#C0in": 555,
+"(AxB)0.~C0in": 555, // automatic alias replacing hash with tilde
 "(AxB)2.#C12": 193,
+"(AxB)2.~C12": 193, // automatic alias replacing hash with tilde
 "(AxB)4.#C34": 65,
+"(AxB)4.~C34": 65, // automatic alias replacing hash with tilde
 "(AxB)6.#C56": 174,
+"(AxB)6.~C56": 174, // automatic alias replacing hash with tilde
 "#(AxB1).C01": 295,
+"~(AxB1).C01": 295, // automatic alias replacing hash with tilde
 "#(AxB3).C23": 860,
+"~(AxB3).C23": 860, // automatic alias replacing hash with tilde
 "#(AxB5).C45": 817,
+"~(AxB5).C45": 817, // automatic alias replacing hash with tilde
 "#(AxB7).C67": 1217,
+"~(AxB7).C67": 1217, // automatic alias replacing hash with tilde
 "#A.B0": 1628,
+"~A.B0": 1628, // automatic alias replacing hash with tilde
 "#A.B1": 841,
+"~A.B1": 841, // automatic alias replacing hash with tilde
 "#A.B2": 681,
+"~A.B2": 681, // automatic alias replacing hash with tilde
 "#A.B3": 350,
+"~A.B3": 350, // automatic alias replacing hash with tilde
 "#A.B4": 1063,
+"~A.B4": 1063, // automatic alias replacing hash with tilde
 "#A.B5": 477,
+"~A.B5": 477, // automatic alias replacing hash with tilde
 "#A.B6": 336,
+"~A.B6": 336, // automatic alias replacing hash with tilde
 "#A.B7": 1318,
+"~A.B7": 1318, // automatic alias replacing hash with tilde
 "A+B0": 693,
 "A+B1": 1021,
 "A+B2": 110,
@ -720,29 +812,53 @@ AxB7: 1241,
 "A+B6": 803,
 "A+B7": 117,
 "#(A+B)0": 143,
+"~(A+B)0": 143, // automatic alias replacing hash with tilde
 "#(A+B)1": 155,
+"~(A+B)1": 155, // automatic alias replacing hash with tilde
 "#(A+B)2": 1691,
+"~(A+B)2": 1691, // automatic alias replacing hash with tilde
 "#(A+B)3": 649,
+"~(A+B)3": 649, // automatic alias replacing hash with tilde
 "#(A+B)4": 404,
+"~(A+B)4": 404, // automatic alias replacing hash with tilde
 "#(A+B)5": 1632,
+"~(A+B)5": 1632, // automatic alias replacing hash with tilde
 "#(A+B)6": 1084,
+"~(A+B)6": 1084, // automatic alias replacing hash with tilde
 "#(A+B)7": 1398,
+"~(A+B)7": 1398, // automatic alias replacing hash with tilde
 "#(AxB)0": 1525,
+"~(AxB)0": 1525, // automatic alias replacing hash with tilde
 "#(AxB)2": 701,
+"~(AxB)2": 701, // automatic alias replacing hash with tilde
 "#(AxB)4": 308,
+"~(AxB)4": 308, // automatic alias replacing hash with tilde
 "#(AxB)6": 1459,
+"~(AxB)6": 1459, // automatic alias replacing hash with tilde
 "#(AxB)1": 953,
+"~(AxB)1": 953, // automatic alias replacing hash with tilde
 "#(AxB)3": 884,
+"~(AxB)3": 884, // automatic alias replacing hash with tilde
 "#(AxB)5": 1469,
+"~(AxB)5": 1469, // automatic alias replacing hash with tilde
 "#(AxB)7": 177,
+"~(AxB)7": 177, // automatic alias replacing hash with tilde
 "#aluresult0": 957,   // alu result latch input
+"~aluresult0": 957,    // automatic alias replacing hash with tilde
 "#aluresult1": 250,
+"~aluresult1": 250, // automatic alias replacing hash with tilde
 "#aluresult2": 740,
+"~aluresult2": 740, // automatic alias replacing hash with tilde
 "#aluresult3": 1071,
+"~aluresult3": 1071, // automatic alias replacing hash with tilde
 "#aluresult4": 296,
+"~aluresult4": 296, // automatic alias replacing hash with tilde
 "#aluresult5": 277,
+"~aluresult5": 277, // automatic alias replacing hash with tilde
 "#aluresult6": 722,
+"~aluresult6": 722, // automatic alias replacing hash with tilde
 "#aluresult7": 304,
+"~aluresult7": 304, // automatic alias replacing hash with tilde

 // internal signals: datapath control signals

@ -771,6 +887,7 @@ dpc17_SUMS: 921,     // alu op: a plus b (?)
 alucin: 910,         // alu carry in
 notalucin: 1165,
 "dpc18_#DAA": 1201,  // decimal related (inverted)
+"dpc18_~DAA": 1201,   // automatic alias replacing hash with tilde
 dpc19_ADDSB7: 214,   // alu to sb bit 7 only

 dpc20_ADDSB06: 129,  // alu to sb bits 6-0 only
@ -779,15 +896,20 @@ alurawcout: 808,     // alu raw carry out (no decimal adjust)
 notalucout: 412,     // alu carry out (inverted)
 alucout: 1146,       // alu carry out (latched by phi2)
 "#alucout": 206,
+"~alucout": 206, // automatic alias replacing hash with tilde
 "##alucout": 465,
+"~~alucout": 465, // automatic alias replacing hash with tilde
 notaluvout: 1308,    // alu overflow out
 aluvout: 938,        // alu overflow out (latched by phi2)

 "#DBZ": 1268,   // internal signal: not (databus is zero)
+"~DBZ": 1268,    // automatic alias replacing hash with tilde
 DBZ: 744,       // internal signal: databus is zero
 DBNeg: 1200,    // internal signal: databus is negative (top bit of db) aka P-#DB7in
+DBNeg: 1200,     // automatic alias replacing hash with tilde

 "dpc22_#DSA": 725,   // decimal related/SBC only (inverted)
+"dpc22_~DSA": 725,    // automatic alias replacing hash with tilde
 dpc23_SBAC: 534,     // (optionalls decimal-adjusted) sb to acc
 dpc24_ACSB: 1698,    // acc to sb
 dpc25_SBDB: 1060,    // sb pass-connects to idb (bi-directionally)
@ -803,6 +925,7 @@ dpc33_PCHDB: 247,    // drive idb from pch incremented
 dpc34_PCLC: 1704,    // pch carry in and pcl FF detect?
 dpc35_PCHC: 1334,    // pcl 0x?F detect - half-carry
 "dpc36_#IPC": 379,   // pcl carry in (inverted)
+"dpc36_~IPC": 379,    // automatic alias replacing hash with tilde
 dpc37_PCLDB: 283,    // drive idb from pcl incremented
 dpc38_PCLADL: 438,   // drive adl from pcl incremented
 dpc39_PCLPCL: 898,   // load pcl from pcl incremented
--- a/wires.js
+++ b/wires.js
@ -22,6 +22,11 @@

 var frame, chipbg, overlay, hilite, hitbuffer, ctx;
 var nodes = new Array();
+var lastState = new Array();
+var polyAttr = new Array();
+var metalAttr = new Array();
+var polyOffFill;
+var metalOffFill;
 var transistors = {};
 var nodenamelist=[];

@ -40,6 +45,7 @@ function setupNodes(){
 			            state: false, gates: new Array(), c1c2s: new Array()};
 		if(w==ngnd) continue;
 		if(w==npwr) continue;
+		lastState[i] = 0;
 		nodes[w].segs.push(seg.slice(3));
 	}
 }
@ -73,8 +79,20 @@ function setupLayerVisibility(){

 function setupBackground(){
 	chipbg = document.getElementById('chipbg');
-	chipbg.width = grCanvasSize;
-	chipbg.height = grCanvasSize;
+	chipbg.width = 4000;
+	chipbg.height = 4000;
+	var svg = chipbg.getSVGDocument();
+	svg = svg.childNodes[0];
+	var poly = svg.getElementById('poly');
+	var metal = svg.getElementById('metal');
+	polyOffFill = poly.getAttribute('fill');
+	metalOffFill = metal.getAttribute('fill');
+	for(var i in nodes){
+		polyAttr[i] = poly.getElementsByClassName(i+'')[0];	 
+		metalAttr[i] = metal.getElementsByClassName(i+'')[0];	 
+	}
+	return;
+
 	var ctx = chipbg.getContext('2d');
 	ctx.fillStyle = '#000000';
 	ctx.strokeStyle = 'rgba(255,255,255,0.5)';
@ -93,10 +111,10 @@ function setupBackground(){
 }

 function setupOverlay(){
-	overlay = document.getElementById('overlay');
-	overlay.width = grCanvasSize;
-	overlay.height = grCanvasSize;
-	ctx = overlay.getContext('2d');
+//	overlay = document.getElementById('overlay');
+//	overlay.width = grCanvasSize;
+//	overlay.height = grCanvasSize;
+//	ctx = overlay.getContext('2d');
 }

 function setupHilite(){
@ -137,20 +155,44 @@ function hexdigit(n){return '0123456789ABCDEF'.charAt(n);}

 function refresh(){
 	if(!chipLayoutIsVisible) return;
-	ctx.clearRect(0,0,grCanvasSize,grCanvasSize);
+//	ctx.clearRect(0,0,grCanvasSize,grCanvasSize);
+//	for(i in nodes){
+//		if(isNodeHigh(i)) overlayNode(nodes[i].segs);
+//	}
 	for(i in nodes){
-		if(isNodeHigh(i)) overlayNode(nodes[i].segs);
-	}
+		if(isNodeHigh(i)){
+			if(lastState[i]==1)continue;
+
+			var n = polyAttr[i];
+			var n2 = metalAttr[i];
+			if(n!=undefined)
+				n.setAttribute('fill', 'rgb(0,255,255)');
+			if(n2!=undefined)
+				n2.setAttribute('fill', 'rgb(0,255,255)');
+			lastState[i] = 1;
+		} else {
+			if(lastState[i]==0)continue;
+
+			var n = polyAttr[i];
+			var n2 = metalAttr[i];
+
+			if(n!=undefined)
+				n.setAttribute('fill', polyOffFill);
+			if(n2!=undefined)
+				n2.setAttribute('fill', metalOffFill);
+			lastState[i] = 0;
+		}
+	}	
 	hiliteNode(hilited);
 }

-function overlayNode(w){
-	ctx.fillStyle = 'rgba(255,0,64,0.4)';
-	for(i in w) {
-		drawSeg(ctx, w[i]);
-		ctx.fill();
-	}
-}
+//function overlayNode(w){
+//	ctx.fillStyle = 'rgba(255,0,64,0.4)';
+//	for(i in w) {
+//		drawSeg(ctx, w[i]);
+//		ctx.fill();
+//	}
+//}

 // originally to highlight using a list of node numbers
 //   but can now include transistor names
Author	SHA1	Message	Date
trebonian	020f4f2cb0	Merge branch 'ed' into svg	2013-06-26 17:23:51 -04:00
trebonian	741e035eb4	Merge branch 'patch-1' of http://github.com/BigEd/visual6502 into ed	2013-06-26 17:23:14 -04:00
trebonian	f0add78ee5	Merge branch 'ed' into svg	2013-06-25 17:25:09 -04:00
BigEd	dd2241d3de	bugfix - macros.js - pre-apply clock triggers for corrected display	2013-06-25 22:31:53 +02:00
BigEd	c0809ba34e	typo fixup in README	2013-06-24 18:53:07 +02:00
trebonian	7d90b33187	Merge pull request #28 from BigEd/patch-1 Correcting a comment in nodenames.js	2013-02-04 06:02:05 -08:00
BigEd	34244661cb	Correcting a comment in nodenames.js Thanks to 'cerebrum' on forum.6502.org	2013-02-03 10:19:22 +00:00
BigEd	ce74c3f5d3	Swap easy6502 tutorial in for 6502asm emulator/assembler	2012-08-16 07:52:17 +01:00
trebonian	471fcd6ddc	Performance improvements	2012-02-03 22:18:43 -05:00
trebonian	7ac0424f6c	Only redraw if node state changes	2012-02-03 22:05:42 -05:00
trebonian	050906f305	Use SVG DOM to highlight nodes	2012-02-03 21:42:34 -05:00
trebonian	ae185ff06b	Changed chip layout to use SVGs	2012-01-31 22:58:22 -05:00
BigEd	cb03b9741a	html fixups by Quietust	2011-08-27 03:34:25 +02:00
BigEd	7b95b5e345	html tidyup by Quietust	2011-08-27 03:29:23 +02:00
BigEd	de265ecdb8	6502: add nodename aliases to allow more use of the URL interface	2011-05-12 08:54:52 +00:00
BigEd	e81c9fbe0f	update 6800 tracing to include alu and incrementer	2011-04-16 13:03:43 +00:00
BigEd	c300e6ad01	update 6800 nodenames: ordering, comments, minor corrections	2011-04-16 13:02:46 +00:00
BigEd	79d0c4c445	import remainder of Segher's 6800 nodename updates and begin process of ordering and commenting	2011-04-16 11:29:53 +00:00
BigEd	a2d35d54ca	6800 nodename changes from Segher	2011-04-16 10:58:16 +00:00
BigEd	e20eb08b91	updated 6800 transistor bounding boxes and geometries from Ijor	2011-04-12 18:08:51 +00:00
BigEd	8487a7a9e1	6800: tweak nodenames and add the Tf state name/node	2011-04-11 18:22:26 +00:00